From: Wolfram Sang <wsa@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Jan Bottorff <janb@os.amperecomputing.com>,
Serge Semin <fancer.lancer@gmail.com>,
Yann Sionneau <yann@sionneau.net>, Will Deacon <will@kernel.org>,
Jarkko Nikula <jarkko.nikula@linux.intel.com>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Jan Dabros <jsd@semihalf.com>, Andi Shyti <andi.shyti@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org,
Yann Sionneau <ysionneau@kalrayinc.com>
Subject: Re: [PATCH v2] i2c: designware: Fix corrupted memory seen in the ISR
Date: Tue, 19 Sep 2023 12:19:59 +0200 [thread overview]
Message-ID: <ZQl1zwVkx9n2MPvr@shikoro> (raw)
In-Reply-To: <ZQlwC9TCSwWJpuxy@arm.com>
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> I also agree that a wmb() in the i2c driver is not the more elegant fix.
> For similar reasons, we hid barriers in the write*() macros, drivers
> need to stay architecture-agnostic as much as possible.
Exactly my thinking. I wanted to read this patch discussion later this
week. But from glimpsing at it so far, I already wondered why there
isn't a memory barrier in the final accessor to the register.
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next prev parent reply other threads:[~2023-09-19 10:20 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-13 23:29 [PATCH v2] i2c: designware: Fix corrupted memory seen in the ISR Jan Bottorff
2023-09-14 18:46 ` Andy Shevchenko
2023-09-14 18:47 ` Andy Shevchenko
2023-09-14 20:52 ` Jan Bottorff
2023-09-15 12:44 ` Jarkko Nikula
2023-09-15 15:21 ` Serge Semin
2023-09-16 1:47 ` Jan Bottorff
2023-09-17 0:01 ` Serge Semin
2023-09-17 20:08 ` Yann Sionneau
2023-09-18 23:14 ` Serge Semin
2023-09-19 3:45 ` Jan Bottorff
2023-09-19 9:55 ` Catalin Marinas
2023-09-19 10:19 ` Wolfram Sang [this message]
2023-09-19 12:38 ` Yann Sionneau
2023-09-19 14:51 ` Catalin Marinas
2023-09-19 14:55 ` Wolfram Sang
2023-09-19 18:54 ` Jan Bottorff
2023-09-19 21:05 ` Serge Semin
2023-09-20 9:08 ` Wolfram Sang
2023-09-20 13:27 ` Yann Sionneau
2023-09-20 19:14 ` Jan Bottorff
2023-09-25 12:54 ` Serge Semin
2023-09-25 19:39 ` Jan Bottorff
2023-09-27 19:38 ` Wolfram Sang
2023-09-29 8:48 ` Jarkko Nikula
2023-10-26 11:18 ` Wolfram Sang
2023-10-31 0:12 ` Jan Bottorff
2023-10-31 5:51 ` Wolfram Sang
2023-10-31 8:44 ` Yann Sionneau
2023-10-31 12:10 ` Jarkko Nikula
2023-10-31 13:06 ` Serge Semin
2023-11-01 16:51 ` Jan Bottorff
2023-09-20 11:03 ` Catalin Marinas
2023-09-20 10:44 ` Catalin Marinas
2023-09-20 11:05 ` Catalin Marinas
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