From: Wolfram Sang <wsa@kernel.org>
To: Serge Semin <fancer.lancer@gmail.com>
Cc: Jan Bottorff <janb@os.amperecomputing.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Yann Sionneau <ysionneau@kalrayinc.com>,
Yann Sionneau <yann@sionneau.net>, Will Deacon <will@kernel.org>,
Jarkko Nikula <jarkko.nikula@linux.intel.com>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Jan Dabros <jsd@semihalf.com>, Andi Shyti <andi.shyti@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] i2c: designware: Fix corrupted memory seen in the ISR
Date: Wed, 20 Sep 2023 11:08:01 +0200 [thread overview]
Message-ID: <ZQq2cT+/QCenR5gx@shikoro> (raw)
In-Reply-To: <p7wl7fk4cdyhvw2mfsa6sfc7dhfls3foplmzwj6pzstargt2oh@33zuuznup2gq>
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> same thread." [1] Thus I'd suggest the next fix for the problem:
>
> --- a/drivers/i2c/busses/i2c-designware-common.c
> +++ b/drivers/i2c/busses/i2c-designware-common.c
> @@ -72,7 +72,10 @@ static int dw_reg_write(void *context, unsigned int reg, unsigned int val)
> {
> struct dw_i2c_dev *dev = context;
>
> - writel_relaxed(val, dev->base + reg);
> + if (reg == DW_IC_INTR_MASK)
> + writel(val, dev->base + reg);
> + else
> + writel_relaxed(val, dev->base + reg);
>
> return 0;
> }
>
> (and similar changes for dw_reg_write_swab() and dw_reg_write_word().)
>
> What do you think?
To me, this looks reasonable and much more what I would have expected as
a result (from a high level point of view). Let's hope it works. I am
optimistic, though...
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next prev parent reply other threads:[~2023-09-20 9:08 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-13 23:29 [PATCH v2] i2c: designware: Fix corrupted memory seen in the ISR Jan Bottorff
2023-09-14 18:46 ` Andy Shevchenko
2023-09-14 18:47 ` Andy Shevchenko
2023-09-14 20:52 ` Jan Bottorff
2023-09-15 12:44 ` Jarkko Nikula
2023-09-15 15:21 ` Serge Semin
2023-09-16 1:47 ` Jan Bottorff
2023-09-17 0:01 ` Serge Semin
2023-09-17 20:08 ` Yann Sionneau
2023-09-18 23:14 ` Serge Semin
2023-09-19 3:45 ` Jan Bottorff
2023-09-19 9:55 ` Catalin Marinas
2023-09-19 10:19 ` Wolfram Sang
2023-09-19 12:38 ` Yann Sionneau
2023-09-19 14:51 ` Catalin Marinas
2023-09-19 14:55 ` Wolfram Sang
2023-09-19 18:54 ` Jan Bottorff
2023-09-19 21:05 ` Serge Semin
2023-09-20 9:08 ` Wolfram Sang [this message]
2023-09-20 13:27 ` Yann Sionneau
2023-09-20 19:14 ` Jan Bottorff
2023-09-25 12:54 ` Serge Semin
2023-09-25 19:39 ` Jan Bottorff
2023-09-27 19:38 ` Wolfram Sang
2023-09-29 8:48 ` Jarkko Nikula
2023-10-26 11:18 ` Wolfram Sang
2023-10-31 0:12 ` Jan Bottorff
2023-10-31 5:51 ` Wolfram Sang
2023-10-31 8:44 ` Yann Sionneau
2023-10-31 12:10 ` Jarkko Nikula
2023-10-31 13:06 ` Serge Semin
2023-11-01 16:51 ` Jan Bottorff
2023-09-20 11:03 ` Catalin Marinas
2023-09-20 10:44 ` Catalin Marinas
2023-09-20 11:05 ` Catalin Marinas
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