From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
To: <linux-i2c@vger.kernel.org>
Cc: <michal.simek@xilinx.com>, <git-dev@amd.com>,
Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>,
Chirag Parekh <chiragp@xilinx.com>,
Robert Hancock <robert.hancock@calian.com>
Subject: [PATCH v3] i2c: cadence: Add standard bus recovery support
Date: Thu, 28 Jul 2022 11:21:50 +0530 [thread overview]
Message-ID: <20220728055150.18368-1-shubhrajyoti.datta@xilinx.com> (raw)
Hook up the standard GPIO/pinctrl-based recovery support.
We are doing the recovery at the beginning on a timeout.
Multiple people have contributed to the series.
Original patch from Cirag and another one from Robert.
Cc: Chirag Parekh <chiragp@xilinx.com>
Cc: Robert Hancock <robert.hancock@calian.com>
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
---
v2:
Updated the busbusy check on a timeout
v3:
Added pinctrl_get
Did unit testing and probed the scl to see the clock pulses.
drivers/i2c/busses/i2c-cadence.c | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-cadence.c b/drivers/i2c/busses/i2c-cadence.c
index 630cfa4ddd46..c9a10d4297a9 100644
--- a/drivers/i2c/busses/i2c-cadence.c
+++ b/drivers/i2c/busses/i2c-cadence.c
@@ -10,10 +10,12 @@
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/io.h>
+#include <linux/iopoll.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/pm_runtime.h>
+#include <linux/pinctrl/consumer.h>
/* Register offsets for the I2C device. */
#define CDNS_I2C_CR_OFFSET 0x00 /* Control Register, RW */
@@ -127,6 +129,8 @@
#define CDNS_I2C_TIMEOUT_MAX 0xFF
#define CDNS_I2C_BROKEN_HOLD_BIT BIT(0)
+#define CDNS_I2C_POLL_US 100000
+#define CDNS_I2C_TIMEOUT_US 500000
#define cdns_i2c_readreg(offset) readl_relaxed(id->membase + offset)
#define cdns_i2c_writereg(val, offset) writel_relaxed(val, id->membase + offset)
@@ -204,6 +208,7 @@ struct cdns_i2c {
struct notifier_block clk_rate_change_nb;
u32 quirks;
u32 ctrl_reg;
+ struct i2c_bus_recovery_info rinfo;
#if IS_ENABLED(CONFIG_I2C_SLAVE)
u16 ctrl_reg_diva_divb;
struct i2c_client *slave;
@@ -832,8 +837,14 @@ static int cdns_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
#endif
/* Check if the bus is free */
- if (cdns_i2c_readreg(CDNS_I2C_SR_OFFSET) & CDNS_I2C_SR_BA) {
+
+ ret = readl_relaxed_poll_timeout(id->membase + CDNS_I2C_SR_OFFSET,
+ reg,
+ !(reg & CDNS_I2C_SR_BA),
+ CDNS_I2C_POLL_US, CDNS_I2C_TIMEOUT_US);
+ if (ret) {
ret = -EAGAIN;
+ i2c_recover_bus(adap);
goto out;
}
@@ -1242,6 +1253,12 @@ static int cdns_i2c_probe(struct platform_device *pdev)
id->quirks = data->quirks;
}
+ id->rinfo.pinctrl = devm_pinctrl_get(&pdev->dev);
+ if (IS_ERR(id->rinfo.pinctrl)) {
+ dev_info(&pdev->dev, "can't get pinctrl, bus recovery not supported\n");
+ return PTR_ERR(id->rinfo.pinctrl);
+ }
+
id->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &r_mem);
if (IS_ERR(id->membase))
return PTR_ERR(id->membase);
@@ -1258,6 +1275,7 @@ static int cdns_i2c_probe(struct platform_device *pdev)
id->adap.retries = 3; /* Default retry value. */
id->adap.algo_data = id;
id->adap.dev.parent = &pdev->dev;
+ id->adap.bus_recovery_info = &id->rinfo;
init_completion(&id->xfer_done);
snprintf(id->adap.name, sizeof(id->adap.name),
"Cadence I2C at %08lx", (unsigned long)r_mem->start);
--
2.17.1
next reply other threads:[~2022-07-28 5:52 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-28 5:51 Shubhrajyoti Datta [this message]
2022-07-29 10:56 ` [PATCH v3] i2c: cadence: Add standard bus recovery support Michal Simek
2022-07-29 11:05 ` Datta, Shubhrajyoti
2022-07-29 11:17 ` Michal Simek
2022-09-27 7:06 ` Michal Simek
2022-09-27 20:32 ` Wolfram Sang
2022-09-27 20:35 ` Wolfram Sang
2022-09-29 7:29 ` Michal Simek
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