From: Vasant Hegde via iommu <iommu@lists.linux-foundation.org>
To: <iommu@lists.linux-foundation.org>
Cc: Vasant Hegde <vasant.hegde@amd.com>
Subject: [PATCH v2 18/37] iommu/amd: Update amd_irte_ops functions
Date: Mon, 25 Apr 2022 17:03:56 +0530 [thread overview]
Message-ID: <20220425113415.24087-19-vasant.hegde@amd.com> (raw)
In-Reply-To: <20220425113415.24087-1-vasant.hegde@amd.com>
From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Pass amd_iommu structure as one of the parameter to amd_irte_ops functions
since its needed to activate/deactivate the iommu.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
---
drivers/iommu/amd/amd_iommu_types.h | 6 ++--
drivers/iommu/amd/iommu.c | 51 ++++++++++++-----------------
2 files changed, 24 insertions(+), 33 deletions(-)
diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index 0ef9ecb8d3fc..990272a470aa 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -999,9 +999,9 @@ struct amd_ir_data {
struct amd_irte_ops {
void (*prepare)(void *, u32, bool, u8, u32, int);
- void (*activate)(void *, u16, u16);
- void (*deactivate)(void *, u16, u16);
- void (*set_affinity)(void *, u16, u16, u8, u32);
+ void (*activate)(struct amd_iommu *iommu, void *, u16, u16);
+ void (*deactivate)(struct amd_iommu *iommu, void *, u16, u16);
+ void (*set_affinity)(struct amd_iommu *iommu, void *, u16, u16, u8, u32);
void *(*get)(struct irq_remap_table *, int);
void (*set_allocated)(struct irq_remap_table *, int);
bool (*is_allocated)(struct irq_remap_table *, int);
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index b34d0851866b..ecace06d61cb 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -2932,19 +2932,14 @@ static int alloc_irq_index(u16 devid, int count, bool align,
return index;
}
-static int modify_irte_ga(u16 devid, int index, struct irte_ga *irte,
- struct amd_ir_data *data)
+static int modify_irte_ga(struct amd_iommu *iommu, u16 devid, int index,
+ struct irte_ga *irte, struct amd_ir_data *data)
{
bool ret;
struct irq_remap_table *table;
- struct amd_iommu *iommu;
unsigned long flags;
struct irte_ga *entry;
- iommu = amd_iommu_rlookup_table[devid];
- if (iommu == NULL)
- return -EINVAL;
-
table = get_irq_table(iommu, devid);
if (!table)
return -ENOMEM;
@@ -2976,16 +2971,12 @@ static int modify_irte_ga(u16 devid, int index, struct irte_ga *irte,
return 0;
}
-static int modify_irte(u16 devid, int index, union irte *irte)
+static int modify_irte(struct amd_iommu *iommu,
+ u16 devid, int index, union irte *irte)
{
struct irq_remap_table *table;
- struct amd_iommu *iommu;
unsigned long flags;
- iommu = amd_iommu_rlookup_table[devid];
- if (iommu == NULL)
- return -EINVAL;
-
table = get_irq_table(iommu, devid);
if (!table)
return -ENOMEM;
@@ -3047,49 +3038,49 @@ static void irte_ga_prepare(void *entry,
irte->lo.fields_remap.valid = 1;
}
-static void irte_activate(void *entry, u16 devid, u16 index)
+static void irte_activate(struct amd_iommu *iommu, void *entry, u16 devid, u16 index)
{
union irte *irte = (union irte *) entry;
irte->fields.valid = 1;
- modify_irte(devid, index, irte);
+ modify_irte(iommu, devid, index, irte);
}
-static void irte_ga_activate(void *entry, u16 devid, u16 index)
+static void irte_ga_activate(struct amd_iommu *iommu, void *entry, u16 devid, u16 index)
{
struct irte_ga *irte = (struct irte_ga *) entry;
irte->lo.fields_remap.valid = 1;
- modify_irte_ga(devid, index, irte, NULL);
+ modify_irte_ga(iommu, devid, index, irte, NULL);
}
-static void irte_deactivate(void *entry, u16 devid, u16 index)
+static void irte_deactivate(struct amd_iommu *iommu, void *entry, u16 devid, u16 index)
{
union irte *irte = (union irte *) entry;
irte->fields.valid = 0;
- modify_irte(devid, index, irte);
+ modify_irte(iommu, devid, index, irte);
}
-static void irte_ga_deactivate(void *entry, u16 devid, u16 index)
+static void irte_ga_deactivate(struct amd_iommu *iommu, void *entry, u16 devid, u16 index)
{
struct irte_ga *irte = (struct irte_ga *) entry;
irte->lo.fields_remap.valid = 0;
- modify_irte_ga(devid, index, irte, NULL);
+ modify_irte_ga(iommu, devid, index, irte, NULL);
}
-static void irte_set_affinity(void *entry, u16 devid, u16 index,
+static void irte_set_affinity(struct amd_iommu *iommu, void *entry, u16 devid, u16 index,
u8 vector, u32 dest_apicid)
{
union irte *irte = (union irte *) entry;
irte->fields.vector = vector;
irte->fields.destination = dest_apicid;
- modify_irte(devid, index, irte);
+ modify_irte(iommu, devid, index, irte);
}
-static void irte_ga_set_affinity(void *entry, u16 devid, u16 index,
+static void irte_ga_set_affinity(struct amd_iommu *iommu, void *entry, u16 devid, u16 index,
u8 vector, u32 dest_apicid)
{
struct irte_ga *irte = (struct irte_ga *) entry;
@@ -3100,7 +3091,7 @@ static void irte_ga_set_affinity(void *entry, u16 devid, u16 index,
APICID_TO_IRTE_DEST_LO(dest_apicid);
irte->hi.fields.destination =
APICID_TO_IRTE_DEST_HI(dest_apicid);
- modify_irte_ga(devid, index, irte, NULL);
+ modify_irte_ga(iommu, devid, index, irte, NULL);
}
}
@@ -3389,7 +3380,7 @@ static int irq_remapping_activate(struct irq_domain *domain,
if (!iommu)
return 0;
- iommu->irte_ops->activate(data->entry, irte_info->devid,
+ iommu->irte_ops->activate(iommu, data->entry, irte_info->devid,
irte_info->index);
amd_ir_update_irte(irq_data, iommu, data, irte_info, cfg);
return 0;
@@ -3403,7 +3394,7 @@ static void irq_remapping_deactivate(struct irq_domain *domain,
struct amd_iommu *iommu = data->iommu;
if (iommu)
- iommu->irte_ops->deactivate(data->entry, irte_info->devid,
+ iommu->irte_ops->deactivate(iommu, data->entry, irte_info->devid,
irte_info->index);
}
@@ -3458,7 +3449,7 @@ int amd_iommu_activate_guest_mode(void *data)
entry->hi.fields.vector = ir_data->ga_vector;
entry->lo.fields_vapic.ga_tag = ir_data->ga_tag;
- return modify_irte_ga(ir_data->irq_2_irte.devid,
+ return modify_irte_ga(ir_data->iommu, ir_data->irq_2_irte.devid,
ir_data->irq_2_irte.index, entry, ir_data);
}
EXPORT_SYMBOL(amd_iommu_activate_guest_mode);
@@ -3488,7 +3479,7 @@ int amd_iommu_deactivate_guest_mode(void *data)
entry->hi.fields.destination =
APICID_TO_IRTE_DEST_HI(cfg->dest_apicid);
- return modify_irte_ga(ir_data->irq_2_irte.devid,
+ return modify_irte_ga(ir_data->iommu, ir_data->irq_2_irte.devid,
ir_data->irq_2_irte.index, entry, ir_data);
}
EXPORT_SYMBOL(amd_iommu_deactivate_guest_mode);
@@ -3560,7 +3551,7 @@ static void amd_ir_update_irte(struct irq_data *irqd, struct amd_iommu *iommu,
* Atomically updates the IRTE with the new destination, vector
* and flushes the interrupt entry cache.
*/
- iommu->irte_ops->set_affinity(ir_data->entry, irte_info->devid,
+ iommu->irte_ops->set_affinity(iommu, ir_data->entry, irte_info->devid,
irte_info->index, cfg->vector,
cfg->dest_apicid);
}
--
2.27.0
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next prev parent reply other threads:[~2022-04-25 11:39 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-25 11:33 [PATCH v2 00/37] iommu/amd: Add multiple PCI segments support Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 01/37] iommu/amd: Update struct iommu_dev_data defination Vasant Hegde via iommu
2022-04-28 9:55 ` Joerg Roedel
2022-04-29 14:34 ` Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 02/37] iommu/amd: Introduce pci segment structure Vasant Hegde via iommu
2022-04-28 9:54 ` Joerg Roedel
2022-04-29 14:41 ` Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 03/37] iommu/amd: Introduce per PCI segment device table Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 04/37] iommu/amd: Introduce per PCI segment rlookup table Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 05/37] iommu/amd: Introduce per PCI segment irq_lookup_table Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 06/37] iommu/amd: Introduce per PCI segment dev_data_list Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 07/37] iommu/amd: Introduce per PCI segment old_dev_tbl_cpy Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 08/37] iommu/amd: Introduce per PCI segment alias_table Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 09/37] iommu/amd: Introduce per PCI segment unity map list Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 10/37] iommu/amd: Introduce per PCI segment last_bdf Vasant Hegde via iommu
2022-04-28 10:10 ` Joerg Roedel
2022-04-29 14:45 ` Vasant Hegde via iommu
2022-05-02 10:54 ` Joerg Roedel
2022-05-05 9:09 ` Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 11/37] iommu/amd: Introduce per PCI segment device table size Vasant Hegde via iommu
2022-04-28 10:14 ` Joerg Roedel
2022-04-25 11:33 ` [PATCH v2 12/37] iommu/amd: Introduce per PCI segment alias " Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 13/37] iommu/amd: Introduce per PCI segment rlookup " Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 14/37] iommu/amd: Convert to use per PCI segment irq_lookup_table Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 15/37] iommu/amd: Convert to use rlookup_amd_iommu helper function Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 16/37] iommu/amd: Update irq_remapping_alloc to use IOMMU lookup " Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 17/37] iommu/amd: Introduce struct amd_ir_data.iommu Vasant Hegde via iommu
2022-04-25 11:33 ` Vasant Hegde via iommu [this message]
2022-04-25 11:33 ` [PATCH v2 19/37] iommu/amd: Update alloc_irq_table and alloc_irq_index Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 20/37] iommu/amd: Convert to use per PCI segment rlookup_table Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 21/37] iommu/amd: Update set_dte_entry and clear_dte_entry Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 22/37] iommu/amd: Update iommu_ignore_device Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 23/37] iommu/amd: Update dump_dte_entry Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 24/37] iommu/amd: Update set_dte_irq_entry Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 25/37] iommu/amd: Update (un)init_device_table_dma() Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 26/37] iommu/amd: Update set_dev_entry_bit() and get_dev_entry_bit() Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 27/37] iommu/amd: Remove global amd_iommu_dev_table Vasant Hegde via iommu
2022-04-28 10:15 ` Joerg Roedel
2022-04-29 14:39 ` Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 28/37] iommu/amd: Remove global amd_iommu_alias_table Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 29/37] iommu/amd: Remove global amd_iommu_last_bdf Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 30/37] iommu/amd: Flush upto last_bdf only Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 31/37] iommu/amd: Introduce get_device_sbdf_id() helper function Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 32/37] iommu/amd: Include PCI segment ID when initialize IOMMU Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 33/37] iommu/amd: Specify PCI segment ID when getting pci device Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 34/37] iommu/amd: Add PCI segment support for ivrs_ioapic, ivrs_hpet, ivrs_acpihid commands Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 35/37] iommu/amd: Print PCI segment ID in error log messages Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 36/37] iommu/amd: Update device_state structure to include PCI seg ID Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 37/37] iommu/amd: Update amd_iommu_fault " Vasant Hegde via iommu
2022-04-28 10:19 ` Joerg Roedel
2022-04-29 14:37 ` Vasant Hegde via iommu
2022-04-28 10:22 ` [PATCH v2 00/37] iommu/amd: Add multiple PCI segments support Joerg Roedel
2022-04-29 14:35 ` Vasant Hegde via iommu
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