From: Vasant Hegde via iommu <iommu@lists.linux-foundation.org>
To: <iommu@lists.linux-foundation.org>
Cc: Vasant Hegde <vasant.hegde@amd.com>
Subject: [PATCH v2 08/37] iommu/amd: Introduce per PCI segment alias_table
Date: Mon, 25 Apr 2022 17:03:46 +0530 [thread overview]
Message-ID: <20220425113415.24087-9-vasant.hegde@amd.com> (raw)
In-Reply-To: <20220425113415.24087-1-vasant.hegde@amd.com>
From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
This will replace global alias table (amd_iommu_alias_table).
Co-developed-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
drivers/iommu/amd/amd_iommu_types.h | 7 +++++
drivers/iommu/amd/init.c | 41 ++++++++++++++++++++++-------
drivers/iommu/amd/iommu.c | 41 ++++++++++++++++++-----------
3 files changed, 64 insertions(+), 25 deletions(-)
diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index 330bb346207a..f9776f188e36 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -572,6 +572,13 @@ struct amd_iommu_pci_seg {
* will be copied to. It's only be used in kdump kernel.
*/
struct dev_table_entry *old_dev_tbl_cpy;
+
+ /*
+ * The alias table is a driver specific data structure which contains the
+ * mappings of the PCI device ids to the actual requestor ids on the IOMMU.
+ * More than one device can share the same requestor id.
+ */
+ u16 *alias_table;
};
/*
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index af413738da01..fe31de6e764c 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -698,6 +698,31 @@ static inline void free_irq_lookup_table(struct amd_iommu_pci_seg *pci_seg)
pci_seg->irq_lookup_table = NULL;
}
+static int __init alloc_alias_table(struct amd_iommu_pci_seg *pci_seg)
+{
+ int i;
+
+ pci_seg->alias_table = (void *)__get_free_pages(GFP_KERNEL,
+ get_order(alias_table_size));
+ if (!pci_seg->alias_table)
+ return -ENOMEM;
+
+ /*
+ * let all alias entries point to itself
+ */
+ for (i = 0; i <= amd_iommu_last_bdf; ++i)
+ pci_seg->alias_table[i] = i;
+
+ return 0;
+}
+
+static void __init free_alias_table(struct amd_iommu_pci_seg *pci_seg)
+{
+ free_pages((unsigned long)pci_seg->alias_table,
+ get_order(alias_table_size));
+ pci_seg->alias_table = NULL;
+}
+
/*
* Allocates the command buffer. This buffer is per AMD IOMMU. We can
* write commands to that buffer later and the IOMMU will execute them
@@ -1266,6 +1291,7 @@ static int __init init_iommu_from_acpi(struct amd_iommu *iommu,
u32 dev_i, ext_flags = 0;
bool alias = false;
struct ivhd_entry *e;
+ struct amd_iommu_pci_seg *pci_seg = iommu->pci_seg;
u32 ivhd_size;
int ret;
@@ -1347,7 +1373,7 @@ static int __init init_iommu_from_acpi(struct amd_iommu *iommu,
devid_to = e->ext >> 8;
set_dev_entry_from_acpi(iommu, devid , e->flags, 0);
set_dev_entry_from_acpi(iommu, devid_to, e->flags, 0);
- amd_iommu_alias_table[devid] = devid_to;
+ pci_seg->alias_table[devid] = devid_to;
break;
case IVHD_DEV_ALIAS_RANGE:
@@ -1405,7 +1431,7 @@ static int __init init_iommu_from_acpi(struct amd_iommu *iommu,
devid = e->devid;
for (dev_i = devid_start; dev_i <= devid; ++dev_i) {
if (alias) {
- amd_iommu_alias_table[dev_i] = devid_to;
+ pci_seg->alias_table[dev_i] = devid_to;
set_dev_entry_from_acpi(iommu,
devid_to, flags, ext_flags);
}
@@ -1540,6 +1566,8 @@ static struct amd_iommu_pci_seg *__init alloc_pci_segment(u16 id)
if (alloc_dev_table(pci_seg))
return NULL;
+ if (alloc_alias_table(pci_seg))
+ return NULL;
if (alloc_rlookup_table(pci_seg))
return NULL;
@@ -1566,6 +1594,7 @@ static void __init free_pci_segment(void)
list_del(&pci_seg->list);
free_irq_lookup_table(pci_seg);
free_rlookup_table(pci_seg);
+ free_alias_table(pci_seg);
free_dev_table(pci_seg);
kfree(pci_seg);
}
@@ -2838,7 +2867,7 @@ static void __init ivinfo_init(void *ivrs)
static int __init early_amd_iommu_init(void)
{
struct acpi_table_header *ivrs_base;
- int i, remap_cache_sz, ret;
+ int remap_cache_sz, ret;
acpi_status status;
if (!amd_iommu_detected)
@@ -2909,12 +2938,6 @@ static int __init early_amd_iommu_init(void)
if (amd_iommu_pd_alloc_bitmap == NULL)
goto out;
- /*
- * let all alias entries point to itself
- */
- for (i = 0; i <= amd_iommu_last_bdf; ++i)
- amd_iommu_alias_table[i] = i;
-
/*
* never allocate domain 0 because its used as the non-allocated and
* error value placeholder
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 63728e34e044..c6058b6f2538 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -243,7 +243,7 @@ static int clone_alias(struct pci_dev *pdev, u16 alias, void *data)
return 0;
}
-static void clone_aliases(struct device *dev)
+static void clone_aliases(struct amd_iommu *iommu, struct device *dev)
{
struct pci_dev *pdev;
@@ -256,14 +256,15 @@ static void clone_aliases(struct device *dev)
* part of the PCI DMA aliases if it's bus differs
* from the original device.
*/
- clone_alias(pdev, amd_iommu_alias_table[pci_dev_id(pdev)], NULL);
+ clone_alias(pdev, iommu->pci_seg->alias_table[pci_dev_id(pdev)], NULL);
pci_for_each_dma_alias(pdev, clone_alias, NULL);
}
-static void setup_aliases(struct device *dev)
+static void setup_aliases(struct amd_iommu *iommu, struct device *dev)
{
struct pci_dev *pdev = to_pci_dev(dev);
+ struct amd_iommu_pci_seg *pci_seg = iommu->pci_seg;
u16 ivrs_alias;
/* For ACPI HID devices, there are no aliases */
@@ -274,12 +275,12 @@ static void setup_aliases(struct device *dev)
* Add the IVRS alias to the pci aliases if it is on the same
* bus. The IVRS table may know about a quirk that we don't.
*/
- ivrs_alias = amd_iommu_alias_table[pci_dev_id(pdev)];
+ ivrs_alias = pci_seg->alias_table[pci_dev_id(pdev)];
if (ivrs_alias != pci_dev_id(pdev) &&
PCI_BUS_NUM(ivrs_alias) == pdev->bus->number)
pci_add_dma_alias(pdev, ivrs_alias & 0xff, 1);
- clone_aliases(dev);
+ clone_aliases(iommu, dev);
}
static struct iommu_dev_data *find_dev_data(u16 devid)
@@ -371,7 +372,7 @@ static bool check_device(struct device *dev)
return true;
}
-static int iommu_init_device(struct device *dev)
+static int iommu_init_device(struct amd_iommu *iommu, struct device *dev)
{
struct iommu_dev_data *dev_data;
int devid;
@@ -388,7 +389,7 @@ static int iommu_init_device(struct device *dev)
return -ENOMEM;
dev_data->dev = dev;
- setup_aliases(dev);
+ setup_aliases(iommu, dev);
/*
* By default we use passthrough mode for IOMMUv2 capable device.
@@ -409,7 +410,7 @@ static int iommu_init_device(struct device *dev)
return 0;
}
-static void iommu_ignore_device(struct device *dev)
+static void iommu_ignore_device(struct amd_iommu *iommu, struct device *dev)
{
int devid;
@@ -420,7 +421,7 @@ static void iommu_ignore_device(struct device *dev)
amd_iommu_rlookup_table[devid] = NULL;
memset(&amd_iommu_dev_table[devid], 0, sizeof(struct dev_table_entry));
- setup_aliases(dev);
+ setup_aliases(iommu, dev);
}
static void amd_iommu_uninit_device(struct device *dev)
@@ -1290,6 +1291,7 @@ static int device_flush_dte(struct iommu_dev_data *dev_data)
{
struct amd_iommu *iommu;
struct pci_dev *pdev = NULL;
+ struct amd_iommu_pci_seg *pci_seg;
u16 alias;
int ret;
@@ -1306,7 +1308,8 @@ static int device_flush_dte(struct iommu_dev_data *dev_data)
if (ret)
return ret;
- alias = amd_iommu_alias_table[dev_data->devid];
+ pci_seg = iommu->pci_seg;
+ alias = pci_seg->alias_table[dev_data->devid];
if (alias != dev_data->devid) {
ret = iommu_flush_dte(iommu, alias);
if (ret)
@@ -1622,7 +1625,7 @@ static void do_attach(struct iommu_dev_data *dev_data,
/* Update device table */
set_dte_entry(dev_data->devid, domain,
ats, dev_data->iommu_v2);
- clone_aliases(dev_data->dev);
+ clone_aliases(iommu, dev_data->dev);
device_flush_dte(dev_data);
}
@@ -1638,7 +1641,7 @@ static void do_detach(struct iommu_dev_data *dev_data)
dev_data->domain = NULL;
list_del(&dev_data->list);
clear_dte_entry(dev_data->devid);
- clone_aliases(dev_data->dev);
+ clone_aliases(iommu, dev_data->dev);
/* Flush the DTE entry */
device_flush_dte(dev_data);
@@ -1821,12 +1824,12 @@ static struct iommu_device *amd_iommu_probe_device(struct device *dev)
if (dev_iommu_priv_get(dev))
return &iommu->iommu;
- ret = iommu_init_device(dev);
+ ret = iommu_init_device(iommu, dev);
if (ret) {
if (ret != -ENOTSUPP)
dev_err(dev, "Failed to initialize - trying to proceed anyway\n");
iommu_dev = ERR_PTR(ret);
- iommu_ignore_device(dev);
+ iommu_ignore_device(iommu, dev);
} else {
amd_iommu_set_pci_msi_domain(dev, iommu);
iommu_dev = &iommu->iommu;
@@ -1877,9 +1880,13 @@ static void update_device_table(struct protection_domain *domain)
struct iommu_dev_data *dev_data;
list_for_each_entry(dev_data, &domain->dev_list, list) {
+ struct amd_iommu *iommu = rlookup_amd_iommu(dev_data->dev);
+
+ if (!iommu)
+ continue;
set_dte_entry(dev_data->devid, domain,
dev_data->ats.enabled, dev_data->iommu_v2);
- clone_aliases(dev_data->dev);
+ clone_aliases(iommu, dev_data->dev);
}
}
@@ -2781,6 +2788,7 @@ static struct irq_remap_table *alloc_irq_table(u16 devid, struct pci_dev *pdev)
{
struct irq_remap_table *table = NULL;
struct irq_remap_table *new_table = NULL;
+ struct amd_iommu_pci_seg *pci_seg;
struct amd_iommu *iommu;
unsigned long flags;
u16 alias;
@@ -2791,11 +2799,12 @@ static struct irq_remap_table *alloc_irq_table(u16 devid, struct pci_dev *pdev)
if (!iommu)
goto out_unlock;
+ pci_seg = iommu->pci_seg;
table = irq_lookup_table[devid];
if (table)
goto out_unlock;
- alias = amd_iommu_alias_table[devid];
+ alias = pci_seg->alias_table[devid];
table = irq_lookup_table[alias];
if (table) {
set_remap_table_entry(iommu, devid, table);
--
2.27.0
_______________________________________________
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next prev parent reply other threads:[~2022-04-25 11:37 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-25 11:33 [PATCH v2 00/37] iommu/amd: Add multiple PCI segments support Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 01/37] iommu/amd: Update struct iommu_dev_data defination Vasant Hegde via iommu
2022-04-28 9:55 ` Joerg Roedel
2022-04-29 14:34 ` Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 02/37] iommu/amd: Introduce pci segment structure Vasant Hegde via iommu
2022-04-28 9:54 ` Joerg Roedel
2022-04-29 14:41 ` Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 03/37] iommu/amd: Introduce per PCI segment device table Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 04/37] iommu/amd: Introduce per PCI segment rlookup table Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 05/37] iommu/amd: Introduce per PCI segment irq_lookup_table Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 06/37] iommu/amd: Introduce per PCI segment dev_data_list Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 07/37] iommu/amd: Introduce per PCI segment old_dev_tbl_cpy Vasant Hegde via iommu
2022-04-25 11:33 ` Vasant Hegde via iommu [this message]
2022-04-25 11:33 ` [PATCH v2 09/37] iommu/amd: Introduce per PCI segment unity map list Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 10/37] iommu/amd: Introduce per PCI segment last_bdf Vasant Hegde via iommu
2022-04-28 10:10 ` Joerg Roedel
2022-04-29 14:45 ` Vasant Hegde via iommu
2022-05-02 10:54 ` Joerg Roedel
2022-05-05 9:09 ` Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 11/37] iommu/amd: Introduce per PCI segment device table size Vasant Hegde via iommu
2022-04-28 10:14 ` Joerg Roedel
2022-04-25 11:33 ` [PATCH v2 12/37] iommu/amd: Introduce per PCI segment alias " Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 13/37] iommu/amd: Introduce per PCI segment rlookup " Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 14/37] iommu/amd: Convert to use per PCI segment irq_lookup_table Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 15/37] iommu/amd: Convert to use rlookup_amd_iommu helper function Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 16/37] iommu/amd: Update irq_remapping_alloc to use IOMMU lookup " Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 17/37] iommu/amd: Introduce struct amd_ir_data.iommu Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 18/37] iommu/amd: Update amd_irte_ops functions Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 19/37] iommu/amd: Update alloc_irq_table and alloc_irq_index Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 20/37] iommu/amd: Convert to use per PCI segment rlookup_table Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 21/37] iommu/amd: Update set_dte_entry and clear_dte_entry Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 22/37] iommu/amd: Update iommu_ignore_device Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 23/37] iommu/amd: Update dump_dte_entry Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 24/37] iommu/amd: Update set_dte_irq_entry Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 25/37] iommu/amd: Update (un)init_device_table_dma() Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 26/37] iommu/amd: Update set_dev_entry_bit() and get_dev_entry_bit() Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 27/37] iommu/amd: Remove global amd_iommu_dev_table Vasant Hegde via iommu
2022-04-28 10:15 ` Joerg Roedel
2022-04-29 14:39 ` Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 28/37] iommu/amd: Remove global amd_iommu_alias_table Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 29/37] iommu/amd: Remove global amd_iommu_last_bdf Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 30/37] iommu/amd: Flush upto last_bdf only Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 31/37] iommu/amd: Introduce get_device_sbdf_id() helper function Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 32/37] iommu/amd: Include PCI segment ID when initialize IOMMU Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 33/37] iommu/amd: Specify PCI segment ID when getting pci device Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 34/37] iommu/amd: Add PCI segment support for ivrs_ioapic, ivrs_hpet, ivrs_acpihid commands Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 35/37] iommu/amd: Print PCI segment ID in error log messages Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 36/37] iommu/amd: Update device_state structure to include PCI seg ID Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 37/37] iommu/amd: Update amd_iommu_fault " Vasant Hegde via iommu
2022-04-28 10:19 ` Joerg Roedel
2022-04-29 14:37 ` Vasant Hegde via iommu
2022-04-28 10:22 ` [PATCH v2 00/37] iommu/amd: Add multiple PCI segments support Joerg Roedel
2022-04-29 14:35 ` Vasant Hegde via iommu
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