From: Vasant Hegde via iommu <iommu@lists.linux-foundation.org>
To: <iommu@lists.linux-foundation.org>
Cc: Vasant Hegde <vasant.hegde@amd.com>
Subject: [PATCH v2 36/37] iommu/amd: Update device_state structure to include PCI seg ID
Date: Mon, 25 Apr 2022 17:04:14 +0530 [thread overview]
Message-ID: <20220425113415.24087-37-vasant.hegde@amd.com> (raw)
In-Reply-To: <20220425113415.24087-1-vasant.hegde@amd.com>
Rename struct device_state.devid variable to struct device_state.sbdf
and extend it to 32-bit to include the 16-bit PCI segment ID via
the helper function get_pci_sbdf_id().
Co-developed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
---
drivers/iommu/amd/iommu_v2.c | 58 +++++++++++++++---------------------
1 file changed, 24 insertions(+), 34 deletions(-)
diff --git a/drivers/iommu/amd/iommu_v2.c b/drivers/iommu/amd/iommu_v2.c
index e56b137ceabd..b186d33336e0 100644
--- a/drivers/iommu/amd/iommu_v2.c
+++ b/drivers/iommu/amd/iommu_v2.c
@@ -51,7 +51,7 @@ struct pasid_state {
struct device_state {
struct list_head list;
- u16 devid;
+ u32 sbdf;
atomic_t count;
struct pci_dev *pdev;
struct pasid_state **states;
@@ -83,35 +83,25 @@ static struct workqueue_struct *iommu_wq;
static void free_pasid_states(struct device_state *dev_state);
-static u16 device_id(struct pci_dev *pdev)
-{
- u16 devid;
-
- devid = pdev->bus->number;
- devid = (devid << 8) | pdev->devfn;
-
- return devid;
-}
-
-static struct device_state *__get_device_state(u16 devid)
+static struct device_state *__get_device_state(u32 sbdf)
{
struct device_state *dev_state;
list_for_each_entry(dev_state, &state_list, list) {
- if (dev_state->devid == devid)
+ if (dev_state->sbdf == sbdf)
return dev_state;
}
return NULL;
}
-static struct device_state *get_device_state(u16 devid)
+static struct device_state *get_device_state(u32 sbdf)
{
struct device_state *dev_state;
unsigned long flags;
spin_lock_irqsave(&state_lock, flags);
- dev_state = __get_device_state(devid);
+ dev_state = __get_device_state(sbdf);
if (dev_state != NULL)
atomic_inc(&dev_state->count);
spin_unlock_irqrestore(&state_lock, flags);
@@ -609,7 +599,7 @@ int amd_iommu_bind_pasid(struct pci_dev *pdev, u32 pasid,
struct pasid_state *pasid_state;
struct device_state *dev_state;
struct mm_struct *mm;
- u16 devid;
+ u32 sbdf;
int ret;
might_sleep();
@@ -617,8 +607,8 @@ int amd_iommu_bind_pasid(struct pci_dev *pdev, u32 pasid,
if (!amd_iommu_v2_supported())
return -ENODEV;
- devid = device_id(pdev);
- dev_state = get_device_state(devid);
+ sbdf = get_pci_sbdf_id(pdev);
+ dev_state = get_device_state(sbdf);
if (dev_state == NULL)
return -EINVAL;
@@ -692,15 +682,15 @@ void amd_iommu_unbind_pasid(struct pci_dev *pdev, u32 pasid)
{
struct pasid_state *pasid_state;
struct device_state *dev_state;
- u16 devid;
+ u32 sbdf;
might_sleep();
if (!amd_iommu_v2_supported())
return;
- devid = device_id(pdev);
- dev_state = get_device_state(devid);
+ sbdf = get_pci_sbdf_id(pdev);
+ dev_state = get_device_state(sbdf);
if (dev_state == NULL)
return;
@@ -742,7 +732,7 @@ int amd_iommu_init_device(struct pci_dev *pdev, int pasids)
struct iommu_group *group;
unsigned long flags;
int ret, tmp;
- u16 devid;
+ u32 sbdf;
might_sleep();
@@ -759,7 +749,7 @@ int amd_iommu_init_device(struct pci_dev *pdev, int pasids)
if (pasids <= 0 || pasids > (PASID_MASK + 1))
return -EINVAL;
- devid = device_id(pdev);
+ sbdf = get_pci_sbdf_id(pdev);
dev_state = kzalloc(sizeof(*dev_state), GFP_KERNEL);
if (dev_state == NULL)
@@ -768,7 +758,7 @@ int amd_iommu_init_device(struct pci_dev *pdev, int pasids)
spin_lock_init(&dev_state->lock);
init_waitqueue_head(&dev_state->wq);
dev_state->pdev = pdev;
- dev_state->devid = devid;
+ dev_state->sbdf = sbdf;
tmp = pasids;
for (dev_state->pasid_levels = 0; (tmp - 1) & ~0x1ff; tmp >>= 9)
@@ -806,7 +796,7 @@ int amd_iommu_init_device(struct pci_dev *pdev, int pasids)
spin_lock_irqsave(&state_lock, flags);
- if (__get_device_state(devid) != NULL) {
+ if (__get_device_state(sbdf) != NULL) {
spin_unlock_irqrestore(&state_lock, flags);
ret = -EBUSY;
goto out_free_domain;
@@ -838,16 +828,16 @@ void amd_iommu_free_device(struct pci_dev *pdev)
{
struct device_state *dev_state;
unsigned long flags;
- u16 devid;
+ u32 sbdf;
if (!amd_iommu_v2_supported())
return;
- devid = device_id(pdev);
+ sbdf = get_pci_sbdf_id(pdev);
spin_lock_irqsave(&state_lock, flags);
- dev_state = __get_device_state(devid);
+ dev_state = __get_device_state(sbdf);
if (dev_state == NULL) {
spin_unlock_irqrestore(&state_lock, flags);
return;
@@ -867,18 +857,18 @@ int amd_iommu_set_invalid_ppr_cb(struct pci_dev *pdev,
{
struct device_state *dev_state;
unsigned long flags;
- u16 devid;
+ u32 sbdf;
int ret;
if (!amd_iommu_v2_supported())
return -ENODEV;
- devid = device_id(pdev);
+ sbdf = get_pci_sbdf_id(pdev);
spin_lock_irqsave(&state_lock, flags);
ret = -EINVAL;
- dev_state = __get_device_state(devid);
+ dev_state = __get_device_state(sbdf);
if (dev_state == NULL)
goto out_unlock;
@@ -898,18 +888,18 @@ int amd_iommu_set_invalidate_ctx_cb(struct pci_dev *pdev,
{
struct device_state *dev_state;
unsigned long flags;
- u16 devid;
+ u32 sbdf;
int ret;
if (!amd_iommu_v2_supported())
return -ENODEV;
- devid = device_id(pdev);
+ sbdf = get_pci_sbdf_id(pdev);
spin_lock_irqsave(&state_lock, flags);
ret = -EINVAL;
- dev_state = __get_device_state(devid);
+ dev_state = __get_device_state(sbdf);
if (dev_state == NULL)
goto out_unlock;
--
2.27.0
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next prev parent reply other threads:[~2022-04-25 11:44 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-25 11:33 [PATCH v2 00/37] iommu/amd: Add multiple PCI segments support Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 01/37] iommu/amd: Update struct iommu_dev_data defination Vasant Hegde via iommu
2022-04-28 9:55 ` Joerg Roedel
2022-04-29 14:34 ` Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 02/37] iommu/amd: Introduce pci segment structure Vasant Hegde via iommu
2022-04-28 9:54 ` Joerg Roedel
2022-04-29 14:41 ` Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 03/37] iommu/amd: Introduce per PCI segment device table Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 04/37] iommu/amd: Introduce per PCI segment rlookup table Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 05/37] iommu/amd: Introduce per PCI segment irq_lookup_table Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 06/37] iommu/amd: Introduce per PCI segment dev_data_list Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 07/37] iommu/amd: Introduce per PCI segment old_dev_tbl_cpy Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 08/37] iommu/amd: Introduce per PCI segment alias_table Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 09/37] iommu/amd: Introduce per PCI segment unity map list Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 10/37] iommu/amd: Introduce per PCI segment last_bdf Vasant Hegde via iommu
2022-04-28 10:10 ` Joerg Roedel
2022-04-29 14:45 ` Vasant Hegde via iommu
2022-05-02 10:54 ` Joerg Roedel
2022-05-05 9:09 ` Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 11/37] iommu/amd: Introduce per PCI segment device table size Vasant Hegde via iommu
2022-04-28 10:14 ` Joerg Roedel
2022-04-25 11:33 ` [PATCH v2 12/37] iommu/amd: Introduce per PCI segment alias " Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 13/37] iommu/amd: Introduce per PCI segment rlookup " Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 14/37] iommu/amd: Convert to use per PCI segment irq_lookup_table Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 15/37] iommu/amd: Convert to use rlookup_amd_iommu helper function Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 16/37] iommu/amd: Update irq_remapping_alloc to use IOMMU lookup " Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 17/37] iommu/amd: Introduce struct amd_ir_data.iommu Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 18/37] iommu/amd: Update amd_irte_ops functions Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 19/37] iommu/amd: Update alloc_irq_table and alloc_irq_index Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 20/37] iommu/amd: Convert to use per PCI segment rlookup_table Vasant Hegde via iommu
2022-04-25 11:33 ` [PATCH v2 21/37] iommu/amd: Update set_dte_entry and clear_dte_entry Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 22/37] iommu/amd: Update iommu_ignore_device Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 23/37] iommu/amd: Update dump_dte_entry Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 24/37] iommu/amd: Update set_dte_irq_entry Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 25/37] iommu/amd: Update (un)init_device_table_dma() Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 26/37] iommu/amd: Update set_dev_entry_bit() and get_dev_entry_bit() Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 27/37] iommu/amd: Remove global amd_iommu_dev_table Vasant Hegde via iommu
2022-04-28 10:15 ` Joerg Roedel
2022-04-29 14:39 ` Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 28/37] iommu/amd: Remove global amd_iommu_alias_table Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 29/37] iommu/amd: Remove global amd_iommu_last_bdf Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 30/37] iommu/amd: Flush upto last_bdf only Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 31/37] iommu/amd: Introduce get_device_sbdf_id() helper function Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 32/37] iommu/amd: Include PCI segment ID when initialize IOMMU Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 33/37] iommu/amd: Specify PCI segment ID when getting pci device Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 34/37] iommu/amd: Add PCI segment support for ivrs_ioapic, ivrs_hpet, ivrs_acpihid commands Vasant Hegde via iommu
2022-04-25 11:34 ` [PATCH v2 35/37] iommu/amd: Print PCI segment ID in error log messages Vasant Hegde via iommu
2022-04-25 11:34 ` Vasant Hegde via iommu [this message]
2022-04-25 11:34 ` [PATCH v2 37/37] iommu/amd: Update amd_iommu_fault structure to include PCI seg ID Vasant Hegde via iommu
2022-04-28 10:19 ` Joerg Roedel
2022-04-29 14:37 ` Vasant Hegde via iommu
2022-04-28 10:22 ` [PATCH v2 00/37] iommu/amd: Add multiple PCI segments support Joerg Roedel
2022-04-29 14:35 ` Vasant Hegde via iommu
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