From: Vasant Hegde via iommu <iommu@lists.linux-foundation.org>
To: <joro@8bytes.org>, <iommu@lists.linux.dev>
Cc: iommu@lists.linux-foundation.org, Vasant Hegde <vasant.hegde@amd.com>
Subject: [PATCH v3 RESEND 01/35] iommu/amd: Update struct iommu_dev_data definition
Date: Wed, 6 Jul 2022 17:07:51 +0530 [thread overview]
Message-ID: <20220706113825.25582-2-vasant.hegde@amd.com> (raw)
In-Reply-To: <20220706113825.25582-1-vasant.hegde@amd.com>
struct iommu_dev_data contains member "pdev" to point to pci_dev. This is
valid for only PCI devices and for other devices this will be NULL. This
causes unnecessary "pdev != NULL" check at various places.
Replace "struct pci_dev" member with "struct device" and use to_pci_dev()
to get pci device reference as needed. Also adjust setup_aliases() and
clone_aliases() function.
No functional change intended.
Co-developed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
---
drivers/iommu/amd/amd_iommu_types.h | 2 +-
drivers/iommu/amd/iommu.c | 32 +++++++++++++++++------------
2 files changed, 20 insertions(+), 14 deletions(-)
diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index 72d0f5e2f651..9b563f850f1d 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -689,7 +689,7 @@ struct iommu_dev_data {
struct list_head list; /* For domain->dev_list */
struct llist_node dev_data_list; /* For global dev_data_list */
struct protection_domain *domain; /* Domain the device is bound to */
- struct pci_dev *pdev;
+ struct device *dev;
u16 devid; /* PCI Device ID */
bool iommu_v2; /* Device can make use of IOMMUv2 */
struct {
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 840831d5d2ad..efa8af5a9419 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -188,10 +188,13 @@ static int clone_alias(struct pci_dev *pdev, u16 alias, void *data)
return 0;
}
-static void clone_aliases(struct pci_dev *pdev)
+static void clone_aliases(struct device *dev)
{
- if (!pdev)
+ struct pci_dev *pdev;
+
+ if (!dev_is_pci(dev))
return;
+ pdev = to_pci_dev(dev);
/*
* The IVRS alias stored in the alias table may not be
@@ -203,14 +206,14 @@ static void clone_aliases(struct pci_dev *pdev)
pci_for_each_dma_alias(pdev, clone_alias, NULL);
}
-static struct pci_dev *setup_aliases(struct device *dev)
+static void setup_aliases(struct device *dev)
{
struct pci_dev *pdev = to_pci_dev(dev);
u16 ivrs_alias;
/* For ACPI HID devices, there are no aliases */
if (!dev_is_pci(dev))
- return NULL;
+ return;
/*
* Add the IVRS alias to the pci aliases if it is on the same
@@ -221,9 +224,7 @@ static struct pci_dev *setup_aliases(struct device *dev)
PCI_BUS_NUM(ivrs_alias) == pdev->bus->number)
pci_add_dma_alias(pdev, ivrs_alias & 0xff, 1);
- clone_aliases(pdev);
-
- return pdev;
+ clone_aliases(dev);
}
static struct iommu_dev_data *find_dev_data(u16 devid)
@@ -331,7 +332,8 @@ static int iommu_init_device(struct device *dev)
if (!dev_data)
return -ENOMEM;
- dev_data->pdev = setup_aliases(dev);
+ dev_data->dev = dev;
+ setup_aliases(dev);
/*
* By default we use passthrough mode for IOMMUv2 capable device.
@@ -1232,13 +1234,17 @@ static int device_flush_dte_alias(struct pci_dev *pdev, u16 alias, void *data)
static int device_flush_dte(struct iommu_dev_data *dev_data)
{
struct amd_iommu *iommu;
+ struct pci_dev *pdev = NULL;
u16 alias;
int ret;
iommu = amd_iommu_rlookup_table[dev_data->devid];
- if (dev_data->pdev)
- ret = pci_for_each_dma_alias(dev_data->pdev,
+ if (dev_is_pci(dev_data->dev))
+ pdev = to_pci_dev(dev_data->dev);
+
+ if (pdev)
+ ret = pci_for_each_dma_alias(pdev,
device_flush_dte_alias, iommu);
else
ret = iommu_flush_dte(iommu, dev_data->devid);
@@ -1561,7 +1567,7 @@ static void do_attach(struct iommu_dev_data *dev_data,
/* Update device table */
set_dte_entry(dev_data->devid, domain,
ats, dev_data->iommu_v2);
- clone_aliases(dev_data->pdev);
+ clone_aliases(dev_data->dev);
device_flush_dte(dev_data);
}
@@ -1577,7 +1583,7 @@ static void do_detach(struct iommu_dev_data *dev_data)
dev_data->domain = NULL;
list_del(&dev_data->list);
clear_dte_entry(dev_data->devid);
- clone_aliases(dev_data->pdev);
+ clone_aliases(dev_data->dev);
/* Flush the DTE entry */
device_flush_dte(dev_data);
@@ -1818,7 +1824,7 @@ static void update_device_table(struct protection_domain *domain)
list_for_each_entry(dev_data, &domain->dev_list, list) {
set_dte_entry(dev_data->devid, domain,
dev_data->ats.enabled, dev_data->iommu_v2);
- clone_aliases(dev_data->pdev);
+ clone_aliases(dev_data->dev);
}
}
--
2.31.1
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
WARNING: multiple messages have this Message-ID (diff)
From: Vasant Hegde <vasant.hegde@amd.com>
To: <joro@8bytes.org>, <iommu@lists.linux.dev>
Cc: <iommu@lists.linux-foundation.org>,
<suravee.suthikulpanit@amd.com>,
Vasant Hegde <vasant.hegde@amd.com>
Subject: [PATCH v3 RESEND 01/35] iommu/amd: Update struct iommu_dev_data definition
Date: Wed, 6 Jul 2022 17:07:51 +0530 [thread overview]
Message-ID: <20220706113825.25582-2-vasant.hegde@amd.com> (raw)
Message-ID: <20220706113751.phcashTA-7QXoZ2zpqzYkxM8vgXGTJYojQ9cfRo7HWQ@z> (raw)
In-Reply-To: <20220706113825.25582-1-vasant.hegde@amd.com>
struct iommu_dev_data contains member "pdev" to point to pci_dev. This is
valid for only PCI devices and for other devices this will be NULL. This
causes unnecessary "pdev != NULL" check at various places.
Replace "struct pci_dev" member with "struct device" and use to_pci_dev()
to get pci device reference as needed. Also adjust setup_aliases() and
clone_aliases() function.
No functional change intended.
Co-developed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
---
drivers/iommu/amd/amd_iommu_types.h | 2 +-
drivers/iommu/amd/iommu.c | 32 +++++++++++++++++------------
2 files changed, 20 insertions(+), 14 deletions(-)
diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index 72d0f5e2f651..9b563f850f1d 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -689,7 +689,7 @@ struct iommu_dev_data {
struct list_head list; /* For domain->dev_list */
struct llist_node dev_data_list; /* For global dev_data_list */
struct protection_domain *domain; /* Domain the device is bound to */
- struct pci_dev *pdev;
+ struct device *dev;
u16 devid; /* PCI Device ID */
bool iommu_v2; /* Device can make use of IOMMUv2 */
struct {
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 840831d5d2ad..efa8af5a9419 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -188,10 +188,13 @@ static int clone_alias(struct pci_dev *pdev, u16 alias, void *data)
return 0;
}
-static void clone_aliases(struct pci_dev *pdev)
+static void clone_aliases(struct device *dev)
{
- if (!pdev)
+ struct pci_dev *pdev;
+
+ if (!dev_is_pci(dev))
return;
+ pdev = to_pci_dev(dev);
/*
* The IVRS alias stored in the alias table may not be
@@ -203,14 +206,14 @@ static void clone_aliases(struct pci_dev *pdev)
pci_for_each_dma_alias(pdev, clone_alias, NULL);
}
-static struct pci_dev *setup_aliases(struct device *dev)
+static void setup_aliases(struct device *dev)
{
struct pci_dev *pdev = to_pci_dev(dev);
u16 ivrs_alias;
/* For ACPI HID devices, there are no aliases */
if (!dev_is_pci(dev))
- return NULL;
+ return;
/*
* Add the IVRS alias to the pci aliases if it is on the same
@@ -221,9 +224,7 @@ static struct pci_dev *setup_aliases(struct device *dev)
PCI_BUS_NUM(ivrs_alias) == pdev->bus->number)
pci_add_dma_alias(pdev, ivrs_alias & 0xff, 1);
- clone_aliases(pdev);
-
- return pdev;
+ clone_aliases(dev);
}
static struct iommu_dev_data *find_dev_data(u16 devid)
@@ -331,7 +332,8 @@ static int iommu_init_device(struct device *dev)
if (!dev_data)
return -ENOMEM;
- dev_data->pdev = setup_aliases(dev);
+ dev_data->dev = dev;
+ setup_aliases(dev);
/*
* By default we use passthrough mode for IOMMUv2 capable device.
@@ -1232,13 +1234,17 @@ static int device_flush_dte_alias(struct pci_dev *pdev, u16 alias, void *data)
static int device_flush_dte(struct iommu_dev_data *dev_data)
{
struct amd_iommu *iommu;
+ struct pci_dev *pdev = NULL;
u16 alias;
int ret;
iommu = amd_iommu_rlookup_table[dev_data->devid];
- if (dev_data->pdev)
- ret = pci_for_each_dma_alias(dev_data->pdev,
+ if (dev_is_pci(dev_data->dev))
+ pdev = to_pci_dev(dev_data->dev);
+
+ if (pdev)
+ ret = pci_for_each_dma_alias(pdev,
device_flush_dte_alias, iommu);
else
ret = iommu_flush_dte(iommu, dev_data->devid);
@@ -1561,7 +1567,7 @@ static void do_attach(struct iommu_dev_data *dev_data,
/* Update device table */
set_dte_entry(dev_data->devid, domain,
ats, dev_data->iommu_v2);
- clone_aliases(dev_data->pdev);
+ clone_aliases(dev_data->dev);
device_flush_dte(dev_data);
}
@@ -1577,7 +1583,7 @@ static void do_detach(struct iommu_dev_data *dev_data)
dev_data->domain = NULL;
list_del(&dev_data->list);
clear_dte_entry(dev_data->devid);
- clone_aliases(dev_data->pdev);
+ clone_aliases(dev_data->dev);
/* Flush the DTE entry */
device_flush_dte(dev_data);
@@ -1818,7 +1824,7 @@ static void update_device_table(struct protection_domain *domain)
list_for_each_entry(dev_data, &domain->dev_list, list) {
set_dte_entry(dev_data->devid, domain,
dev_data->ats.enabled, dev_data->iommu_v2);
- clone_aliases(dev_data->pdev);
+ clone_aliases(dev_data->dev);
}
}
--
2.31.1
next prev parent reply other threads:[~2022-07-06 11:42 UTC|newest]
Thread overview: 73+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-06 11:37 [PATCH v3 RESEND 00/35] iommu/amd: Add multiple PCI segments support Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:37 ` Vasant Hegde via iommu [this message]
2022-07-06 11:37 ` [PATCH v3 RESEND 01/35] iommu/amd: Update struct iommu_dev_data definition Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 02/35] iommu/amd: Introduce pci segment structure Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 03/35] iommu/amd: Introduce per PCI segment device table Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 04/35] iommu/amd: Introduce per PCI segment rlookup table Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 05/35] iommu/amd: Introduce per PCI segment irq_lookup_table Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 06/35] iommu/amd: Introduce per PCI segment dev_data_list Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 07/35] iommu/amd: Introduce per PCI segment old_dev_tbl_cpy Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 08/35] iommu/amd: Introduce per PCI segment alias_table Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 09/35] iommu/amd: Introduce per PCI segment unity map list Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 10/35] iommu/amd: Introduce per PCI segment last_bdf Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 11/35] iommu/amd: Introduce per PCI segment device table size Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 12/35] iommu/amd: Introduce per PCI segment alias " Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 13/35] iommu/amd: Introduce per PCI segment rlookup " Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 14/35] iommu/amd: Convert to use per PCI segment irq_lookup_table Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 15/35] iommu/amd: Convert to use rlookup_amd_iommu helper function Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 16/35] iommu/amd: Update irq_remapping_alloc to use IOMMU lookup " Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 17/35] iommu/amd: Introduce struct amd_ir_data.iommu Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 18/35] iommu/amd: Update amd_irte_ops functions Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 19/35] iommu/amd: Update alloc_irq_table and alloc_irq_index Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 20/35] iommu/amd: Convert to use per PCI segment rlookup_table Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 21/35] iommu/amd: Update set_dte_entry and clear_dte_entry Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 22/35] iommu/amd: Update iommu_ignore_device Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 23/35] iommu/amd: Update dump_dte_entry Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 24/35] iommu/amd: Update set_dte_irq_entry Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 25/35] iommu/amd: Update (un)init_device_table_dma() Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 26/35] iommu/amd: Update set_dev_entry_bit() and get_dev_entry_bit() Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 27/35] iommu/amd: Remove global amd_iommu_[dev_table/alias_table/last_bdf] Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 28/35] iommu/amd: Flush upto last_bdf only Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 29/35] iommu/amd: Introduce get_device_sbdf_id() helper function Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 30/35] iommu/amd: Include PCI segment ID when initialize IOMMU Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 31/35] iommu/amd: Specify PCI segment ID when getting pci device Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 32/35] iommu/amd: Add PCI segment support for ivrs_[ioapic/hpet/acpihid] commands Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 33/35] iommu/amd: Print PCI segment ID in error log messages Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 34/35] iommu/amd: Update device_state structure to include PCI seg ID Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 35/35] iommu/amd: Update amd_iommu_fault " Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-07 7:41 ` [PATCH v3 RESEND 00/35] iommu/amd: Add multiple PCI segments support Joerg Roedel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220706113825.25582-2-vasant.hegde@amd.com \
--to=iommu@lists.linux-foundation.org \
--cc=iommu@lists.linux.dev \
--cc=joro@8bytes.org \
--cc=vasant.hegde@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox