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From: Vasant Hegde via iommu <iommu@lists.linux-foundation.org>
To: <joro@8bytes.org>, <iommu@lists.linux.dev>
Cc: iommu@lists.linux-foundation.org, Vasant Hegde <vasant.hegde@amd.com>
Subject: [PATCH v3 RESEND 32/35] iommu/amd: Add PCI segment support for ivrs_[ioapic/hpet/acpihid] commands
Date: Wed, 6 Jul 2022 17:08:22 +0530	[thread overview]
Message-ID: <20220706113825.25582-33-vasant.hegde@amd.com> (raw)
In-Reply-To: <20220706113825.25582-1-vasant.hegde@amd.com>

From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>

By default, PCI segment is zero and can be omitted. To support system
with non-zero PCI segment ID, modify the parsing functions to allow
PCI segment ID.

Co-developed-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
 .../admin-guide/kernel-parameters.txt         | 34 ++++++++++----
 drivers/iommu/amd/init.c                      | 44 ++++++++++++-------
 2 files changed, 52 insertions(+), 26 deletions(-)

diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 2522b11e593f..d45e58328ce6 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -2266,23 +2266,39 @@
 
 	ivrs_ioapic	[HW,X86-64]
 			Provide an override to the IOAPIC-ID<->DEVICE-ID
-			mapping provided in the IVRS ACPI table. For
-			example, to map IOAPIC-ID decimal 10 to
-			PCI device 00:14.0 write the parameter as:
+			mapping provided in the IVRS ACPI table.
+			By default, PCI segment is 0, and can be omitted.
+			For example:
+			* To map IOAPIC-ID decimal 10 to PCI device 00:14.0
+			  write the parameter as:
 				ivrs_ioapic[10]=00:14.0
+			* To map IOAPIC-ID decimal 10 to PCI segment 0x1 and
+			  PCI device 00:14.0 write the parameter as:
+				ivrs_ioapic[10]=0001:00:14.0
 
 	ivrs_hpet	[HW,X86-64]
 			Provide an override to the HPET-ID<->DEVICE-ID
-			mapping provided in the IVRS ACPI table. For
-			example, to map HPET-ID decimal 0 to
-			PCI device 00:14.0 write the parameter as:
+			mapping provided in the IVRS ACPI table.
+			By default, PCI segment is 0, and can be omitted.
+			For example:
+			* To map HPET-ID decimal 0 to PCI device 00:14.0
+			  write the parameter as:
 				ivrs_hpet[0]=00:14.0
+			* To map HPET-ID decimal 10 to PCI segment 0x1 and
+			  PCI device 00:14.0 write the parameter as:
+				ivrs_ioapic[10]=0001:00:14.0
 
 	ivrs_acpihid	[HW,X86-64]
 			Provide an override to the ACPI-HID:UID<->DEVICE-ID
-			mapping provided in the IVRS ACPI table. For
-			example, to map UART-HID:UID AMD0020:0 to
-			PCI device 00:14.5 write the parameter as:
+			mapping provided in the IVRS ACPI table.
+
+			For example, to map UART-HID:UID AMD0020:0 to
+			PCI segment 0x1 and PCI device ID 00:14.5,
+			write the parameter as:
+				ivrs_acpihid[0001:00:14.5]=AMD0020:0
+
+			By default, PCI segment is 0, and can be omitted.
+			For example, PCI device 00:14.5 write the parameter as:
 				ivrs_acpihid[00:14.5]=AMD0020:0
 
 	js=		[HW,JOY] Analog joystick
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index 9693f0b9e07a..9b1026fa7283 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -84,6 +84,10 @@
 #define ACPI_DEVFLAG_ATSDIS             0x10000000
 
 #define LOOP_TIMEOUT	2000000
+
+#define IVRS_GET_SBDF_ID(seg, bus, dev, fd)	(((seg & 0xffff) << 16) | ((bus & 0xff) << 8) \
+						 | ((dev & 0x1f) << 3) | (fn & 0x7))
+
 /*
  * ACPI table definitions
  *
@@ -3288,15 +3292,17 @@ static int __init parse_amd_iommu_options(char *str)
 
 static int __init parse_ivrs_ioapic(char *str)
 {
-	unsigned int bus, dev, fn;
+	u32 seg = 0, bus, dev, fn;
 	int ret, id, i;
-	u16 devid;
+	u32 devid;
 
 	ret = sscanf(str, "[%d]=%x:%x.%x", &id, &bus, &dev, &fn);
-
 	if (ret != 4) {
-		pr_err("Invalid command line: ivrs_ioapic%s\n", str);
-		return 1;
+		ret = sscanf(str, "[%d]=%x:%x:%x.%x", &id, &seg, &bus, &dev, &fn);
+		if (ret != 5) {
+			pr_err("Invalid command line: ivrs_ioapic%s\n", str);
+			return 1;
+		}
 	}
 
 	if (early_ioapic_map_size == EARLY_MAP_SIZE) {
@@ -3305,7 +3311,7 @@ static int __init parse_ivrs_ioapic(char *str)
 		return 1;
 	}
 
-	devid = ((bus & 0xff) << 8) | ((dev & 0x1f) << 3) | (fn & 0x7);
+	devid = IVRS_GET_SBDF_ID(seg, bus, dev, fn);
 
 	cmdline_maps			= true;
 	i				= early_ioapic_map_size++;
@@ -3318,15 +3324,17 @@ static int __init parse_ivrs_ioapic(char *str)
 
 static int __init parse_ivrs_hpet(char *str)
 {
-	unsigned int bus, dev, fn;
+	u32 seg = 0, bus, dev, fn;
 	int ret, id, i;
-	u16 devid;
+	u32 devid;
 
 	ret = sscanf(str, "[%d]=%x:%x.%x", &id, &bus, &dev, &fn);
-
 	if (ret != 4) {
-		pr_err("Invalid command line: ivrs_hpet%s\n", str);
-		return 1;
+		ret = sscanf(str, "[%d]=%x:%x:%x.%x", &id, &seg, &bus, &dev, &fn);
+		if (ret != 5) {
+			pr_err("Invalid command line: ivrs_hpet%s\n", str);
+			return 1;
+		}
 	}
 
 	if (early_hpet_map_size == EARLY_MAP_SIZE) {
@@ -3335,7 +3343,7 @@ static int __init parse_ivrs_hpet(char *str)
 		return 1;
 	}
 
-	devid = ((bus & 0xff) << 8) | ((dev & 0x1f) << 3) | (fn & 0x7);
+	devid = IVRS_GET_SBDF_ID(seg, bus, dev, fn);
 
 	cmdline_maps			= true;
 	i				= early_hpet_map_size++;
@@ -3348,15 +3356,18 @@ static int __init parse_ivrs_hpet(char *str)
 
 static int __init parse_ivrs_acpihid(char *str)
 {
-	u32 bus, dev, fn;
+	u32 seg = 0, bus, dev, fn;
 	char *hid, *uid, *p;
 	char acpiid[ACPIHID_UID_LEN + ACPIHID_HID_LEN] = {0};
 	int ret, i;
 
 	ret = sscanf(str, "[%x:%x.%x]=%s", &bus, &dev, &fn, acpiid);
 	if (ret != 4) {
-		pr_err("Invalid command line: ivrs_acpihid(%s)\n", str);
-		return 1;
+		ret = sscanf(str, "[%x:%x:%x.%x]=%s", &seg, &bus, &dev, &fn, acpiid);
+		if (ret != 5) {
+			pr_err("Invalid command line: ivrs_acpihid(%s)\n", str);
+			return 1;
+		}
 	}
 
 	p = acpiid;
@@ -3371,8 +3382,7 @@ static int __init parse_ivrs_acpihid(char *str)
 	i = early_acpihid_map_size++;
 	memcpy(early_acpihid_map[i].hid, hid, strlen(hid));
 	memcpy(early_acpihid_map[i].uid, uid, strlen(uid));
-	early_acpihid_map[i].devid =
-		((bus & 0xff) << 8) | ((dev & 0x1f) << 3) | (fn & 0x7);
+	early_acpihid_map[i].devid = IVRS_GET_SBDF_ID(seg, bus, dev, fn);
 	early_acpihid_map[i].cmd_line	= true;
 
 	return 1;
-- 
2.31.1

_______________________________________________
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iommu@lists.linux-foundation.org
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WARNING: multiple messages have this Message-ID (diff)
From: Vasant Hegde <vasant.hegde@amd.com>
To: <joro@8bytes.org>, <iommu@lists.linux.dev>
Cc: <iommu@lists.linux-foundation.org>,
	<suravee.suthikulpanit@amd.com>,
	Vasant Hegde <vasant.hegde@amd.com>
Subject: [PATCH v3 RESEND 32/35] iommu/amd: Add PCI segment support for ivrs_[ioapic/hpet/acpihid] commands
Date: Wed, 6 Jul 2022 17:08:22 +0530	[thread overview]
Message-ID: <20220706113825.25582-33-vasant.hegde@amd.com> (raw)
Message-ID: <20220706113822.Ls5VboUZjoCH8uTHnnOCybkt8ZnLEwTElnfy0QbzmCE@z> (raw)
In-Reply-To: <20220706113825.25582-1-vasant.hegde@amd.com>

From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>

By default, PCI segment is zero and can be omitted. To support system
with non-zero PCI segment ID, modify the parsing functions to allow
PCI segment ID.

Co-developed-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
 .../admin-guide/kernel-parameters.txt         | 34 ++++++++++----
 drivers/iommu/amd/init.c                      | 44 ++++++++++++-------
 2 files changed, 52 insertions(+), 26 deletions(-)

diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 2522b11e593f..d45e58328ce6 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -2266,23 +2266,39 @@
 
 	ivrs_ioapic	[HW,X86-64]
 			Provide an override to the IOAPIC-ID<->DEVICE-ID
-			mapping provided in the IVRS ACPI table. For
-			example, to map IOAPIC-ID decimal 10 to
-			PCI device 00:14.0 write the parameter as:
+			mapping provided in the IVRS ACPI table.
+			By default, PCI segment is 0, and can be omitted.
+			For example:
+			* To map IOAPIC-ID decimal 10 to PCI device 00:14.0
+			  write the parameter as:
 				ivrs_ioapic[10]=00:14.0
+			* To map IOAPIC-ID decimal 10 to PCI segment 0x1 and
+			  PCI device 00:14.0 write the parameter as:
+				ivrs_ioapic[10]=0001:00:14.0
 
 	ivrs_hpet	[HW,X86-64]
 			Provide an override to the HPET-ID<->DEVICE-ID
-			mapping provided in the IVRS ACPI table. For
-			example, to map HPET-ID decimal 0 to
-			PCI device 00:14.0 write the parameter as:
+			mapping provided in the IVRS ACPI table.
+			By default, PCI segment is 0, and can be omitted.
+			For example:
+			* To map HPET-ID decimal 0 to PCI device 00:14.0
+			  write the parameter as:
 				ivrs_hpet[0]=00:14.0
+			* To map HPET-ID decimal 10 to PCI segment 0x1 and
+			  PCI device 00:14.0 write the parameter as:
+				ivrs_ioapic[10]=0001:00:14.0
 
 	ivrs_acpihid	[HW,X86-64]
 			Provide an override to the ACPI-HID:UID<->DEVICE-ID
-			mapping provided in the IVRS ACPI table. For
-			example, to map UART-HID:UID AMD0020:0 to
-			PCI device 00:14.5 write the parameter as:
+			mapping provided in the IVRS ACPI table.
+
+			For example, to map UART-HID:UID AMD0020:0 to
+			PCI segment 0x1 and PCI device ID 00:14.5,
+			write the parameter as:
+				ivrs_acpihid[0001:00:14.5]=AMD0020:0
+
+			By default, PCI segment is 0, and can be omitted.
+			For example, PCI device 00:14.5 write the parameter as:
 				ivrs_acpihid[00:14.5]=AMD0020:0
 
 	js=		[HW,JOY] Analog joystick
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index 9693f0b9e07a..9b1026fa7283 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -84,6 +84,10 @@
 #define ACPI_DEVFLAG_ATSDIS             0x10000000
 
 #define LOOP_TIMEOUT	2000000
+
+#define IVRS_GET_SBDF_ID(seg, bus, dev, fd)	(((seg & 0xffff) << 16) | ((bus & 0xff) << 8) \
+						 | ((dev & 0x1f) << 3) | (fn & 0x7))
+
 /*
  * ACPI table definitions
  *
@@ -3288,15 +3292,17 @@ static int __init parse_amd_iommu_options(char *str)
 
 static int __init parse_ivrs_ioapic(char *str)
 {
-	unsigned int bus, dev, fn;
+	u32 seg = 0, bus, dev, fn;
 	int ret, id, i;
-	u16 devid;
+	u32 devid;
 
 	ret = sscanf(str, "[%d]=%x:%x.%x", &id, &bus, &dev, &fn);
-
 	if (ret != 4) {
-		pr_err("Invalid command line: ivrs_ioapic%s\n", str);
-		return 1;
+		ret = sscanf(str, "[%d]=%x:%x:%x.%x", &id, &seg, &bus, &dev, &fn);
+		if (ret != 5) {
+			pr_err("Invalid command line: ivrs_ioapic%s\n", str);
+			return 1;
+		}
 	}
 
 	if (early_ioapic_map_size == EARLY_MAP_SIZE) {
@@ -3305,7 +3311,7 @@ static int __init parse_ivrs_ioapic(char *str)
 		return 1;
 	}
 
-	devid = ((bus & 0xff) << 8) | ((dev & 0x1f) << 3) | (fn & 0x7);
+	devid = IVRS_GET_SBDF_ID(seg, bus, dev, fn);
 
 	cmdline_maps			= true;
 	i				= early_ioapic_map_size++;
@@ -3318,15 +3324,17 @@ static int __init parse_ivrs_ioapic(char *str)
 
 static int __init parse_ivrs_hpet(char *str)
 {
-	unsigned int bus, dev, fn;
+	u32 seg = 0, bus, dev, fn;
 	int ret, id, i;
-	u16 devid;
+	u32 devid;
 
 	ret = sscanf(str, "[%d]=%x:%x.%x", &id, &bus, &dev, &fn);
-
 	if (ret != 4) {
-		pr_err("Invalid command line: ivrs_hpet%s\n", str);
-		return 1;
+		ret = sscanf(str, "[%d]=%x:%x:%x.%x", &id, &seg, &bus, &dev, &fn);
+		if (ret != 5) {
+			pr_err("Invalid command line: ivrs_hpet%s\n", str);
+			return 1;
+		}
 	}
 
 	if (early_hpet_map_size == EARLY_MAP_SIZE) {
@@ -3335,7 +3343,7 @@ static int __init parse_ivrs_hpet(char *str)
 		return 1;
 	}
 
-	devid = ((bus & 0xff) << 8) | ((dev & 0x1f) << 3) | (fn & 0x7);
+	devid = IVRS_GET_SBDF_ID(seg, bus, dev, fn);
 
 	cmdline_maps			= true;
 	i				= early_hpet_map_size++;
@@ -3348,15 +3356,18 @@ static int __init parse_ivrs_hpet(char *str)
 
 static int __init parse_ivrs_acpihid(char *str)
 {
-	u32 bus, dev, fn;
+	u32 seg = 0, bus, dev, fn;
 	char *hid, *uid, *p;
 	char acpiid[ACPIHID_UID_LEN + ACPIHID_HID_LEN] = {0};
 	int ret, i;
 
 	ret = sscanf(str, "[%x:%x.%x]=%s", &bus, &dev, &fn, acpiid);
 	if (ret != 4) {
-		pr_err("Invalid command line: ivrs_acpihid(%s)\n", str);
-		return 1;
+		ret = sscanf(str, "[%x:%x:%x.%x]=%s", &seg, &bus, &dev, &fn, acpiid);
+		if (ret != 5) {
+			pr_err("Invalid command line: ivrs_acpihid(%s)\n", str);
+			return 1;
+		}
 	}
 
 	p = acpiid;
@@ -3371,8 +3382,7 @@ static int __init parse_ivrs_acpihid(char *str)
 	i = early_acpihid_map_size++;
 	memcpy(early_acpihid_map[i].hid, hid, strlen(hid));
 	memcpy(early_acpihid_map[i].uid, uid, strlen(uid));
-	early_acpihid_map[i].devid =
-		((bus & 0xff) << 8) | ((dev & 0x1f) << 3) | (fn & 0x7);
+	early_acpihid_map[i].devid = IVRS_GET_SBDF_ID(seg, bus, dev, fn);
 	early_acpihid_map[i].cmd_line	= true;
 
 	return 1;
-- 
2.31.1


  parent reply	other threads:[~2022-07-06 11:50 UTC|newest]

Thread overview: 73+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-06 11:37 [PATCH v3 RESEND 00/35] iommu/amd: Add multiple PCI segments support Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 01/35] iommu/amd: Update struct iommu_dev_data definition Vasant Hegde via iommu
2022-07-06 11:37   ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 02/35] iommu/amd: Introduce pci segment structure Vasant Hegde via iommu
2022-07-06 11:37   ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 03/35] iommu/amd: Introduce per PCI segment device table Vasant Hegde via iommu
2022-07-06 11:37   ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 04/35] iommu/amd: Introduce per PCI segment rlookup table Vasant Hegde via iommu
2022-07-06 11:37   ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 05/35] iommu/amd: Introduce per PCI segment irq_lookup_table Vasant Hegde via iommu
2022-07-06 11:37   ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 06/35] iommu/amd: Introduce per PCI segment dev_data_list Vasant Hegde via iommu
2022-07-06 11:37   ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 07/35] iommu/amd: Introduce per PCI segment old_dev_tbl_cpy Vasant Hegde via iommu
2022-07-06 11:37   ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 08/35] iommu/amd: Introduce per PCI segment alias_table Vasant Hegde via iommu
2022-07-06 11:37   ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 09/35] iommu/amd: Introduce per PCI segment unity map list Vasant Hegde via iommu
2022-07-06 11:37   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 10/35] iommu/amd: Introduce per PCI segment last_bdf Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 11/35] iommu/amd: Introduce per PCI segment device table size Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 12/35] iommu/amd: Introduce per PCI segment alias " Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 13/35] iommu/amd: Introduce per PCI segment rlookup " Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 14/35] iommu/amd: Convert to use per PCI segment irq_lookup_table Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 15/35] iommu/amd: Convert to use rlookup_amd_iommu helper function Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 16/35] iommu/amd: Update irq_remapping_alloc to use IOMMU lookup " Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 17/35] iommu/amd: Introduce struct amd_ir_data.iommu Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 18/35] iommu/amd: Update amd_irte_ops functions Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 19/35] iommu/amd: Update alloc_irq_table and alloc_irq_index Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 20/35] iommu/amd: Convert to use per PCI segment rlookup_table Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 21/35] iommu/amd: Update set_dte_entry and clear_dte_entry Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 22/35] iommu/amd: Update iommu_ignore_device Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 23/35] iommu/amd: Update dump_dte_entry Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 24/35] iommu/amd: Update set_dte_irq_entry Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 25/35] iommu/amd: Update (un)init_device_table_dma() Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 26/35] iommu/amd: Update set_dev_entry_bit() and get_dev_entry_bit() Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 27/35] iommu/amd: Remove global amd_iommu_[dev_table/alias_table/last_bdf] Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 28/35] iommu/amd: Flush upto last_bdf only Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 29/35] iommu/amd: Introduce get_device_sbdf_id() helper function Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 30/35] iommu/amd: Include PCI segment ID when initialize IOMMU Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 31/35] iommu/amd: Specify PCI segment ID when getting pci device Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` Vasant Hegde via iommu [this message]
2022-07-06 11:38   ` [PATCH v3 RESEND 32/35] iommu/amd: Add PCI segment support for ivrs_[ioapic/hpet/acpihid] commands Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 33/35] iommu/amd: Print PCI segment ID in error log messages Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 34/35] iommu/amd: Update device_state structure to include PCI seg ID Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 35/35] iommu/amd: Update amd_iommu_fault " Vasant Hegde via iommu
2022-07-06 11:38   ` Vasant Hegde
2022-07-07  7:41 ` [PATCH v3 RESEND 00/35] iommu/amd: Add multiple PCI segments support Joerg Roedel

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