From: Vasant Hegde via iommu <iommu@lists.linux-foundation.org>
To: <joro@8bytes.org>, <iommu@lists.linux.dev>
Cc: iommu@lists.linux-foundation.org, Vasant Hegde <vasant.hegde@amd.com>
Subject: [PATCH v3 RESEND 04/35] iommu/amd: Introduce per PCI segment rlookup table
Date: Wed, 6 Jul 2022 17:07:54 +0530 [thread overview]
Message-ID: <20220706113825.25582-5-vasant.hegde@amd.com> (raw)
In-Reply-To: <20220706113825.25582-1-vasant.hegde@amd.com>
From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
This will replace global rlookup table (amd_iommu_rlookup_table).
Add helper functions to set/get rlookup table for the given device.
Also add macros to get seg/devid from sbdf.
Co-developed-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
drivers/iommu/amd/amd_iommu.h | 1 +
drivers/iommu/amd/amd_iommu_types.h | 11 ++++++++
drivers/iommu/amd/init.c | 23 +++++++++++++++
drivers/iommu/amd/iommu.c | 44 +++++++++++++++++++++++++++++
4 files changed, 79 insertions(+)
diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h
index 885570cd0d77..2947239700ce 100644
--- a/drivers/iommu/amd/amd_iommu.h
+++ b/drivers/iommu/amd/amd_iommu.h
@@ -19,6 +19,7 @@ extern int amd_iommu_init_devices(void);
extern void amd_iommu_uninit_devices(void);
extern void amd_iommu_init_notifier(void);
extern int amd_iommu_init_api(void);
+extern void amd_iommu_set_rlookup_table(struct amd_iommu *iommu, u16 devid);
#ifdef CONFIG_AMD_IOMMU_DEBUGFS
void amd_iommu_debugfs_setup(struct amd_iommu *iommu);
diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index 422ea87ae4c7..d0ee78c656ff 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -456,6 +456,9 @@ extern bool amdr_ivrs_remap_support;
/* kmem_cache to get tables with 128 byte alignement */
extern struct kmem_cache *amd_iommu_irq_cache;
+#define PCI_SBDF_TO_SEGID(sbdf) (((sbdf) >> 16) & 0xffff)
+#define PCI_SBDF_TO_DEVID(sbdf) ((sbdf) & 0xffff)
+
/* Make iterating over all pci segment easier */
#define for_each_pci_segment(pci_seg) \
list_for_each_entry((pci_seg), &amd_iommu_pci_seg_list, list)
@@ -490,6 +493,7 @@ struct amd_iommu_fault {
};
+struct amd_iommu;
struct iommu_domain;
struct irq_domain;
struct amd_irte_ops;
@@ -554,6 +558,13 @@ struct amd_iommu_pci_seg {
* page table root pointer.
*/
struct dev_table_entry *dev_table;
+
+ /*
+ * The rlookup iommu table is used to find the IOMMU which is
+ * responsible for a specific device. It is indexed by the PCI
+ * device id.
+ */
+ struct amd_iommu **rlookup_table;
};
/*
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index 5152243593bf..2fb3e1b82e09 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -665,6 +665,26 @@ static inline void free_dev_table(struct amd_iommu_pci_seg *pci_seg)
pci_seg->dev_table = NULL;
}
+/* Allocate per PCI segment IOMMU rlookup table. */
+static inline int __init alloc_rlookup_table(struct amd_iommu_pci_seg *pci_seg)
+{
+ pci_seg->rlookup_table = (void *)__get_free_pages(
+ GFP_KERNEL | __GFP_ZERO,
+ get_order(rlookup_table_size));
+ if (pci_seg->rlookup_table == NULL)
+ return -ENOMEM;
+
+ return 0;
+}
+
+static inline void free_rlookup_table(struct amd_iommu_pci_seg *pci_seg)
+{
+ free_pages((unsigned long)pci_seg->rlookup_table,
+ get_order(rlookup_table_size));
+ pci_seg->rlookup_table = NULL;
+}
+
+
/*
* Allocates the command buffer. This buffer is per AMD IOMMU. We can
* write commands to that buffer later and the IOMMU will execute them
@@ -1491,6 +1511,8 @@ static struct amd_iommu_pci_seg *__init alloc_pci_segment(u16 id)
if (alloc_dev_table(pci_seg))
return NULL;
+ if (alloc_rlookup_table(pci_seg))
+ return NULL;
return pci_seg;
}
@@ -1513,6 +1535,7 @@ static void __init free_pci_segments(void)
for_each_pci_segment_safe(pci_seg, next) {
list_del(&pci_seg->list);
+ free_rlookup_table(pci_seg);
free_dev_table(pci_seg);
kfree(pci_seg);
}
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index ac8f81f527b4..b0262b2e749d 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -146,6 +146,50 @@ struct dev_table_entry *get_dev_table(struct amd_iommu *iommu)
return dev_table;
}
+static inline u16 get_device_segment(struct device *dev)
+{
+ u16 seg;
+
+ if (dev_is_pci(dev)) {
+ struct pci_dev *pdev = to_pci_dev(dev);
+
+ seg = pci_domain_nr(pdev->bus);
+ } else {
+ u32 devid = get_acpihid_device_id(dev, NULL);
+
+ seg = PCI_SBDF_TO_SEGID(devid);
+ }
+
+ return seg;
+}
+
+/* Writes the specific IOMMU for a device into the PCI segment rlookup table */
+void amd_iommu_set_rlookup_table(struct amd_iommu *iommu, u16 devid)
+{
+ struct amd_iommu_pci_seg *pci_seg = iommu->pci_seg;
+
+ pci_seg->rlookup_table[devid] = iommu;
+}
+
+static struct amd_iommu *__rlookup_amd_iommu(u16 seg, u16 devid)
+{
+ struct amd_iommu_pci_seg *pci_seg;
+
+ for_each_pci_segment(pci_seg) {
+ if (pci_seg->id == seg)
+ return pci_seg->rlookup_table[devid];
+ }
+ return NULL;
+}
+
+static struct amd_iommu *rlookup_amd_iommu(struct device *dev)
+{
+ u16 seg = get_device_segment(dev);
+ u16 devid = get_device_id(dev);
+
+ return __rlookup_amd_iommu(seg, devid);
+}
+
static struct protection_domain *to_pdomain(struct iommu_domain *dom)
{
return container_of(dom, struct protection_domain, domain);
--
2.31.1
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
WARNING: multiple messages have this Message-ID (diff)
From: Vasant Hegde <vasant.hegde@amd.com>
To: <joro@8bytes.org>, <iommu@lists.linux.dev>
Cc: <iommu@lists.linux-foundation.org>,
<suravee.suthikulpanit@amd.com>,
Vasant Hegde <vasant.hegde@amd.com>
Subject: [PATCH v3 RESEND 04/35] iommu/amd: Introduce per PCI segment rlookup table
Date: Wed, 6 Jul 2022 17:07:54 +0530 [thread overview]
Message-ID: <20220706113825.25582-5-vasant.hegde@amd.com> (raw)
Message-ID: <20220706113754.50-mvhZBst9Lbiz-6O20WIMAR6BkEwXQt32l4ZsZ87o@z> (raw)
In-Reply-To: <20220706113825.25582-1-vasant.hegde@amd.com>
From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
This will replace global rlookup table (amd_iommu_rlookup_table).
Add helper functions to set/get rlookup table for the given device.
Also add macros to get seg/devid from sbdf.
Co-developed-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
drivers/iommu/amd/amd_iommu.h | 1 +
drivers/iommu/amd/amd_iommu_types.h | 11 ++++++++
drivers/iommu/amd/init.c | 23 +++++++++++++++
drivers/iommu/amd/iommu.c | 44 +++++++++++++++++++++++++++++
4 files changed, 79 insertions(+)
diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h
index 885570cd0d77..2947239700ce 100644
--- a/drivers/iommu/amd/amd_iommu.h
+++ b/drivers/iommu/amd/amd_iommu.h
@@ -19,6 +19,7 @@ extern int amd_iommu_init_devices(void);
extern void amd_iommu_uninit_devices(void);
extern void amd_iommu_init_notifier(void);
extern int amd_iommu_init_api(void);
+extern void amd_iommu_set_rlookup_table(struct amd_iommu *iommu, u16 devid);
#ifdef CONFIG_AMD_IOMMU_DEBUGFS
void amd_iommu_debugfs_setup(struct amd_iommu *iommu);
diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index 422ea87ae4c7..d0ee78c656ff 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -456,6 +456,9 @@ extern bool amdr_ivrs_remap_support;
/* kmem_cache to get tables with 128 byte alignement */
extern struct kmem_cache *amd_iommu_irq_cache;
+#define PCI_SBDF_TO_SEGID(sbdf) (((sbdf) >> 16) & 0xffff)
+#define PCI_SBDF_TO_DEVID(sbdf) ((sbdf) & 0xffff)
+
/* Make iterating over all pci segment easier */
#define for_each_pci_segment(pci_seg) \
list_for_each_entry((pci_seg), &amd_iommu_pci_seg_list, list)
@@ -490,6 +493,7 @@ struct amd_iommu_fault {
};
+struct amd_iommu;
struct iommu_domain;
struct irq_domain;
struct amd_irte_ops;
@@ -554,6 +558,13 @@ struct amd_iommu_pci_seg {
* page table root pointer.
*/
struct dev_table_entry *dev_table;
+
+ /*
+ * The rlookup iommu table is used to find the IOMMU which is
+ * responsible for a specific device. It is indexed by the PCI
+ * device id.
+ */
+ struct amd_iommu **rlookup_table;
};
/*
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index 5152243593bf..2fb3e1b82e09 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -665,6 +665,26 @@ static inline void free_dev_table(struct amd_iommu_pci_seg *pci_seg)
pci_seg->dev_table = NULL;
}
+/* Allocate per PCI segment IOMMU rlookup table. */
+static inline int __init alloc_rlookup_table(struct amd_iommu_pci_seg *pci_seg)
+{
+ pci_seg->rlookup_table = (void *)__get_free_pages(
+ GFP_KERNEL | __GFP_ZERO,
+ get_order(rlookup_table_size));
+ if (pci_seg->rlookup_table == NULL)
+ return -ENOMEM;
+
+ return 0;
+}
+
+static inline void free_rlookup_table(struct amd_iommu_pci_seg *pci_seg)
+{
+ free_pages((unsigned long)pci_seg->rlookup_table,
+ get_order(rlookup_table_size));
+ pci_seg->rlookup_table = NULL;
+}
+
+
/*
* Allocates the command buffer. This buffer is per AMD IOMMU. We can
* write commands to that buffer later and the IOMMU will execute them
@@ -1491,6 +1511,8 @@ static struct amd_iommu_pci_seg *__init alloc_pci_segment(u16 id)
if (alloc_dev_table(pci_seg))
return NULL;
+ if (alloc_rlookup_table(pci_seg))
+ return NULL;
return pci_seg;
}
@@ -1513,6 +1535,7 @@ static void __init free_pci_segments(void)
for_each_pci_segment_safe(pci_seg, next) {
list_del(&pci_seg->list);
+ free_rlookup_table(pci_seg);
free_dev_table(pci_seg);
kfree(pci_seg);
}
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index ac8f81f527b4..b0262b2e749d 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -146,6 +146,50 @@ struct dev_table_entry *get_dev_table(struct amd_iommu *iommu)
return dev_table;
}
+static inline u16 get_device_segment(struct device *dev)
+{
+ u16 seg;
+
+ if (dev_is_pci(dev)) {
+ struct pci_dev *pdev = to_pci_dev(dev);
+
+ seg = pci_domain_nr(pdev->bus);
+ } else {
+ u32 devid = get_acpihid_device_id(dev, NULL);
+
+ seg = PCI_SBDF_TO_SEGID(devid);
+ }
+
+ return seg;
+}
+
+/* Writes the specific IOMMU for a device into the PCI segment rlookup table */
+void amd_iommu_set_rlookup_table(struct amd_iommu *iommu, u16 devid)
+{
+ struct amd_iommu_pci_seg *pci_seg = iommu->pci_seg;
+
+ pci_seg->rlookup_table[devid] = iommu;
+}
+
+static struct amd_iommu *__rlookup_amd_iommu(u16 seg, u16 devid)
+{
+ struct amd_iommu_pci_seg *pci_seg;
+
+ for_each_pci_segment(pci_seg) {
+ if (pci_seg->id == seg)
+ return pci_seg->rlookup_table[devid];
+ }
+ return NULL;
+}
+
+static struct amd_iommu *rlookup_amd_iommu(struct device *dev)
+{
+ u16 seg = get_device_segment(dev);
+ u16 devid = get_device_id(dev);
+
+ return __rlookup_amd_iommu(seg, devid);
+}
+
static struct protection_domain *to_pdomain(struct iommu_domain *dom)
{
return container_of(dom, struct protection_domain, domain);
--
2.31.1
next prev parent reply other threads:[~2022-07-06 11:43 UTC|newest]
Thread overview: 73+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-06 11:37 [PATCH v3 RESEND 00/35] iommu/amd: Add multiple PCI segments support Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 01/35] iommu/amd: Update struct iommu_dev_data definition Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 02/35] iommu/amd: Introduce pci segment structure Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 03/35] iommu/amd: Introduce per PCI segment device table Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:37 ` Vasant Hegde via iommu [this message]
2022-07-06 11:37 ` [PATCH v3 RESEND 04/35] iommu/amd: Introduce per PCI segment rlookup table Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 05/35] iommu/amd: Introduce per PCI segment irq_lookup_table Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 06/35] iommu/amd: Introduce per PCI segment dev_data_list Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 07/35] iommu/amd: Introduce per PCI segment old_dev_tbl_cpy Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 08/35] iommu/amd: Introduce per PCI segment alias_table Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:37 ` [PATCH v3 RESEND 09/35] iommu/amd: Introduce per PCI segment unity map list Vasant Hegde via iommu
2022-07-06 11:37 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 10/35] iommu/amd: Introduce per PCI segment last_bdf Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 11/35] iommu/amd: Introduce per PCI segment device table size Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 12/35] iommu/amd: Introduce per PCI segment alias " Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 13/35] iommu/amd: Introduce per PCI segment rlookup " Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 14/35] iommu/amd: Convert to use per PCI segment irq_lookup_table Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 15/35] iommu/amd: Convert to use rlookup_amd_iommu helper function Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 16/35] iommu/amd: Update irq_remapping_alloc to use IOMMU lookup " Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 17/35] iommu/amd: Introduce struct amd_ir_data.iommu Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 18/35] iommu/amd: Update amd_irte_ops functions Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 19/35] iommu/amd: Update alloc_irq_table and alloc_irq_index Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 20/35] iommu/amd: Convert to use per PCI segment rlookup_table Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 21/35] iommu/amd: Update set_dte_entry and clear_dte_entry Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 22/35] iommu/amd: Update iommu_ignore_device Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 23/35] iommu/amd: Update dump_dte_entry Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 24/35] iommu/amd: Update set_dte_irq_entry Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 25/35] iommu/amd: Update (un)init_device_table_dma() Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 26/35] iommu/amd: Update set_dev_entry_bit() and get_dev_entry_bit() Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 27/35] iommu/amd: Remove global amd_iommu_[dev_table/alias_table/last_bdf] Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 28/35] iommu/amd: Flush upto last_bdf only Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 29/35] iommu/amd: Introduce get_device_sbdf_id() helper function Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 30/35] iommu/amd: Include PCI segment ID when initialize IOMMU Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 31/35] iommu/amd: Specify PCI segment ID when getting pci device Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 32/35] iommu/amd: Add PCI segment support for ivrs_[ioapic/hpet/acpihid] commands Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 33/35] iommu/amd: Print PCI segment ID in error log messages Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 34/35] iommu/amd: Update device_state structure to include PCI seg ID Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-06 11:38 ` [PATCH v3 RESEND 35/35] iommu/amd: Update amd_iommu_fault " Vasant Hegde via iommu
2022-07-06 11:38 ` Vasant Hegde
2022-07-07 7:41 ` [PATCH v3 RESEND 00/35] iommu/amd: Add multiple PCI segments support Joerg Roedel
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