From: Vasant Hegde <vasant.hegde@amd.com>
To: <iommu@lists.linux.dev>, <joro@8bytes.org>
Cc: <suravee.suthikulpanit@amd.com>, <wei.huang2@amd.com>,
<jsnitsel@redhat.com>, <jgg@ziepe.ca>,
Vasant Hegde <vasant.hegde@amd.com>,
Jason Gunthorpe <jgg@nvidia.com>
Subject: [PATCH v5 13/17] iommu/amd: Refactor protection_domain helper functions
Date: Tue, 16 Jan 2024 16:53:31 +0000 [thread overview]
Message-ID: <20240116165335.6043-14-vasant.hegde@amd.com> (raw)
In-Reply-To: <20240116165335.6043-1-vasant.hegde@amd.com>
From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To removes the code to setup GCR3 table, and only handle domain
create / destroy, since GCR3 is no longer part of a domain.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
---
drivers/iommu/amd/iommu.c | 14 +++-----------
1 file changed, 3 insertions(+), 11 deletions(-)
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index b5347acee5f3..b6b7b55c3682 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -2233,9 +2233,6 @@ static void protection_domain_free(struct protection_domain *domain)
if (domain->iop.pgtbl_cfg.tlb)
free_io_pgtable_ops(&domain->iop.iop.ops);
- if (domain->flags & PD_IOMMUV2_MASK)
- free_gcr3_table(domain);
-
if (domain->iop.root)
free_page((unsigned long)domain->iop.root);
@@ -2263,15 +2260,10 @@ static int protection_domain_init_v1(struct protection_domain *domain, int mode)
return 0;
}
-static int protection_domain_init_v2(struct protection_domain *domain)
+static int protection_domain_init_v2(struct protection_domain *pdom)
{
- domain->flags |= PD_GIOV_MASK;
- domain->pd_mode = PD_MODE_V2;
-
- domain->domain.pgsize_bitmap = AMD_IOMMU_PGSIZES_V2;
-
- if (setup_gcr3_table(domain, 1))
- return -ENOMEM;
+ pdom->pd_mode = PD_MODE_V2;
+ pdom->domain.pgsize_bitmap = AMD_IOMMU_PGSIZES_V2;
return 0;
}
--
2.31.1
next prev parent reply other threads:[~2024-01-16 16:57 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-16 16:53 [PATCH v5 00/17] iommu/amd: SVA Support (part 3) - refactor support for GCR3 table Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 01/17] iommu/amd: Pass struct iommu_dev_data to set_dte_entry() Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 02/17] iommu/amd: Enable Guest Translation before registering devices Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 03/17] iommu/amd: Introduce get_amd_iommu_from_dev() Vasant Hegde
2024-01-19 19:00 ` Jason Gunthorpe
2024-01-16 16:53 ` [PATCH v5 04/17] iommu/amd: Introduce struct protection_domain.pd_mode Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 05/17] iommu/amd: Introduce per-device GCR3 table Vasant Hegde
2024-01-19 19:03 ` Jason Gunthorpe
2024-01-16 16:53 ` [PATCH v5 06/17] iommu/amd: Use protection_domain.flags to check page table mode Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 07/17] iommu/amd: Introduce per-device domain ID to workaround potential TLB aliasing issue Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 08/17] iommu/amd: Add support for device based TLB invalidation Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 09/17] iommu/amd: Rearrange GCR3 table setup code Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 10/17] iommu: Introduce iommu_group_mutex_assert() Vasant Hegde
2024-01-19 19:09 ` Jason Gunthorpe
2024-01-22 6:24 ` Vasant Hegde
2024-01-22 18:00 ` Jason Gunthorpe
2024-01-23 5:27 ` Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 11/17] iommu/amd: Refactor helper function for setting / clearing GCR3 Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 12/17] iommu/amd: Refactor attaching / detaching device functions Vasant Hegde
2024-01-16 16:53 ` Vasant Hegde [this message]
2024-01-16 16:53 ` [PATCH v5 14/17] iommu/amd: Refactor GCR3 table helper functions Vasant Hegde
2024-01-19 19:59 ` Jason Gunthorpe
2024-01-22 10:23 ` Vasant Hegde
2024-01-22 18:26 ` Jason Gunthorpe
2024-01-23 8:54 ` Vasant Hegde
2024-01-25 1:46 ` Jason Gunthorpe
2024-01-25 12:11 ` Vasant Hegde
2024-01-25 15:53 ` Jason Gunthorpe
2024-01-16 16:53 ` [PATCH v5 15/17] iommu/amd: Remove unused flush pasid functions Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 16/17] iommu/amd: Rearrange device flush code Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 17/17] iommu/amd: Remove unused GCR3 table parameters from struct protection_domain Vasant Hegde
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240116165335.6043-14-vasant.hegde@amd.com \
--to=vasant.hegde@amd.com \
--cc=iommu@lists.linux.dev \
--cc=jgg@nvidia.com \
--cc=jgg@ziepe.ca \
--cc=joro@8bytes.org \
--cc=jsnitsel@redhat.com \
--cc=suravee.suthikulpanit@amd.com \
--cc=wei.huang2@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox