From: Jason Gunthorpe <jgg@ziepe.ca>
To: Vasant Hegde <vasant.hegde@amd.com>
Cc: iommu@lists.linux.dev, joro@8bytes.org,
suravee.suthikulpanit@amd.com, wei.huang2@amd.com,
jsnitsel@redhat.com
Subject: Re: [PATCH v5 14/17] iommu/amd: Refactor GCR3 table helper functions
Date: Fri, 19 Jan 2024 15:59:07 -0400 [thread overview]
Message-ID: <20240119195907.GN50608@ziepe.ca> (raw)
In-Reply-To: <20240116165335.6043-15-vasant.hegde@amd.com>
On Tue, Jan 16, 2024 at 04:53:32PM +0000, Vasant Hegde wrote:
> @@ -1738,22 +1744,22 @@ static int get_gcr3_levels(int pasids)
> return levels ? (DIV_ROUND_UP(levels, 9) - 1) : levels;
> }
>
> -/* Note: This function expects iommu_domain->lock to be held prior calling the function. */
> -static int setup_gcr3_table(struct protection_domain *domain, int pasids)
> +static int setup_gcr3_table(struct gcr3_tbl_info *gcr3_info,
> + int nid, int pasids)
> {
> int levels = get_gcr3_levels(pasids);
>
> if (levels > amd_iommu_max_glx_val)
> return -EINVAL;
>
> - domain->gcr3_tbl = alloc_pgtable_page(domain->nid, GFP_ATOMIC);
> - if (domain->gcr3_tbl == NULL)
> - return -ENOMEM;
> + if (gcr3_info->gcr3_tbl)
> + return -EBUSY;
>
> - domain->glx = levels;
> - domain->flags |= PD_IOMMUV2_MASK;
> + gcr3_info->gcr3_tbl = alloc_pgtable_page(nid, GFP_KERNEL);
> + if (gcr3_info->gcr3_tbl == NULL)
> + return -ENOMEM;
>
> - amd_iommu_domain_update(domain);
> + gcr3_info->glx = levels;
I think this patch should also move the domain_id
allocation/deallocation into setup_gcr3_table()/free_gcr3_table()
But it would really be better to move patch 7 to after the gcr3 layer
is cleaned and seperated from protection_domain so you don't have to
move it in the first place..
It is missing some error handling too
And domain_id_is_per_dev() is pretty redundant once you do that. See below
> @@ -1974,14 +1982,15 @@ static int do_attach(struct iommu_dev_data *dev_data,
> /* Init GCR3 table and update device table */
> if (domain->pd_mode == PD_MODE_V2) {
> /* By default, setup GCR3 table to support single PASID */
> - ret = setup_gcr3_table(dev_data->domain, 1);
> + ret = setup_gcr3_table(&dev_data->gcr3_info,
> + dev_to_node(dev_data->dev), 1);
IMO it is better to pass the struct amd_iommu * to setup_gcr3_table()
and then it can get the NUMA locality more sensibly via
dev_to_node(&iommu->dev->dev)
The iommu is the thing that will walk the table and needs the
locality, not the end point device. Locality should flow from
the affiliated amd_iommu always.
Jason
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 256b5507272ff9..fb94ffa269717b 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -1769,6 +1769,8 @@ static void free_gcr3_table(struct gcr3_tbl_info *gcr3_info)
free_page((unsigned long)gcr3_info->gcr3_tbl);
gcr3_info->gcr3_tbl = NULL;
+
+ domain_id_free(gcr3_info.domid);
}
/*
@@ -1788,7 +1790,7 @@ static int get_gcr3_levels(int pasids)
}
static int setup_gcr3_table(struct gcr3_tbl_info *gcr3_info,
- int nid, int pasids)
+ struct amd_iommu *iommu, int pasids)
{
int levels = get_gcr3_levels(pasids);
@@ -1798,12 +1800,19 @@ static int setup_gcr3_table(struct gcr3_tbl_info *gcr3_info,
if (gcr3_info->gcr3_tbl)
return -EBUSY;
- gcr3_info->gcr3_tbl = alloc_pgtable_page(nid, GFP_KERNEL);
+ gcr3_info->gcr3_tbl = alloc_pgtable_page(
+ iommu ? dev_to_node(&iommu->dev->dev) : 1, GFP_KERNEL);
if (gcr3_info->gcr3_tbl == NULL)
return -ENOMEM;
gcr3_info->glx = levels;
+ gcr3_info.domid = domain_id_alloc();
+ if (!gcr3_info.domid) {
+ free_page((unsigned long)gcr3_info->gcr3_tbl);
+ return -ENOMEM;
+ }
+
return 0;
}
@@ -1902,7 +1911,7 @@ static void set_dte_entry(struct amd_iommu *iommu,
struct dev_table_entry *dev_table = get_dev_table(iommu);
struct gcr3_tbl_info *gcr3_info = &dev_data->gcr3_info;
- if (domain_id_is_per_dev(domain))
+ if (gcr3_info && gcr3_info->gcr3_tbl) {
domid = dev_data->gcr3_info.domid;
else
domid = domain->id;
@@ -2018,15 +2027,10 @@ static int do_attach(struct iommu_dev_data *dev_data,
domain->dev_iommu[iommu->index] += 1;
domain->dev_cnt += 1;
- /* Allocate per device domain ID */
- if (domain_id_is_per_dev(domain))
- dev_data->gcr3_info.domid = domain_id_alloc();
-
/* Init GCR3 table and update device table */
if (domain->pd_mode == PD_MODE_V2) {
/* By default, setup GCR3 table to support single PASID */
- ret = setup_gcr3_table(&dev_data->gcr3_info,
- dev_to_node(dev_data->dev), 1);
+ ret = setup_gcr3_table(&dev_data->gcr3_info, iommu, 1);
if (ret)
return ret;
@@ -2073,10 +2077,6 @@ static void do_detach(struct iommu_dev_data *dev_data)
/* decrease reference counters - needs to happen after the flushes */
domain->dev_iommu[iommu->index] -= 1;
domain->dev_cnt -= 1;
-
- /* Free per device domain ID */
- if (domain_id_is_per_dev(domain))
- domain_id_free(dev_data->gcr3_info.domid);
}
/*
next prev parent reply other threads:[~2024-01-19 19:59 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-16 16:53 [PATCH v5 00/17] iommu/amd: SVA Support (part 3) - refactor support for GCR3 table Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 01/17] iommu/amd: Pass struct iommu_dev_data to set_dte_entry() Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 02/17] iommu/amd: Enable Guest Translation before registering devices Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 03/17] iommu/amd: Introduce get_amd_iommu_from_dev() Vasant Hegde
2024-01-19 19:00 ` Jason Gunthorpe
2024-01-16 16:53 ` [PATCH v5 04/17] iommu/amd: Introduce struct protection_domain.pd_mode Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 05/17] iommu/amd: Introduce per-device GCR3 table Vasant Hegde
2024-01-19 19:03 ` Jason Gunthorpe
2024-01-16 16:53 ` [PATCH v5 06/17] iommu/amd: Use protection_domain.flags to check page table mode Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 07/17] iommu/amd: Introduce per-device domain ID to workaround potential TLB aliasing issue Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 08/17] iommu/amd: Add support for device based TLB invalidation Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 09/17] iommu/amd: Rearrange GCR3 table setup code Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 10/17] iommu: Introduce iommu_group_mutex_assert() Vasant Hegde
2024-01-19 19:09 ` Jason Gunthorpe
2024-01-22 6:24 ` Vasant Hegde
2024-01-22 18:00 ` Jason Gunthorpe
2024-01-23 5:27 ` Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 11/17] iommu/amd: Refactor helper function for setting / clearing GCR3 Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 12/17] iommu/amd: Refactor attaching / detaching device functions Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 13/17] iommu/amd: Refactor protection_domain helper functions Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 14/17] iommu/amd: Refactor GCR3 table " Vasant Hegde
2024-01-19 19:59 ` Jason Gunthorpe [this message]
2024-01-22 10:23 ` Vasant Hegde
2024-01-22 18:26 ` Jason Gunthorpe
2024-01-23 8:54 ` Vasant Hegde
2024-01-25 1:46 ` Jason Gunthorpe
2024-01-25 12:11 ` Vasant Hegde
2024-01-25 15:53 ` Jason Gunthorpe
2024-01-16 16:53 ` [PATCH v5 15/17] iommu/amd: Remove unused flush pasid functions Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 16/17] iommu/amd: Rearrange device flush code Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 17/17] iommu/amd: Remove unused GCR3 table parameters from struct protection_domain Vasant Hegde
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