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From: Vasant Hegde <vasant.hegde@amd.com>
To: <iommu@lists.linux.dev>, <joro@8bytes.org>
Cc: <suravee.suthikulpanit@amd.com>, <wei.huang2@amd.com>,
	<jsnitsel@redhat.com>, <jgg@ziepe.ca>,
	Vasant Hegde <vasant.hegde@amd.com>,
	Jason Gunthorpe <jgg@nvidia.com>
Subject: [PATCH v5 16/17] iommu/amd: Rearrange device flush code
Date: Tue, 16 Jan 2024 16:53:34 +0000	[thread overview]
Message-ID: <20240116165335.6043-17-vasant.hegde@amd.com> (raw)
In-Reply-To: <20240116165335.6043-1-vasant.hegde@amd.com>

Consolidate all flush related code in one place so that its easy
to maintain.

No functional changes intended.

Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
---
 drivers/iommu/amd/iommu.c | 92 ++++++++++++++++++---------------------
 1 file changed, 43 insertions(+), 49 deletions(-)

diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index ac81872ce5c0..6e7436787c45 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -1649,6 +1649,49 @@ static void domain_flush_devices(struct protection_domain *domain)
 		device_flush_dte(dev_data);
 }
 
+static void update_device_table(struct protection_domain *domain)
+{
+	struct iommu_dev_data *dev_data;
+
+	list_for_each_entry(dev_data, &domain->dev_list, list) {
+		struct amd_iommu *iommu = rlookup_amd_iommu(dev_data->dev);
+
+		set_dte_entry(iommu, dev_data);
+		clone_aliases(iommu, dev_data->dev);
+	}
+}
+
+void amd_iommu_update_and_flush_device_table(struct protection_domain *domain)
+{
+	update_device_table(domain);
+	domain_flush_devices(domain);
+}
+
+void amd_iommu_domain_update(struct protection_domain *domain)
+{
+	/* Update device table */
+	amd_iommu_update_and_flush_device_table(domain);
+
+	/* Flush domain TLB(s) and wait for completion */
+	amd_iommu_domain_flush_all(domain);
+}
+
+int amd_iommu_complete_ppr(struct pci_dev *pdev, u32 pasid,
+			   int status, int tag)
+{
+	struct iommu_dev_data *dev_data;
+	struct amd_iommu *iommu;
+	struct iommu_cmd cmd;
+
+	dev_data = dev_iommu_priv_get(&pdev->dev);
+	iommu    = get_amd_iommu_from_dev(&pdev->dev);
+
+	build_complete_ppr(&cmd, dev_data->devid, pasid, status,
+			   tag, dev_data->pri_tlp);
+
+	return iommu_queue_command(iommu, &cmd);
+}
+
 /****************************************************************************
  *
  * The next functions belong to the domain allocation. A domain is
@@ -2173,39 +2216,6 @@ static struct iommu_group *amd_iommu_device_group(struct device *dev)
 	return acpihid_device_group(dev);
 }
 
-/*****************************************************************************
- *
- * The next functions belong to the dma_ops mapping/unmapping code.
- *
- *****************************************************************************/
-
-static void update_device_table(struct protection_domain *domain)
-{
-	struct iommu_dev_data *dev_data;
-
-	list_for_each_entry(dev_data, &domain->dev_list, list) {
-		struct amd_iommu *iommu = get_amd_iommu_from_dev_data(dev_data);
-
-		set_dte_entry(iommu, dev_data);
-		clone_aliases(iommu, dev_data->dev);
-	}
-}
-
-void amd_iommu_update_and_flush_device_table(struct protection_domain *domain)
-{
-	update_device_table(domain);
-	domain_flush_devices(domain);
-}
-
-void amd_iommu_domain_update(struct protection_domain *domain)
-{
-	/* Update device table */
-	amd_iommu_update_and_flush_device_table(domain);
-
-	/* Flush domain TLB(s) and wait for completion */
-	amd_iommu_domain_flush_all(domain);
-}
-
 /*****************************************************************************
  *
  * The following functions belong to the exported interface of AMD IOMMU
@@ -2804,22 +2814,6 @@ const struct iommu_ops amd_iommu_ops = {
 	}
 };
 
-int amd_iommu_complete_ppr(struct pci_dev *pdev, u32 pasid,
-			   int status, int tag)
-{
-	struct iommu_dev_data *dev_data;
-	struct amd_iommu *iommu;
-	struct iommu_cmd cmd;
-
-	dev_data = dev_iommu_priv_get(&pdev->dev);
-	iommu    = get_amd_iommu_from_dev(&pdev->dev);
-
-	build_complete_ppr(&cmd, dev_data->devid, pasid, status,
-			   tag, dev_data->pri_tlp);
-
-	return iommu_queue_command(iommu, &cmd);
-}
-
 #ifdef CONFIG_IRQ_REMAP
 
 /*****************************************************************************
-- 
2.31.1


  parent reply	other threads:[~2024-01-16 16:58 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-16 16:53 [PATCH v5 00/17] iommu/amd: SVA Support (part 3) - refactor support for GCR3 table Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 01/17] iommu/amd: Pass struct iommu_dev_data to set_dte_entry() Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 02/17] iommu/amd: Enable Guest Translation before registering devices Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 03/17] iommu/amd: Introduce get_amd_iommu_from_dev() Vasant Hegde
2024-01-19 19:00   ` Jason Gunthorpe
2024-01-16 16:53 ` [PATCH v5 04/17] iommu/amd: Introduce struct protection_domain.pd_mode Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 05/17] iommu/amd: Introduce per-device GCR3 table Vasant Hegde
2024-01-19 19:03   ` Jason Gunthorpe
2024-01-16 16:53 ` [PATCH v5 06/17] iommu/amd: Use protection_domain.flags to check page table mode Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 07/17] iommu/amd: Introduce per-device domain ID to workaround potential TLB aliasing issue Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 08/17] iommu/amd: Add support for device based TLB invalidation Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 09/17] iommu/amd: Rearrange GCR3 table setup code Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 10/17] iommu: Introduce iommu_group_mutex_assert() Vasant Hegde
2024-01-19 19:09   ` Jason Gunthorpe
2024-01-22  6:24     ` Vasant Hegde
2024-01-22 18:00       ` Jason Gunthorpe
2024-01-23  5:27         ` Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 11/17] iommu/amd: Refactor helper function for setting / clearing GCR3 Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 12/17] iommu/amd: Refactor attaching / detaching device functions Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 13/17] iommu/amd: Refactor protection_domain helper functions Vasant Hegde
2024-01-16 16:53 ` [PATCH v5 14/17] iommu/amd: Refactor GCR3 table " Vasant Hegde
2024-01-19 19:59   ` Jason Gunthorpe
2024-01-22 10:23     ` Vasant Hegde
2024-01-22 18:26       ` Jason Gunthorpe
2024-01-23  8:54         ` Vasant Hegde
2024-01-25  1:46           ` Jason Gunthorpe
2024-01-25 12:11             ` Vasant Hegde
2024-01-25 15:53               ` Jason Gunthorpe
2024-01-16 16:53 ` [PATCH v5 15/17] iommu/amd: Remove unused flush pasid functions Vasant Hegde
2024-01-16 16:53 ` Vasant Hegde [this message]
2024-01-16 16:53 ` [PATCH v5 17/17] iommu/amd: Remove unused GCR3 table parameters from struct protection_domain Vasant Hegde

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