Re: [PATCH 7/9] iommupt/x86: Support SW bits and permit PT_FEAT_DMA_INCOHERENT

[Jason Gunthorpe <jgg@nvidia.com>]

On Tue, Jul 22, 2025 at 01:17:59PM +0800, Baolu Lu wrote:
> > +static inline u64 x86_64_pt_sw_bit(unsigned int bitnr)
> > +{
> > +	/* Bits marked Ignored/AVL in the specification */
> > +	switch (bitnr) {
> > +	case 0:
> > +		return BIT(9);
> > +	case 1:
> > +		return BIT(11);
> > +	case 2 ... 12:
> > +		return BIT_ULL((bitnr - 2) + 52);
> 
> Just out of curiosity, why bit 63 can't be used as the sw bit?

It is not ignored, but used for XD/NX:

	X86_64_FMT_XD = BIT_ULL(63),

Which should comes out for ATS replies.

The existing drivers didn't wire it up, so I left it alone as well,
but the XD should be linked to IOMMU_NOEXEC. There are some little
things like this we can evaluate after. The idea here is to try hard
to make no change to the drivers existing behavior.

Thanks,
Jason