Re: [PATCH 8/9] iommu/vt-d: Use the generic iommu page table

[Jason Gunthorpe <jgg@nvidia.com>]

On Tue, Jul 22, 2025 at 02:44:01PM +0800, Baolu Lu wrote:
> > +	/* First stage always uses scalable mode */
> > +	if (WARN_ON(!ecap_smpwc(iommu->ecap)))
> > +		return ERR_PTR(-EINVAL);
> 
> I don't follow here. Why WARN_ON and return failure when hardware
> doesn't support a feature?

Oh, that's a rebasing typo, it was supposed to be been replaced with this:

> > +	if (ecap_smpwc(iommu->ecap))
> > +		cfg.common.features |= BIT(PT_FEAT_DMA_INCOHERENT);
> 
> My understanding is that if hardware possibly walks the page table
> incoherently, we need to set up the PT_FEAT_DMA_INCOHERENT feature;
> otherwise, there is no need.

Yes

> If that's correct, perhaps what we need here is:
> 
> 	if (!ecap_smpwc(iommu->ecap))
> 		cfg.common.features |= BIT(PT_FEAT_DMA_INCOHERENT);

Yes, the ! is needed

> > +	if (WARN_ON(!iommu_paging_structure_coherency(iommu)))
> > +		return ERR_PTR(-EINVAL);
> > +	if (!iommu_paging_structure_coherency(iommu))
> > +		cfg.common.features |= BIT(PT_FEAT_DMA_INCOHERENT);
> 
> Similarly here.

Yes, same rebasing mistake

Thanks,
Jason