From: <gerg@snapgear.com>
To: linux-m68k@vger.kernel.org, uclinux-dev@uclinux.org
Cc: Greg Ungerer <gerg@uclinux.org>
Subject: [PATCH 14/36] m68k: modify ColdFire 54xx cache support for MMU enabled
Date: Tue, 25 Oct 2011 17:19:06 +1000 [thread overview]
Message-ID: <1319527168-11166-15-git-send-email-gerg@snapgear.com> (raw)
In-Reply-To: <1319527168-11166-1-git-send-email-gerg@snapgear.com>
From: Greg Ungerer <gerg@uclinux.org>
Modify the cache setup for the ColdFire 54xx parts when running with
the MMU enabled.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
---
arch/m68k/include/asm/m54xxacr.h | 26 +++++++++++++++++++++++++-
1 files changed, 25 insertions(+), 1 deletions(-)
diff --git a/arch/m68k/include/asm/m54xxacr.h b/arch/m68k/include/asm/m54xxacr.h
index 16a1835..c8b21b6 100644
--- a/arch/m68k/include/asm/m54xxacr.h
+++ b/arch/m68k/include/asm/m54xxacr.h
@@ -39,6 +39,7 @@
#define ACR_CM_OFF_PRE 0x00000040 /* No cache, precise */
#define ACR_CM_OFF_IMP 0x00000060 /* No cache, imprecise */
#define ACR_CM 0x00000060 /* Cache mode mask */
+#define ACR_SP 0x00000008 /* Supervisor protect */
#define ACR_WPROTECT 0x00000004 /* Write protect */
#if defined(CONFIG_M5407)
@@ -56,6 +57,11 @@
#define CACHE_LINE_SIZE 0x0010 /* 16 bytes */
#define CACHE_WAYS 4 /* 4 ways */
+#define ICACHE_SET_MASK ((ICACHE_SIZE / 64 - 1) << CACHE_WAYS)
+#define DCACHE_SET_MASK ((DCACHE_SIZE / 64 - 1) << CACHE_WAYS)
+#define ICACHE_MAX_ADDR ICACHE_SET_MASK
+#define DCACHE_MAX_ADDR DCACHE_SET_MASK
+
/*
* Version 4 cores have a true harvard style separate instruction
* and data cache. Enable data and instruction caches, also enable write
@@ -73,6 +79,24 @@
#else
#define CACHE_MODE (CACR_DEC+CACR_DESB+CACR_DDCM_P+CACR_BEC+CACR_IEC+CACR_EUSP)
#endif
+#define CACHE_INIT (CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
+
+#if defined(CONFIG_MMU)
+/*
+ * If running with the MMU enabled then we need to map the internal
+ * register region as non-cacheable. And then we map all or RAM as
+ * cacheable and supervisor access only.
+ */
+#define ACR0_MODE (0xf00f0000+ACR_ENABLE+ACR_SUPER+ACR_CM_OFF_PRE+ACR_SP)
+#define ACR1_MODE (0x000f0000+ACR_ENABLE+ACR_SUPER+ACR_CM_OFF_PRE+ACR_SP)
+#define ACR2_MODE 0
+#define ACR3_MODE (0x000f0000+ACR_ENABLE+ACR_SUPER+ACR_SP)
+
+#else
+
+/*
+ * For the non-MMU enabled case we map all of RAM as cacheable.
+ */
#if defined(CONFIG_CACHE_COPYBACK)
#define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_CP)
#else
@@ -80,7 +104,6 @@
#endif
#define INSN_CACHE_MODE (ACR_ENABLE+ACR_ANY)
-#define CACHE_INIT (CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
#define CACHE_INVALIDATE (CACHE_MODE+CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
#define CACHE_INVALIDATEI (CACHE_MODE+CACR_BCINVA+CACR_ICINVA)
#define CACHE_INVALIDATED (CACHE_MODE+CACR_DCINVA)
@@ -94,4 +117,5 @@
#define CACHE_PUSH
#endif
+#endif /* CONFIG_MMU */
#endif /* m54xxacr_h */
--
1.7.0.4
next prev parent reply other threads:[~2011-10-25 7:19 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-10-25 7:18 [PATCH 00/36] m68k: ColdFire MMU support gerg
2011-10-25 7:18 ` [PATCH 01/36] m68k: add machine and CPU definitions for ColdFire cores gerg
2011-10-25 7:18 ` [PATCH 02/36] m68k: show ColdFire CPU/FPU/MMU type gerg
2011-10-25 7:18 ` [PATCH 03/36] m68k: definitions for the ColdFire V4e MMU hardware gerg
2011-10-25 7:18 ` [PATCH 04/36] m68k: make old interrupt code conditional on correct CPU types gerg
2011-10-25 7:18 ` [PATCH 05/36] m68k: add TASK definitions for ColdFires running with MMU gerg
2011-10-25 7:18 ` [PATCH 06/36] m68k: modify user space access functions to support ColdFire CPUs gerg
2011-10-30 13:02 ` Geert Uytterhoeven
2011-10-31 5:03 ` Greg Ungerer
2011-10-25 7:18 ` [PATCH 07/36] m68k: add ColdFire 54xx CPU MMU memory init code gerg
2011-10-25 7:19 ` [PATCH 08/36] m68k: init the MMU hardware for the 54xx ColdFire gerg
2011-10-25 7:19 ` [PATCH 09/36] m68k: set register a2 to current if MMU enabled on ColdFire gerg
2011-10-30 13:06 ` Geert Uytterhoeven
2011-10-31 4:19 ` Greg Ungerer
2011-10-25 7:19 ` [PATCH 10/36] m68k: page table support definitions and code for ColdFire MMU gerg
2011-10-30 13:07 ` Geert Uytterhoeven
2011-10-25 7:19 ` [PATCH 11/36] m68k: add page table size definitions for ColdFire V4e MMU gerg
2011-10-25 7:19 ` [PATCH 12/36] m68k: add ColdFire paging exception handling code gerg
2011-10-25 7:19 ` [PATCH 13/36] m68k: add cache support for V4e ColdFire cores running with MMU enabled gerg
2011-10-25 7:19 ` gerg [this message]
2011-10-25 7:19 ` [PATCH 15/36] m68k: add TLB flush support for the ColdFire V4e MMU hardware gerg
2011-10-30 13:26 ` Geert Uytterhoeven
2011-10-25 7:19 ` [PATCH 16/36] m68k: set ColdFire MMU page size gerg
2011-10-30 13:29 ` Geert Uytterhoeven
2011-10-31 4:41 ` Greg Ungerer
2011-10-25 7:19 ` [PATCH 17/36] m68k: ColdFire with MMU does not support separate address spaces gerg
2011-10-25 7:19 ` [PATCH 18/36] m68k: ColdFire V4e MMU context support code gerg
2011-10-25 7:19 ` [PATCH 19/36] m68k: use tracehook_report_syscall_entry/exit for ColdFire MMU ptrace path gerg
2011-10-25 7:19 ` [PATCH 20/36] m68k: ColdFire with MMU needs simpler lib checksum code gerg
2011-10-25 7:19 ` [PATCH 21/36] m68k: modify cache push and clear code for ColdFire with MMU enable gerg
2011-10-25 7:19 ` [PATCH 22/36] m68k: use ColdFire V4e MMU flags when ioremapping() gerg
2011-10-25 7:19 ` [PATCH 23/36] m68k: ColdFire V4e MMU paginit init code and miss handler gerg
2011-10-30 15:56 ` Finn Thain
2011-10-31 4:46 ` Greg Ungerer
2011-10-25 7:19 ` [PATCH 24/36] m68k: compile appropriate mm arch files for ColdFire V4e MMU support gerg
2011-10-30 13:46 ` Geert Uytterhoeven
2011-10-31 5:39 ` Greg Ungerer
2011-10-25 7:19 ` [PATCH 25/36] m68k: create ColdFire MMU pgalloc code gerg
2011-10-25 7:19 ` [PATCH 26/36] m68k: use non-MMU entry.S code when compiling for ColdFire CPU gerg
2011-10-25 7:19 ` [PATCH 27/36] m68k: add code to setup a ColdFire 54xx platform when MMU enabled gerg
2011-10-30 13:39 ` Geert Uytterhoeven
2011-10-31 4:59 ` Greg Ungerer
2011-10-25 7:19 ` [PATCH 28/36] m68k: ColdFire with MMU enabled uses same clocking code as non-MMU gerg
2011-10-25 7:19 ` [PATCH 29/36] m68k: use non-MMU linker script for ColdFire MMU builds gerg
2011-10-25 7:19 ` [PATCH 30/36] m68k: adjustments to stack frame for ColdFire with MMU enabled gerg
2011-10-25 7:19 ` [PATCH 31/36] m68k: completely disable FPU support for ColdFire gerg
2011-10-30 15:56 ` Finn Thain
2011-10-25 7:19 ` [PATCH 32/36] m68k: use new style interrupt handling for ColdFire with MMU enabled gerg
2011-10-25 7:19 ` [PATCH 33/36] m68k: define a ack_bad_irq() function for ColdFire with MMU gerg
2011-10-25 7:19 ` [PATCH 34/36] m68k: add ColdFire with MMU enabled support to the m68k mem init code gerg
2011-10-25 7:19 ` [PATCH 35/36] m68k: config option adjustments for configuring ColdFire with MMU gerg
2011-10-30 13:42 ` Geert Uytterhoeven
2011-10-25 7:19 ` [PATCH 36/36] m68k: allow ColdFire 547x and 548x CPUs to be built with MMU enabled gerg
2011-10-30 13:47 ` [PATCH 00/36] m68k: ColdFire MMU support Geert Uytterhoeven
2011-10-31 5:46 ` Greg Ungerer
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