public inbox for linux-m68k@lists.linux-m68k.org
 help / color / mirror / Atom feed
From: <gerg@snapgear.com>
To: linux-m68k@vger.kernel.org, uclinux-dev@uclinux.org
Cc: Greg Ungerer <gerg@uclinux.org>
Subject: [PATCH 18/36] m68k: ColdFire V4e MMU context support code
Date: Tue, 25 Oct 2011 17:19:10 +1000	[thread overview]
Message-ID: <1319527168-11166-19-git-send-email-gerg@snapgear.com> (raw)
In-Reply-To: <1319527168-11166-1-git-send-email-gerg@snapgear.com>

From: Greg Ungerer <gerg@uclinux.org>

Add code to manage the context's of the ColdFire V4e MMU.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
---
 arch/m68k/include/asm/atomic.h      |   10 ++
 arch/m68k/include/asm/mmu_context.h |  250 ++++++++++++++++++++++++++++-------
 2 files changed, 211 insertions(+), 49 deletions(-)

diff --git a/arch/m68k/include/asm/atomic.h b/arch/m68k/include/asm/atomic.h
index 65c6be6..4eba796 100644
--- a/arch/m68k/include/asm/atomic.h
+++ b/arch/m68k/include/asm/atomic.h
@@ -55,6 +55,16 @@ static inline int atomic_dec_and_test(atomic_t *v)
 	return c != 0;
 }
 
+static inline int atomic_dec_and_test_lt(atomic_t *v)
+{
+	char c;
+	__asm__ __volatile__(
+		"subql #1,%1; slt %0"
+		: "=d" (c), "=m" (*v)
+		: "m" (*v));
+	return c != 0;
+}
+
 static inline int atomic_inc_and_test(atomic_t *v)
 {
 	char c;
diff --git a/arch/m68k/include/asm/mmu_context.h b/arch/m68k/include/asm/mmu_context.h
index 7d4341e..d30afbd 100644
--- a/arch/m68k/include/asm/mmu_context.h
+++ b/arch/m68k/include/asm/mmu_context.h
@@ -8,7 +8,206 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 }
 
 #ifdef CONFIG_MMU
-#ifndef CONFIG_SUN3
+
+#if defined(CONFIG_COLDFIRE)
+
+#include <asm/atomic.h>
+#include <asm/bitops.h>
+#include <asm/mcfmmu.h>
+#include <asm/mmu.h>
+
+#define NO_CONTEXT		256
+#define LAST_CONTEXT		255
+#define FIRST_CONTEXT		1
+
+extern unsigned long context_map[];
+extern mm_context_t next_mmu_context;
+
+extern atomic_t nr_free_contexts;
+extern struct mm_struct *context_mm[LAST_CONTEXT+1];
+extern void steal_context(void);
+
+static inline void get_mmu_context(struct mm_struct *mm)
+{
+	mm_context_t ctx;
+
+	if (mm->context != NO_CONTEXT)
+		return;
+	while (atomic_dec_and_test_lt(&nr_free_contexts)) {
+		atomic_inc(&nr_free_contexts);
+		steal_context();
+	}
+	ctx = next_mmu_context;
+	while (test_and_set_bit(ctx, context_map)) {
+		ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx);
+		if (ctx > LAST_CONTEXT)
+			ctx = 0;
+	}
+	next_mmu_context = (ctx + 1) & LAST_CONTEXT;
+	mm->context = ctx;
+	context_mm[ctx] = mm;
+}
+
+/*
+ * Set up the context for a new address space.
+ */
+#define init_new_context(tsk, mm)	(((mm)->context = NO_CONTEXT), 0)
+
+/*
+ * We're finished using the context for an address space.
+ */
+static inline void destroy_context(struct mm_struct *mm)
+{
+	if (mm->context != NO_CONTEXT) {
+		clear_bit(mm->context, context_map);
+		mm->context = NO_CONTEXT;
+		atomic_inc(&nr_free_contexts);
+	}
+}
+
+static inline void set_context(mm_context_t context, pgd_t *pgd)
+{
+	__asm__ __volatile__ ("movec %0,%%asid" : : "d" (context));
+}
+
+static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
+	struct task_struct *tsk)
+{
+	get_mmu_context(tsk->mm);
+	set_context(tsk->mm->context, next->pgd);
+}
+
+/*
+ * After we have set current->mm to a new value, this activates
+ * the context for the new mm so we see the new mappings.
+ */
+static inline void activate_mm(struct mm_struct *active_mm,
+	struct mm_struct *mm)
+{
+	get_mmu_context(mm);
+	set_context(mm->context, mm->pgd);
+}
+
+#define deactivate_mm(tsk, mm) do { } while (0)
+
+extern void mmu_context_init(void);
+#define prepare_arch_switch(next) load_ksp_mmu(next)
+
+static inline void load_ksp_mmu(struct task_struct *task)
+{
+	unsigned long flags;
+	struct mm_struct *mm;
+	int asid;
+	pgd_t *pgd;
+	pmd_t *pmd;
+	pte_t *pte;
+	unsigned long mmuar;
+
+	local_irq_save(flags);
+	mmuar = task->thread.ksp;
+
+	/* Search for a valid TLB entry, if one is found, don't remap */
+	mmu_write(MMUAR, mmuar);
+	mmu_write(MMUOR, MMUOR_STLB | MMUOR_ADR);
+	if (mmu_read(MMUSR) & MMUSR_HIT)
+		goto end;
+
+	if (mmuar >= PAGE_OFFSET) {
+		mm = &init_mm;
+	} else {
+		pr_info("load_ksp_mmu: non-kernel mm found: 0x%p\n", task->mm);
+		mm = task->mm;
+	}
+
+	if (!mm)
+		goto bug;
+
+	pgd = pgd_offset(mm, mmuar);
+	if (pgd_none(*pgd))
+		goto bug;
+
+	pmd = pmd_offset(pgd, mmuar);
+	if (pmd_none(*pmd))
+		goto bug;
+
+	pte = (mmuar >= PAGE_OFFSET) ? pte_offset_kernel(pmd, mmuar)
+				     : pte_offset_map(pmd, mmuar);
+	if (pte_none(*pte) || !pte_present(*pte))
+		goto bug;
+
+	set_pte(pte, pte_mkyoung(*pte));
+	asid = mm->context & 0xff;
+	if (!pte_dirty(*pte) && mmuar <= PAGE_OFFSET)
+		set_pte(pte, pte_wrprotect(*pte));
+
+	mmu_write(MMUTR, (mmuar & PAGE_MASK) | (asid << CF_ASID_MMU_SHIFT) |
+		(((int)(pte->pte) & (int)CF_PAGE_MMUTR_MASK)
+		>> CF_PAGE_MMUTR_SHIFT) | MMUTR_V);
+
+	mmu_write(MMUDR, (pte_val(*pte) & PAGE_MASK) |
+		((pte->pte) & CF_PAGE_MMUDR_MASK) | MMUDR_SZ_8KB | MMUDR_X);
+
+	mmu_write(MMUOR, MMUOR_ACC | MMUOR_UAA);
+
+	goto end;
+
+bug:
+	pr_info("ksp load failed: mm=0x%p ksp=0x08%lx\n", mm, mmuar);
+end:
+	local_irq_restore(flags);
+}
+
+#elif defined(CONFIG_SUN3)
+#include <asm/sun3mmu.h>
+#include <linux/sched.h>
+
+extern unsigned long get_free_context(struct mm_struct *mm);
+extern void clear_context(unsigned long context);
+
+/* set the context for a new task to unmapped */
+static inline int init_new_context(struct task_struct *tsk,
+				   struct mm_struct *mm)
+{
+	mm->context = SUN3_INVALID_CONTEXT;
+	return 0;
+}
+
+/* find the context given to this process, and if it hasn't already
+   got one, go get one for it. */
+static inline void get_mmu_context(struct mm_struct *mm)
+{
+	if (mm->context == SUN3_INVALID_CONTEXT)
+		mm->context = get_free_context(mm);
+}
+
+/* flush context if allocated... */
+static inline void destroy_context(struct mm_struct *mm)
+{
+	if (mm->context != SUN3_INVALID_CONTEXT)
+		clear_context(mm->context);
+}
+
+static inline void activate_context(struct mm_struct *mm)
+{
+	get_mmu_context(mm);
+	sun3_put_context(mm->context);
+}
+
+static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
+			     struct task_struct *tsk)
+{
+	activate_context(tsk->mm);
+}
+
+#define deactivate_mm(tsk, mm)	do { } while (0)
+
+static inline void activate_mm(struct mm_struct *prev_mm,
+			       struct mm_struct *next_mm)
+{
+	activate_context(next_mm);
+}
+
+#else
 
 #include <asm/setup.h>
 #include <asm/page.h>
@@ -103,55 +302,8 @@ static inline void activate_mm(struct mm_struct *prev_mm,
 		switch_mm_0460(next_mm);
 }
 
-#else  /* CONFIG_SUN3 */
-#include <asm/sun3mmu.h>
-#include <linux/sched.h>
-
-extern unsigned long get_free_context(struct mm_struct *mm);
-extern void clear_context(unsigned long context);
-
-/* set the context for a new task to unmapped */
-static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
-{
-	mm->context = SUN3_INVALID_CONTEXT;
-	return 0;
-}
-
-/* find the context given to this process, and if it hasn't already
-   got one, go get one for it. */
-static inline void get_mmu_context(struct mm_struct *mm)
-{
-	if(mm->context == SUN3_INVALID_CONTEXT)
-		mm->context = get_free_context(mm);
-}
-
-/* flush context if allocated... */
-static inline void destroy_context(struct mm_struct *mm)
-{
-	if(mm->context != SUN3_INVALID_CONTEXT)
-		clear_context(mm->context);
-}
-
-static inline void activate_context(struct mm_struct *mm)
-{
-	get_mmu_context(mm);
-	sun3_put_context(mm->context);
-}
-
-static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk)
-{
-	activate_context(tsk->mm);
-}
-
-#define deactivate_mm(tsk,mm)	do { } while (0)
-
-static inline void activate_mm(struct mm_struct *prev_mm,
-			       struct mm_struct *next_mm)
-{
-	activate_context(next_mm);
-}
-
 #endif
+
 #else /* !CONFIG_MMU */
 
 static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
-- 
1.7.0.4

  parent reply	other threads:[~2011-10-25  7:19 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-10-25  7:18 [PATCH 00/36] m68k: ColdFire MMU support gerg
2011-10-25  7:18 ` [PATCH 01/36] m68k: add machine and CPU definitions for ColdFire cores gerg
2011-10-25  7:18 ` [PATCH 02/36] m68k: show ColdFire CPU/FPU/MMU type gerg
2011-10-25  7:18 ` [PATCH 03/36] m68k: definitions for the ColdFire V4e MMU hardware gerg
2011-10-25  7:18 ` [PATCH 04/36] m68k: make old interrupt code conditional on correct CPU types gerg
2011-10-25  7:18 ` [PATCH 05/36] m68k: add TASK definitions for ColdFires running with MMU gerg
2011-10-25  7:18 ` [PATCH 06/36] m68k: modify user space access functions to support ColdFire CPUs gerg
2011-10-30 13:02   ` Geert Uytterhoeven
2011-10-31  5:03     ` Greg Ungerer
2011-10-25  7:18 ` [PATCH 07/36] m68k: add ColdFire 54xx CPU MMU memory init code gerg
2011-10-25  7:19 ` [PATCH 08/36] m68k: init the MMU hardware for the 54xx ColdFire gerg
2011-10-25  7:19 ` [PATCH 09/36] m68k: set register a2 to current if MMU enabled on ColdFire gerg
2011-10-30 13:06   ` Geert Uytterhoeven
2011-10-31  4:19     ` Greg Ungerer
2011-10-25  7:19 ` [PATCH 10/36] m68k: page table support definitions and code for ColdFire MMU gerg
2011-10-30 13:07   ` Geert Uytterhoeven
2011-10-25  7:19 ` [PATCH 11/36] m68k: add page table size definitions for ColdFire V4e MMU gerg
2011-10-25  7:19 ` [PATCH 12/36] m68k: add ColdFire paging exception handling code gerg
2011-10-25  7:19 ` [PATCH 13/36] m68k: add cache support for V4e ColdFire cores running with MMU enabled gerg
2011-10-25  7:19 ` [PATCH 14/36] m68k: modify ColdFire 54xx cache support for " gerg
2011-10-25  7:19 ` [PATCH 15/36] m68k: add TLB flush support for the ColdFire V4e MMU hardware gerg
2011-10-30 13:26   ` Geert Uytterhoeven
2011-10-25  7:19 ` [PATCH 16/36] m68k: set ColdFire MMU page size gerg
2011-10-30 13:29   ` Geert Uytterhoeven
2011-10-31  4:41     ` Greg Ungerer
2011-10-25  7:19 ` [PATCH 17/36] m68k: ColdFire with MMU does not support separate address spaces gerg
2011-10-25  7:19 ` gerg [this message]
2011-10-25  7:19 ` [PATCH 19/36] m68k: use tracehook_report_syscall_entry/exit for ColdFire MMU ptrace path gerg
2011-10-25  7:19 ` [PATCH 20/36] m68k: ColdFire with MMU needs simpler lib checksum code gerg
2011-10-25  7:19 ` [PATCH 21/36] m68k: modify cache push and clear code for ColdFire with MMU enable gerg
2011-10-25  7:19 ` [PATCH 22/36] m68k: use ColdFire V4e MMU flags when ioremapping() gerg
2011-10-25  7:19 ` [PATCH 23/36] m68k: ColdFire V4e MMU paginit init code and miss handler gerg
2011-10-30 15:56   ` Finn Thain
2011-10-31  4:46     ` Greg Ungerer
2011-10-25  7:19 ` [PATCH 24/36] m68k: compile appropriate mm arch files for ColdFire V4e MMU support gerg
2011-10-30 13:46   ` Geert Uytterhoeven
2011-10-31  5:39     ` Greg Ungerer
2011-10-25  7:19 ` [PATCH 25/36] m68k: create ColdFire MMU pgalloc code gerg
2011-10-25  7:19 ` [PATCH 26/36] m68k: use non-MMU entry.S code when compiling for ColdFire CPU gerg
2011-10-25  7:19 ` [PATCH 27/36] m68k: add code to setup a ColdFire 54xx platform when MMU enabled gerg
2011-10-30 13:39   ` Geert Uytterhoeven
2011-10-31  4:59     ` Greg Ungerer
2011-10-25  7:19 ` [PATCH 28/36] m68k: ColdFire with MMU enabled uses same clocking code as non-MMU gerg
2011-10-25  7:19 ` [PATCH 29/36] m68k: use non-MMU linker script for ColdFire MMU builds gerg
2011-10-25  7:19 ` [PATCH 30/36] m68k: adjustments to stack frame for ColdFire with MMU enabled gerg
2011-10-25  7:19 ` [PATCH 31/36] m68k: completely disable FPU support for ColdFire gerg
2011-10-30 15:56   ` Finn Thain
2011-10-25  7:19 ` [PATCH 32/36] m68k: use new style interrupt handling for ColdFire with MMU enabled gerg
2011-10-25  7:19 ` [PATCH 33/36] m68k: define a ack_bad_irq() function for ColdFire with MMU gerg
2011-10-25  7:19 ` [PATCH 34/36] m68k: add ColdFire with MMU enabled support to the m68k mem init code gerg
2011-10-25  7:19 ` [PATCH 35/36] m68k: config option adjustments for configuring ColdFire with MMU gerg
2011-10-30 13:42   ` Geert Uytterhoeven
2011-10-25  7:19 ` [PATCH 36/36] m68k: allow ColdFire 547x and 548x CPUs to be built with MMU enabled gerg
2011-10-30 13:47 ` [PATCH 00/36] m68k: ColdFire MMU support Geert Uytterhoeven
2011-10-31  5:46   ` Greg Ungerer

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1319527168-11166-19-git-send-email-gerg@snapgear.com \
    --to=gerg@snapgear.com \
    --cc=gerg@uclinux.org \
    --cc=linux-m68k@vger.kernel.org \
    --cc=uclinux-dev@uclinux.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox