[PATCH v2 0/7] media: ipu6: add IPU8 support

[Divyamani Tripathi <divyamani.tripathi@intel.com>]

This series adds IPU8 support to the unified ipu6 driver
(drivers/media/pci/intel/ipu6), porting the applicable parts of the
existing "staging: ipu7" IPU8 enablement and completing the pieces
that staging left out, or that this driver's different internal
structure (no abi/ split, single shared power-sequencing path)
required to be done differently.

IPU8 shares its InSys firmware ABI, buttress and MMU/ZLX/UAO hardware
generation with IPU7/IPU7P5, so most of this series is chip
identification, PCI probe wiring, and porting/adapting the existing
IPU7-family codepaths and hardware tables rather than introducing new
driver infrastructure.

Scope: ISYS (raw frame capture) is the primary target and what has
been validated on real hardware. PSYS platform enablement (MMU table
and PLL power sequencing) is included because staging ipu7 already
ships it as part of its original upstream submission - porting it
here is not new, unreviewed psys pipeline support, just completing
hardware enablement that already exists upstream in the sibling
driver. This driver still has no psys pipeline consumer, so it only
affects the psys bus device's power sequencing and MMU setup, not a
processing pipeline.

Patch summary:
 - Patches 1-2 bring the InSys firmware ABI up to date and add IPU8
   chip identification (IS_IPU8()).
 - Patch 3 adds the IPU8-specific (ABI 1.0.14) InSys message layout
   and selects the firmware boot-message major version IPU8 expects;
   without it the IPU8 firmware rejects the boot handshake
   (IA_GOFO_FW_BOOT_STATE_CRIT_MSG_VERSION, 0xdead0301), confirmed on
   real hardware.
 - Patch 4 makes the ipu7 GPREG stride configurable, since IPU8/NVL
   uses a different stride than IPU7/IPU7P5.
 - Patch 5 completes ISYS chip/MMU enablement (NDE/TLBID_HASH register
   values, TSC sync, ISYS MMU/ZLX/UAO hardware table); adds IS_IPU8()
   alongside the existing IS_IPU7() check at each site that needs to
   follow the IPU7-family codepath, keeping the two checks independent
   instead of widening IS_IPU7() to also match IPU8. Without it IPU8
   firmware boot fails with IA_GOFO_FW_BOOT_STATE_CRIT_UNSPECIFIED
   (0xdead0001), also confirmed on real hardware.
 - Patch 6 completes PSYS platform enablement (MMU table, PLL power
   sequencing).
 - Patch 7 adds the IPU8 PCI device ID, wires up the probe, and adds
   IPU8's own buttress control ratio.

All hardware table/register values are transcribed from the
corresponding staging ipu7 tables (same silicon), not re-derived.

Validation: compiles cleanly (W=1); tested on real IPU8 hardware with
two OV13B10 sensors - driver probes, ISYS firmware boots, and the
media controller topology enumerates both sensors' CSI2/capture nodes
correctly. Series verified with checkpatch.pl --strict (0 errors, 0
warnings) and applies cleanly on top of next.

Changes since v1:
- Patch 3 ("add IPU8 InSys ABI 1.0.14 support"): copy the union member
  into a local struct via plain assignment instead of memcpy(), since
  a type-safe copy of msg->ipu7.stream is simpler and the union still
  requires copying it out before overwriting it in place
  (Sakari Ailus).
- Patch 4 ("make ipu7 gpreg stride configurable as per IPU version"):
  use separate IS_IPU7()/IS_IPU8() checks in
  ipu6_internal_pdata_init() instead of an if/else, so a third/unknown
  IPU version isn't silently treated as IPU7.

Divyamani Tripathi (7):
  media: ipu6: update ipu7 InSys ABI to 1.2.1.20251215_224531
  media: ipu6: add IS_IPU8() macro
  media: ipu6: add IPU8 InSys ABI 1.0.14 support
  media: ipu6: make ipu7 gpreg stride configurable as per IPU version
  media: ipu6: add IPU8 isys chip/MMU enablement
  media: ipu6: add IPU8 psys MMU table and PLL power sequencing
  media: ipu6: add PCI ID for IPU8

 drivers/media/pci/intel/ipu6/ipu6-buttress.c  |  61 +++-
 drivers/media/pci/intel/ipu6/ipu6-cpd.c       |   2 +-
 drivers/media/pci/intel/ipu6/ipu6-isys-csi2.c |  15 +-
 drivers/media/pci/intel/ipu6/ipu6-isys.c      |  14 +-
 drivers/media/pci/intel/ipu6/ipu6-isys.h      |   3 +
 drivers/media/pci/intel/ipu6/ipu6-mmu.c       |   4 +-
 .../intel/ipu6/ipu6-platform-buttress-regs.h  |   6 +
 drivers/media/pci/intel/ipu6/ipu6.c           |  59 +++-
 drivers/media/pci/intel/ipu6/ipu6.h           |   5 +
 drivers/media/pci/intel/ipu6/ipu7-fw-isys.c   |  85 +++++-
 drivers/media/pci/intel/ipu6/ipu7-fw-isys.h   |  78 +++++-
 .../media/pci/intel/ipu6/ipu7-isys-csi-phy.c  |   6 +-
 .../pci/intel/ipu6/ipu7-isys-csi2-regs.h      |   2 +
 drivers/media/pci/intel/ipu6/ipu7-mmu-hw.c    | 262 +++++++++++++++++-
 drivers/media/pci/intel/ipu6/ipu7-mmu-hw.h    | 115 ++++++++
 include/media/ipu6-pci-table.h                |   2 +
 16 files changed, 674 insertions(+), 45 deletions(-)

-- 
2.43.0