From: Sakari Ailus <sakari.ailus@linux.intel.com>
To: Divyamani Tripathi <divyamani.tripathi@intel.com>
Cc: linux-media@vger.kernel.org, antti.laakso@linux.intel.com,
sarang.sapre@intel.com, manik.bajpai@intel.com
Subject: Re: [PATCH v2 7/7] media: ipu6: add PCI ID for IPU8
Date: Thu, 1 Oct 2026 10:44:54 +0300 [thread overview]
Message-ID: <ar4PdptP1Rqol6h5@kekkonen.localdomain> (raw)
In-Reply-To: <20261001073134.4031143-8-divyamani.tripathi@intel.com>
Hi Divyamani,
On Thu, Oct 01, 2026 at 10:31:34AM +0300, Divyamani Tripathi wrote:
> static const struct ipu6_buttress_registers ipu6_buttress_regs = {
> /* Registers */
> .irq_status = BUTTRESS_REG_ISR_STATUS,
> @@ -624,7 +646,8 @@ static int ipu6_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> int ret;
>
> if ((id->device == PCI_DEVICE_ID_INTEL_IPU7 ||
> - id->device == PCI_DEVICE_ID_INTEL_IPU7P5) && force_no_probe_ipu7)
> + id->device == PCI_DEVICE_ID_INTEL_IPU7P5 ||
> + id->device == PCI_DEVICE_ID_INTEL_IPU8) && force_no_probe_ipu7)
One question about this -- is there a need to do this for IPU8? There's no
IPU8 support in the ipu7 staging driver so I might leave this as-is.
> return -ENODEV;
>
> isp = devm_kzalloc(dev, sizeof(*isp), GFP_KERNEL);
--
Regards,
Sakari Ailus
next prev parent reply other threads:[~2026-10-01 7:45 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-01 7:31 [PATCH v2 0/7] media: ipu6: add IPU8 support Divyamani Tripathi
2026-10-01 7:31 ` [PATCH v2 1/7] media: ipu6: update ipu7 InSys ABI to 1.2.1.20251215_224531 Divyamani Tripathi
2026-10-01 7:31 ` [PATCH v2 2/7] media: ipu6: add IS_IPU8() macro Divyamani Tripathi
2026-10-01 7:31 ` [PATCH v2 3/7] media: ipu6: add IPU8 InSys ABI 1.0.14 support Divyamani Tripathi
2026-10-01 7:31 ` [PATCH v2 4/7] media: ipu6: make ipu7 gpreg stride configurable as per IPU version Divyamani Tripathi
2026-10-01 7:45 ` Sakari Ailus
2026-10-01 7:31 ` [PATCH v2 5/7] media: ipu6: add IPU8 isys chip/MMU enablement Divyamani Tripathi
2026-10-01 7:31 ` [PATCH v2 6/7] media: ipu6: add IPU8 psys MMU table and PLL power sequencing Divyamani Tripathi
2026-10-01 7:31 ` [PATCH v2 7/7] media: ipu6: add PCI ID for IPU8 Divyamani Tripathi
2026-10-01 7:44 ` Sakari Ailus [this message]
2026-10-01 9:54 ` Manik Bajpai
2026-10-01 10:04 ` Sakari Ailus
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