From: Divyamani Tripathi <divyamani.tripathi@intel.com>
To: linux-media@vger.kernel.org
Cc: sakari.ailus@linux.intel.com, antti.laakso@linux.intel.com,
sarang.sapre@intel.com, manik.bajpai@intel.com,
Divyamani Tripathi <divyamani.tripathi@intel.com>
Subject: [PATCH v2 4/7] media: ipu6: make ipu7 gpreg stride configurable as per IPU version
Date: Thu, 1 Oct 2026 10:31:31 +0300 [thread overview]
Message-ID: <20261001073134.4031143-5-divyamani.tripathi@intel.com> (raw)
In-Reply-To: <20261001073134.4031143-1-divyamani.tripathi@intel.com>
IPU8's GPREG stride is 0x2000, not IPU7's hardcoded 0x1000. Add
csi2.gpreg_stride and use it in the two gpreg accessors instead of the
fixed value, wiring it up for both IPU7 and IPU8 in
ipu6_internal_pdata_init().
Signed-off-by: Divyamani Tripathi <divyamani.tripathi@intel.com>
---
Changes since v1:
- Use separate "if (IS_IPU7(isp))" / "if (IS_IPU8(isp))" blocks in
ipu6_internal_pdata_init() instead of "if (IS_IPU8(isp)) { ... }
else { ... }", so a third/unknown IPU version can't silently fall
into the IPU7 branch just because it isn't IPU8.
drivers/media/pci/intel/ipu6/ipu6.c | 7 +++++++
drivers/media/pci/intel/ipu6/ipu6.h | 1 +
drivers/media/pci/intel/ipu6/ipu7-isys-csi-phy.c | 6 ++++--
drivers/media/pci/intel/ipu6/ipu7-isys-csi2-regs.h | 2 ++
4 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/media/pci/intel/ipu6/ipu6.c b/drivers/media/pci/intel/ipu6/ipu6.c
index 43d951735f72..965410defa09 100644
--- a/drivers/media/pci/intel/ipu6/ipu6.c
+++ b/drivers/media/pci/intel/ipu6/ipu6.c
@@ -373,6 +373,13 @@ static void ipu6_internal_pdata_init(struct ipu6_device *isp)
if (IS_IPU7(isp)) {
isys_ipdata.csi2.gpreg = IPU7_IS_IO_CSI2_GPREGS_BASE;
+ isys_ipdata.csi2.gpreg_stride = IPU7_IS_IO_CSI2_GPREGS_STRIDE;
+ isys_ipdata.csi2.nports = 4;
+ }
+
+ if (IS_IPU8(isp)) {
+ isys_ipdata.csi2.gpreg = IPU8_IS_IO_CSI2_GPREGS_BASE;
+ isys_ipdata.csi2.gpreg_stride = IPU8_IS_IO_CSI2_GPREGS_STRIDE;
isys_ipdata.csi2.nports = 4;
}
}
diff --git a/drivers/media/pci/intel/ipu6/ipu6.h b/drivers/media/pci/intel/ipu6/ipu6.h
index 20ffbb4a9934..00fb78a1ec1d 100644
--- a/drivers/media/pci/intel/ipu6/ipu6.h
+++ b/drivers/media/pci/intel/ipu6/ipu6.h
@@ -147,6 +147,7 @@ struct ipu6_isys_internal_csi2_pdata {
u32 fw_access_port_ofs;
/* IPU7-specific field */
u32 gpreg;
+ u32 gpreg_stride;
};
struct ipu6_isys_internal_tpg_pdata {
diff --git a/drivers/media/pci/intel/ipu6/ipu7-isys-csi-phy.c b/drivers/media/pci/intel/ipu6/ipu7-isys-csi-phy.c
index 10273c687faa..ac4f94764407 100644
--- a/drivers/media/pci/intel/ipu6/ipu7-isys-csi-phy.c
+++ b/drivers/media/pci/intel/ipu6/ipu7-isys-csi-phy.c
@@ -167,7 +167,8 @@ static void gpreg_write(struct ipu6_isys *isys, u32 id, u32 addr, u32 data)
{
void __iomem *isys_base = isys->pdata->base;
u32 gpreg = isys->pdata->ipdata->csi2.gpreg;
- void __iomem *base = isys_base + gpreg + 0x1000 * id;
+ void __iomem *base = isys_base + gpreg +
+ isys->pdata->ipdata->csi2.gpreg_stride * id;
struct device *dev = &isys->adev->auxdev.dev;
dev_dbg(dev, "gpreg write: reg 0x%lx = data 0x%08x",
@@ -344,7 +345,8 @@ static int ipu7_isys_phy_ready(struct ipu6_isys *isys, u32 id)
{
void __iomem *isys_base = isys->pdata->base;
u32 gpreg_offset = isys->pdata->ipdata->csi2.gpreg;
- void __iomem *gpreg = isys_base + gpreg_offset + 0x1000 * id;
+ void __iomem *gpreg = isys_base + gpreg_offset +
+ isys->pdata->ipdata->csi2.gpreg_stride * id;
struct device *dev = &isys->adev->auxdev.dev;
u32 phy_ready;
u32 reg, rext;
diff --git a/drivers/media/pci/intel/ipu6/ipu7-isys-csi2-regs.h b/drivers/media/pci/intel/ipu6/ipu7-isys-csi2-regs.h
index 3859401d4802..4f7f33b9d661 100644
--- a/drivers/media/pci/intel/ipu6/ipu7-isys-csi2-regs.h
+++ b/drivers/media/pci/intel/ipu6/ipu7-isys-csi2-regs.h
@@ -968,7 +968,9 @@
/* software config the phy */
#define IPU7_IS_IO_CSI2_GPREGS_BASE (IPU7_IS_IO_BASE + 0x53400)
+#define IPU7_IS_IO_CSI2_GPREGS_STRIDE 0x1000
#define IPU8_IS_IO_CSI2_GPREGS_BASE (IPU7_IS_IO_BASE + 0x40e00)
+#define IPU8_IS_IO_CSI2_GPREGS_STRIDE 0x2000
#define IPU7_CSI_ADAPT_LAYER_SRST 0x0
#define IPU7_MPF_SRST_RST 0x4
#define IPU7_CSI_ERR_IRQ_CTRL_SRST 0x8
--
2.43.0
next prev parent reply other threads:[~2026-10-01 7:31 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-01 7:31 [PATCH v2 0/7] media: ipu6: add IPU8 support Divyamani Tripathi
2026-10-01 7:31 ` [PATCH v2 1/7] media: ipu6: update ipu7 InSys ABI to 1.2.1.20251215_224531 Divyamani Tripathi
2026-10-01 7:31 ` [PATCH v2 2/7] media: ipu6: add IS_IPU8() macro Divyamani Tripathi
2026-10-01 7:31 ` [PATCH v2 3/7] media: ipu6: add IPU8 InSys ABI 1.0.14 support Divyamani Tripathi
2026-10-01 7:31 ` Divyamani Tripathi [this message]
2026-10-01 7:45 ` [PATCH v2 4/7] media: ipu6: make ipu7 gpreg stride configurable as per IPU version Sakari Ailus
2026-10-01 7:31 ` [PATCH v2 5/7] media: ipu6: add IPU8 isys chip/MMU enablement Divyamani Tripathi
2026-10-01 7:31 ` [PATCH v2 6/7] media: ipu6: add IPU8 psys MMU table and PLL power sequencing Divyamani Tripathi
2026-10-01 7:31 ` [PATCH v2 7/7] media: ipu6: add PCI ID for IPU8 Divyamani Tripathi
2026-10-01 7:44 ` Sakari Ailus
2026-10-01 9:54 ` Manik Bajpai
2026-10-01 10:04 ` Sakari Ailus
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