From: John Crispin <john@phrozen.org>
To: James Hogan <jhogan@kernel.org>, Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org, John Crispin <john@phrozen.org>,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org
Subject: [PATCH 12/25] dt-bindings: PCI: qcom,ar7240: adds binding doc
Date: Mon, 25 Jun 2018 19:15:36 +0200 [thread overview]
Message-ID: <20180625171549.4618-13-john@phrozen.org> (raw)
In-Reply-To: <20180625171549.4618-1-john@phrozen.org>
With the driver being converted from platform_data to pure OF, we need to
also add some docs.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: John Crispin <john@phrozen.org>
---
.../devicetree/bindings/pci/qcom,ar7240-pci.txt | 40 ++++++++++++++++++++++
1 file changed, 40 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt
diff --git a/Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt b/Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt
new file mode 100644
index 000000000000..7f6ca8a0f859
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt
@@ -0,0 +1,40 @@
+* Qualcomm Atheros AR724X PCI express root complex
+
+Required properties:
+- compatible: should contain "qcom,ar7240-pci" to identify the core.
+- reg: Should contain the register ranges as listed in the reg-names property.
+- reg-names: Definition: Must include the following entries
+ - "crp_base" Configuration registers
+ - "ctrl_base" Control registers
+ - "cfg_base" IO Memory
+- #address-cells: set to <3>
+- #size-cells: set to <2>
+- ranges: ranges for the PCI memory and I/O regions
+- interrupt-map-mask and interrupt-map: standard PCI
+ properties to define the mapping of the PCIe interface to interrupt
+ numbers.
+- #interrupt-cells: set to <1>
+- interrupt-parent: phandle to the MIPS IRQ controller
+- interrupt-controller: define to enable the builtin IRQ cascade.
+
+* Example for qca9557
+ pcie0: pcie-controller@180c0000 {
+ compatible = "qcom,ar7240-pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0x0>;
+ reg = <0x180c0000 0x1000>,
+ <0x180f0000 0x100>,
+ <0x14000000 0x1000>;
+ reg-names = "crp_base", "ctrl_base", "cfg_base";
+ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000
+ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>;
+ interrupt-parent = <&intc2>;
+ interrupts = <1>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 1>;
+ interrupt-map = <0 0 0 0 &pcie0 0>;
+ };
--
2.11.0
next prev parent reply other threads:[~2018-06-25 17:25 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-25 17:15 [PATCH 00/25] MIPS: ath79: convert target to pure OF John Crispin
2018-06-25 17:15 ` [PATCH 01/25] MIPS: ath79: add lots of missing registers John Crispin
2018-06-27 22:57 ` Paul Burton
2018-06-25 17:15 ` [PATCH 02/25] MIPS: ath79: add support for QCA953x QCA956x TP9343 John Crispin
2018-06-27 22:55 ` Paul Burton
2018-06-25 17:15 ` [PATCH 03/25] MIPS: ath79: select the PINCTRL subsystem John Crispin
2018-06-25 17:15 ` [PATCH 04/25] MIPS: ath79: fix register address in ath79_ddr_wb_flush() John Crispin
2018-06-28 18:51 ` Paul Burton
2018-06-28 20:03 ` John Crispin
2018-06-25 17:15 ` [PATCH 05/25] MIPS: ath79: Avoid using unitialized 'reg' variable John Crispin
2018-06-27 23:05 ` Paul Burton
2018-06-25 17:15 ` [PATCH 06/25] MIPS: ath79: fix system restart John Crispin
2018-06-25 17:15 ` [PATCH 07/25] MIPS: ath79: finetune cpu-overrides John Crispin
2018-06-25 17:15 ` [PATCH 08/25] MIPS: ath79: enable uart during early_prink John Crispin
2018-06-25 17:15 ` [PATCH 09/25] MIPS: ath79: get PCIe controller out of reset John Crispin
2018-06-25 17:15 ` [PATCH 10/25] dt-bindings: PCI: qcom,ar7100: adds binding doc John Crispin
2018-06-25 18:06 ` Sergei Shtylyov
2018-06-26 7:13 ` John Crispin
2018-07-03 22:05 ` Rob Herring
2018-06-25 17:15 ` [PATCH 11/25] MIPS: pci-ar71xx: convert to OF John Crispin
2018-06-25 17:15 ` John Crispin [this message]
2018-07-03 22:08 ` [PATCH 12/25] dt-bindings: PCI: qcom,ar7240: adds binding doc Rob Herring
2018-06-25 17:15 ` [PATCH 13/25] MIPS: pci-ar724x: convert to OF John Crispin
2018-06-25 17:15 ` [PATCH 14/25] MIPS: ath79: add helpers for setting clocks and expose the ref clock John Crispin
2018-06-25 17:15 ` [PATCH 15/25] MIPS: ath79: move legacy "wdt" and "uart" clock aliases out of soc init John Crispin
2018-06-25 17:15 ` [PATCH 16/25] MIPS: ath79: pass PLL base to clock init functions John Crispin
2018-06-25 17:15 ` [PATCH 17/25] MIPS: ath79: make specifying the reference clock in DT optional John Crispin
2018-06-25 17:15 ` [PATCH 18/25] MIPS: ath79: support setting up clock via DT on all SoC types John Crispin
2018-06-25 17:15 ` [PATCH 19/25] MIPS: ath79: export switch MDIO reference clock John Crispin
2018-06-25 17:15 ` [PATCH 20/25] MIPS: ath79: drop legacy IRQ code John Crispin
2018-06-25 17:15 ` [PATCH 21/25] MIPS: ath79: drop machfiles John Crispin
2018-06-25 17:15 ` [PATCH 22/25] MIPS: ath79: drop legacy pci code John Crispin
2018-06-25 17:15 ` [PATCH 23/25] MIPS: ath79: drop platform device registration code John Crispin
2018-06-25 17:15 ` [PATCH 24/25] MIPS: ath79: drop !OF clock code John Crispin
2018-06-25 17:15 ` [PATCH 25/25] MIPS: ath79: sanitize symbols John Crispin
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