From: John Crispin <john@phrozen.org>
To: James Hogan <jhogan@kernel.org>, Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org, Felix Fietkau <nbd@nbd.name>,
Alban Bedel <albeu@free.fr>
Subject: [PATCH 04/25] MIPS: ath79: fix register address in ath79_ddr_wb_flush()
Date: Mon, 25 Jun 2018 19:15:28 +0200 [thread overview]
Message-ID: <20180625171549.4618-5-john@phrozen.org> (raw)
In-Reply-To: <20180625171549.4618-1-john@phrozen.org>
From: Felix Fietkau <nbd@nbd.name>
ath79_ddr_wb_flush_base has the type void __iomem *, so register offsets
need to be a multiple of 4.
Cc: Alban Bedel <albeu@free.fr>
Fixes: 24b0e3e84fbf ("MIPS: ath79: Improve the DDR controller interface")
Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
arch/mips/ath79/common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/ath79/common.c b/arch/mips/ath79/common.c
index fad32543a968..cd6055f9e7a0 100644
--- a/arch/mips/ath79/common.c
+++ b/arch/mips/ath79/common.c
@@ -58,7 +58,7 @@ EXPORT_SYMBOL_GPL(ath79_ddr_ctrl_init);
void ath79_ddr_wb_flush(u32 reg)
{
- void __iomem *flush_reg = ath79_ddr_wb_flush_base + reg;
+ void __iomem *flush_reg = ath79_ddr_wb_flush_base + (reg * 4);
/* Flush the DDR write buffer. */
__raw_writel(0x1, flush_reg);
--
2.11.0
next prev parent reply other threads:[~2018-06-25 17:17 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-25 17:15 [PATCH 00/25] MIPS: ath79: convert target to pure OF John Crispin
2018-06-25 17:15 ` [PATCH 01/25] MIPS: ath79: add lots of missing registers John Crispin
2018-06-27 22:57 ` Paul Burton
2018-06-25 17:15 ` [PATCH 02/25] MIPS: ath79: add support for QCA953x QCA956x TP9343 John Crispin
2018-06-27 22:55 ` Paul Burton
2018-06-25 17:15 ` [PATCH 03/25] MIPS: ath79: select the PINCTRL subsystem John Crispin
2018-06-25 17:15 ` John Crispin [this message]
2018-06-28 18:51 ` [PATCH 04/25] MIPS: ath79: fix register address in ath79_ddr_wb_flush() Paul Burton
2018-06-28 20:03 ` John Crispin
2018-06-25 17:15 ` [PATCH 05/25] MIPS: ath79: Avoid using unitialized 'reg' variable John Crispin
2018-06-27 23:05 ` Paul Burton
2018-06-25 17:15 ` [PATCH 06/25] MIPS: ath79: fix system restart John Crispin
2018-06-25 17:15 ` [PATCH 07/25] MIPS: ath79: finetune cpu-overrides John Crispin
2018-06-25 17:15 ` [PATCH 08/25] MIPS: ath79: enable uart during early_prink John Crispin
2018-06-25 17:15 ` [PATCH 09/25] MIPS: ath79: get PCIe controller out of reset John Crispin
2018-06-25 17:15 ` [PATCH 10/25] dt-bindings: PCI: qcom,ar7100: adds binding doc John Crispin
2018-06-25 18:06 ` Sergei Shtylyov
2018-06-26 7:13 ` John Crispin
2018-07-03 22:05 ` Rob Herring
2018-06-25 17:15 ` [PATCH 11/25] MIPS: pci-ar71xx: convert to OF John Crispin
2018-06-25 17:15 ` [PATCH 12/25] dt-bindings: PCI: qcom,ar7240: adds binding doc John Crispin
2018-07-03 22:08 ` Rob Herring
2018-06-25 17:15 ` [PATCH 13/25] MIPS: pci-ar724x: convert to OF John Crispin
2018-06-25 17:15 ` [PATCH 14/25] MIPS: ath79: add helpers for setting clocks and expose the ref clock John Crispin
2018-06-25 17:15 ` [PATCH 15/25] MIPS: ath79: move legacy "wdt" and "uart" clock aliases out of soc init John Crispin
2018-06-25 17:15 ` [PATCH 16/25] MIPS: ath79: pass PLL base to clock init functions John Crispin
2018-06-25 17:15 ` [PATCH 17/25] MIPS: ath79: make specifying the reference clock in DT optional John Crispin
2018-06-25 17:15 ` [PATCH 18/25] MIPS: ath79: support setting up clock via DT on all SoC types John Crispin
2018-06-25 17:15 ` [PATCH 19/25] MIPS: ath79: export switch MDIO reference clock John Crispin
2018-06-25 17:15 ` [PATCH 20/25] MIPS: ath79: drop legacy IRQ code John Crispin
2018-06-25 17:15 ` [PATCH 21/25] MIPS: ath79: drop machfiles John Crispin
2018-06-25 17:15 ` [PATCH 22/25] MIPS: ath79: drop legacy pci code John Crispin
2018-06-25 17:15 ` [PATCH 23/25] MIPS: ath79: drop platform device registration code John Crispin
2018-06-25 17:15 ` [PATCH 24/25] MIPS: ath79: drop !OF clock code John Crispin
2018-06-25 17:15 ` [PATCH 25/25] MIPS: ath79: sanitize symbols John Crispin
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