From: John Crispin <john@phrozen.org>
To: James Hogan <jhogan@kernel.org>, Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org, John Crispin <john@phrozen.org>
Subject: [PATCH 24/25] MIPS: ath79: drop !OF clock code
Date: Mon, 25 Jun 2018 19:15:48 +0200 [thread overview]
Message-ID: <20180625171549.4618-25-john@phrozen.org> (raw)
In-Reply-To: <20180625171549.4618-1-john@phrozen.org>
With the target now being fully OF based, we can drop the legacy clock
registration code. All clocks are now probed via devicetree.
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/mips/ath79/clock.c | 56 ------------------------------------------------
arch/mips/ath79/common.h | 3 ---
2 files changed, 59 deletions(-)
diff --git a/arch/mips/ath79/clock.c b/arch/mips/ath79/clock.c
index aea9590bf353..d4ca97e2ec6c 100644
--- a/arch/mips/ath79/clock.c
+++ b/arch/mips/ath79/clock.c
@@ -617,60 +617,6 @@ static void __init qca956x_clocks_init(void __iomem *pll_base)
ath79_set_clk(ATH79_CLK_AHB, ahb_rate);
}
-void __init ath79_clocks_init(void)
-{
- const char *wdt;
- const char *uart;
-
- if (soc_is_ar71xx())
- ar71xx_clocks_init(ath79_pll_base);
- else if (soc_is_ar724x() || soc_is_ar913x())
- ar724x_clocks_init(ath79_pll_base);
- else if (soc_is_ar933x())
- ar933x_clocks_init(ath79_pll_base);
- else if (soc_is_ar934x())
- ar934x_clocks_init(ath79_pll_base);
- else if (soc_is_qca953x())
- qca953x_clocks_init(ath79_pll_base);
- else if (soc_is_qca955x())
- qca955x_clocks_init(ath79_pll_base);
- else if (soc_is_qca956x() || soc_is_tp9343())
- qca956x_clocks_init(ath79_pll_base);
- else
- BUG();
-
- if (soc_is_ar71xx() || soc_is_ar724x() || soc_is_ar913x()) {
- wdt = "ahb";
- uart = "ahb";
- } else if (soc_is_ar933x()) {
- wdt = "ahb";
- uart = "ref";
- } else {
- wdt = "ref";
- uart = "ref";
- }
-
- clk_add_alias("wdt", NULL, wdt, NULL);
- clk_add_alias("uart", NULL, uart, NULL);
-}
-
-unsigned long __init
-ath79_get_sys_clk_rate(const char *id)
-{
- struct clk *clk;
- unsigned long rate;
-
- clk = clk_get(NULL, id);
- if (IS_ERR(clk))
- panic("unable to get %s clock, err=%d", id, (int) PTR_ERR(clk));
-
- rate = clk_get_rate(clk);
- clk_put(clk);
-
- return rate;
-}
-
-#ifdef CONFIG_OF
static void __init ath79_clocks_init_dt(struct device_node *np)
{
struct clk *ref_clk;
@@ -727,5 +673,3 @@ CLK_OF_DECLARE(ar9340_clk, "qca,ar9340-pll", ath79_clocks_init_dt);
CLK_OF_DECLARE(ar9530_clk, "qca,qca9530-pll", ath79_clocks_init_dt);
CLK_OF_DECLARE(ar9550_clk, "qca,qca9550-pll", ath79_clocks_init_dt);
CLK_OF_DECLARE(ar9560_clk, "qca,qca9560-pll", ath79_clocks_init_dt);
-
-#endif
diff --git a/arch/mips/ath79/common.h b/arch/mips/ath79/common.h
index 77dd989e5ce0..25b96f59e8e8 100644
--- a/arch/mips/ath79/common.h
+++ b/arch/mips/ath79/common.h
@@ -19,9 +19,6 @@
#define ATH79_MEM_SIZE_MIN (2 * 1024 * 1024)
#define ATH79_MEM_SIZE_MAX (256 * 1024 * 1024)
-void ath79_clocks_init(void);
-unsigned long ath79_get_sys_clk_rate(const char *id);
-
void ath79_ddr_ctrl_init(void);
#endif /* __ATH79_COMMON_H */
--
2.11.0
next prev parent reply other threads:[~2018-06-25 17:23 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-25 17:15 [PATCH 00/25] MIPS: ath79: convert target to pure OF John Crispin
2018-06-25 17:15 ` [PATCH 01/25] MIPS: ath79: add lots of missing registers John Crispin
2018-06-27 22:57 ` Paul Burton
2018-06-25 17:15 ` [PATCH 02/25] MIPS: ath79: add support for QCA953x QCA956x TP9343 John Crispin
2018-06-27 22:55 ` Paul Burton
2018-06-25 17:15 ` [PATCH 03/25] MIPS: ath79: select the PINCTRL subsystem John Crispin
2018-06-25 17:15 ` [PATCH 04/25] MIPS: ath79: fix register address in ath79_ddr_wb_flush() John Crispin
2018-06-28 18:51 ` Paul Burton
2018-06-28 20:03 ` John Crispin
2018-06-25 17:15 ` [PATCH 05/25] MIPS: ath79: Avoid using unitialized 'reg' variable John Crispin
2018-06-27 23:05 ` Paul Burton
2018-06-25 17:15 ` [PATCH 06/25] MIPS: ath79: fix system restart John Crispin
2018-06-25 17:15 ` [PATCH 07/25] MIPS: ath79: finetune cpu-overrides John Crispin
2018-06-25 17:15 ` [PATCH 08/25] MIPS: ath79: enable uart during early_prink John Crispin
2018-06-25 17:15 ` [PATCH 09/25] MIPS: ath79: get PCIe controller out of reset John Crispin
2018-06-25 17:15 ` [PATCH 10/25] dt-bindings: PCI: qcom,ar7100: adds binding doc John Crispin
2018-06-25 18:06 ` Sergei Shtylyov
2018-06-26 7:13 ` John Crispin
2018-07-03 22:05 ` Rob Herring
2018-06-25 17:15 ` [PATCH 11/25] MIPS: pci-ar71xx: convert to OF John Crispin
2018-06-25 17:15 ` [PATCH 12/25] dt-bindings: PCI: qcom,ar7240: adds binding doc John Crispin
2018-07-03 22:08 ` Rob Herring
2018-06-25 17:15 ` [PATCH 13/25] MIPS: pci-ar724x: convert to OF John Crispin
2018-06-25 17:15 ` [PATCH 14/25] MIPS: ath79: add helpers for setting clocks and expose the ref clock John Crispin
2018-06-25 17:15 ` [PATCH 15/25] MIPS: ath79: move legacy "wdt" and "uart" clock aliases out of soc init John Crispin
2018-06-25 17:15 ` [PATCH 16/25] MIPS: ath79: pass PLL base to clock init functions John Crispin
2018-06-25 17:15 ` [PATCH 17/25] MIPS: ath79: make specifying the reference clock in DT optional John Crispin
2018-06-25 17:15 ` [PATCH 18/25] MIPS: ath79: support setting up clock via DT on all SoC types John Crispin
2018-06-25 17:15 ` [PATCH 19/25] MIPS: ath79: export switch MDIO reference clock John Crispin
2018-06-25 17:15 ` [PATCH 20/25] MIPS: ath79: drop legacy IRQ code John Crispin
2018-06-25 17:15 ` [PATCH 21/25] MIPS: ath79: drop machfiles John Crispin
2018-06-25 17:15 ` [PATCH 22/25] MIPS: ath79: drop legacy pci code John Crispin
2018-06-25 17:15 ` [PATCH 23/25] MIPS: ath79: drop platform device registration code John Crispin
2018-06-25 17:15 ` John Crispin [this message]
2018-06-25 17:15 ` [PATCH 25/25] MIPS: ath79: sanitize symbols John Crispin
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