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From: "Jiaxun Yang" <jiaxun.yang@flygoat.com>
To: "Maciej W. Rozycki" <macro@orcam.me.uk>
Cc: "Thomas Bogendoerfer" <tsbogend@alpha.franken.de>,
	"Jonas Gorski" <jonas.gorski@gmail.com>,
	"linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/4] MIPS: Introduce config options for LLSC availability
Date: Fri, 21 Jun 2024 11:45:41 +0100	[thread overview]
Message-ID: <2c26a07f-fa68-48f1-8f3b-3b5e4f77130b@app.fastmail.com> (raw)
In-Reply-To: <alpine.DEB.2.21.2406210041140.43454@angie.orcam.me.uk>



在2024年6月21日六月 上午1:00,Maciej W. Rozycki写道:
> On Wed, 12 Jun 2024, Jiaxun Yang wrote:
>
>> Introduce CPU_HAS_LLSC and CPU_MAY_HAVE_LLSC to determine availability
>> of LLSC and Kconfig level.
>
>  Taking the subsequent patches in this series into account this seems to 
> create a parallel universe in which the availability of LL/SC for certain 
> features is handled at the Kconfig level while in the other universe it's 
> handled via <asm/mach-*/cpu-feature-overrides.h>.
>
>  I think this ought not to be done in two places independently and the 
> pieces in <asm/mach-*/cpu-feature-overrides.h> need to be removed, likely 
> in the same change even, *however* not without double-checking whether 
> there is not a case among them where a platform actually has LL/SC support 
> disabled despite the CPU used there having architectural support for the 
> feature.  Otherwise we may end up with a case where a platform has LL/SC 
> support disabled via its <asm/mach-*/cpu-feature-overrides.h> setting and 
> yet we enable ARCH_SUPPORTS_ATOMIC_RMW or ARCH_HAVE_NMI_SAFE_CMPXCHG for 
> it via Kconfig.

IMO it's necessary for platforms who know what are they doing such as ATH25,
which we took care in this series.

I'll add a build time assertion to ensure when CONFIG_CPU_HAS_LLSC is selected
kernel_uses_llsc is statically 1, so any incorrect overrides can be spotted
at build time.

It's better to clean up platform's overrides at some point, I'll leave
it to a future patch.

>
>  The note from <asm/mach-ip32/cpu-feature-overrides.h> seems a candidate 
> to move to arch/mips/Kconfig at the relevant place on this occasion too.
> There may be more such notes and they ought not to be lost.

Noted, I'll add a Kconfig symbol WAR_R5000_LLSC and rescue this comment.

Thanks
>
>   Maciej

-- 
- Jiaxun

  reply	other threads:[~2024-06-21 10:46 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-12  9:53 [PATCH v2 0/4] MIPS: Enable ARCH_SUPPORTS_ATOMIC_RMW Jiaxun Yang
2024-06-12  9:53 ` [PATCH v2 1/4] MIPS: Introduce WAR_4KC_LLSC config option Jiaxun Yang
2024-06-12  9:53 ` [PATCH v2 2/4] MIPS: Introduce config options for LLSC availability Jiaxun Yang
2024-06-20 16:06   ` Thomas Bogendoerfer
2024-06-20 16:30     ` Jiaxun Yang
2024-06-20 17:41       ` Thomas Bogendoerfer
2024-06-21  0:00   ` Maciej W. Rozycki
2024-06-21 10:45     ` Jiaxun Yang [this message]
2024-06-21 13:57       ` Maciej W. Rozycki
2024-06-21 15:21         ` Jiaxun Yang
2024-06-21 17:40           ` Maciej W. Rozycki
2024-06-21 20:31           ` Thomas Bogendoerfer
2024-06-12  9:53 ` [PATCH v2 3/4] MIPS: Select ARCH_SUPPORTS_ATOMIC_RMW when possible Jiaxun Yang
2024-06-12  9:53 ` [PATCH v2 4/4] MIPS: Select ARCH_HAVE_NMI_SAFE_CMPXCHG " Jiaxun Yang

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