From: "Jiaxun Yang" <jiaxun.yang@flygoat.com>
To: "Maciej W. Rozycki" <macro@orcam.me.uk>
Cc: "Thomas Bogendoerfer" <tsbogend@alpha.franken.de>,
"Jonas Gorski" <jonas.gorski@gmail.com>,
"linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/4] MIPS: Introduce config options for LLSC availability
Date: Fri, 21 Jun 2024 16:21:49 +0100 [thread overview]
Message-ID: <83cf475c-86a3-4acb-bc82-d94c66c53779@app.fastmail.com> (raw)
In-Reply-To: <alpine.DEB.2.21.2406211446500.43454@angie.orcam.me.uk>
在2024年6月21日六月 下午2:57,Maciej W. Rozycki写道:
> On Fri, 21 Jun 2024, Jiaxun Yang wrote:
>
>> > I think this ought not to be done in two places independently and the
>> > pieces in <asm/mach-*/cpu-feature-overrides.h> need to be removed, likely
>> > in the same change even, *however* not without double-checking whether
>> > there is not a case among them where a platform actually has LL/SC support
>> > disabled despite the CPU used there having architectural support for the
>> > feature. Otherwise we may end up with a case where a platform has LL/SC
>> > support disabled via its <asm/mach-*/cpu-feature-overrides.h> setting and
>> > yet we enable ARCH_SUPPORTS_ATOMIC_RMW or ARCH_HAVE_NMI_SAFE_CMPXCHG for
>> > it via Kconfig.
>>
>> IMO it's necessary for platforms who know what are they doing such as ATH25,
>> which we took care in this series.
>>
>> I'll add a build time assertion to ensure when CONFIG_CPU_HAS_LLSC is selected
>> kernel_uses_llsc is statically 1, so any incorrect overrides can be spotted
>> at build time.
>
> That might do in the interim as a sanity check, however ultimately the
> sole reason these <asm/mach-*/cpu-feature-overrides.h> exist (and the
> `cpu_has_llsc' setting there) is so that a dynamic check at run time is
> avoided where the result is known from elsewhere beforehand anyway, and
> your change effectively supersedes the overrides, and therefore they need
> to be removed.
>
No, overrides are still valid if platform did CPU_MAY_HAVE_LLSC, this is at
least valid for R10000 systems (IP28 decided to opt-out from llsc somehow),
ATH25 (platform made assumption on IP version shipped with CPU), cavium
octeon (platform decided to opt-out llsc for non-SMP build). I'm not confident
with handling them all in Kconfig so I think the best approach so far is to do
build time assertion.
Does anyone reckon the reason behind opt-out LLSC for IP28? As far as I understand
there is no restriction on using LLSC after workaround being applied. If it's purely
performance reason, I think I'll need to move kernel_uses_llsc logic to Kconfig as well.
Thanks
>
> Maciej
--
- Jiaxun
next prev parent reply other threads:[~2024-06-21 15:22 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-12 9:53 [PATCH v2 0/4] MIPS: Enable ARCH_SUPPORTS_ATOMIC_RMW Jiaxun Yang
2024-06-12 9:53 ` [PATCH v2 1/4] MIPS: Introduce WAR_4KC_LLSC config option Jiaxun Yang
2024-06-12 9:53 ` [PATCH v2 2/4] MIPS: Introduce config options for LLSC availability Jiaxun Yang
2024-06-20 16:06 ` Thomas Bogendoerfer
2024-06-20 16:30 ` Jiaxun Yang
2024-06-20 17:41 ` Thomas Bogendoerfer
2024-06-21 0:00 ` Maciej W. Rozycki
2024-06-21 10:45 ` Jiaxun Yang
2024-06-21 13:57 ` Maciej W. Rozycki
2024-06-21 15:21 ` Jiaxun Yang [this message]
2024-06-21 17:40 ` Maciej W. Rozycki
2024-06-21 20:31 ` Thomas Bogendoerfer
2024-06-12 9:53 ` [PATCH v2 3/4] MIPS: Select ARCH_SUPPORTS_ATOMIC_RMW when possible Jiaxun Yang
2024-06-12 9:53 ` [PATCH v2 4/4] MIPS: Select ARCH_HAVE_NMI_SAFE_CMPXCHG " Jiaxun Yang
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