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From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Jonas Gorski <jonas.gorski@gmail.com>,
	"Maciej W. Rozycki" <macro@orcam.me.uk>,
	linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/4] MIPS: Introduce config options for LLSC availability
Date: Thu, 20 Jun 2024 18:06:28 +0200	[thread overview]
Message-ID: <ZnRThFlqqyDEprGz@alpha.franken.de> (raw)
In-Reply-To: <20240612-mips-llsc-v2-2-a42bd5562bdb@flygoat.com>

On Wed, Jun 12, 2024 at 10:53:30AM +0100, Jiaxun Yang wrote:
> Introduce CPU_HAS_LLSC and CPU_MAY_HAVE_LLSC to determine availability
> of LLSC and Kconfig level.
> 
> They are both true for almost all supported CPUs besides:
> 
> R3000: Doesn't have LLSC, so both false.
> R5000 series: LLSC is unusable for 64bit kernel, so both false.
> R10000: Some platforms decided to opt-out LLSC due to errata, so only
> 	select CPU_MAY_HAVE_LLSC.
> WAR_4KC_LLSC: LLSC is buggy on certain reversion, which can be detected
> 	at cpu-probe or platform override, so only select CPU_MAY_HAVE_LLSC.
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
> v2: Make cpu_has_llsc logic clear
> ---
>  arch/mips/Kconfig                    | 20 ++++++++++++++++++++
>  arch/mips/include/asm/cpu-features.h |  9 ++++++++-
>  2 files changed, 28 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index 8ac467c1f9c8..50260a7e9b54 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -1548,6 +1548,7 @@ config CPU_R3000
>  config CPU_R4300
>  	bool "R4300"
>  	depends on SYS_HAS_CPU_R4300
> +	select CPU_HAS_LLSC
>  	select CPU_SUPPORTS_32BIT_KERNEL
>  	select CPU_SUPPORTS_64BIT_KERNEL
>  	help
> @@ -1556,6 +1557,7 @@ config CPU_R4300
>  config CPU_R4X00
>  	bool "R4x00"
>  	depends on SYS_HAS_CPU_R4X00
> +	select CPU_HAS_LLSC
>  	select CPU_SUPPORTS_32BIT_KERNEL
>  	select CPU_SUPPORTS_64BIT_KERNEL
>  	select CPU_SUPPORTS_HUGEPAGES
> @@ -1566,6 +1568,7 @@ config CPU_R4X00
>  config CPU_TX49XX
>  	bool "R49XX"
>  	depends on SYS_HAS_CPU_TX49XX
> +	select CPU_HAS_LLSC
>  	select CPU_HAS_PREFETCH
>  	select CPU_SUPPORTS_32BIT_KERNEL
>  	select CPU_SUPPORTS_64BIT_KERNEL
> @@ -1574,6 +1577,7 @@ config CPU_TX49XX
>  config CPU_R5000
>  	bool "R5000"
>  	depends on SYS_HAS_CPU_R5000
> +	select CPU_HAS_LLSC if !64BIT
>  	select CPU_SUPPORTS_32BIT_KERNEL
>  	select CPU_SUPPORTS_64BIT_KERNEL
>  	select CPU_SUPPORTS_HUGEPAGES
> @@ -1583,6 +1587,7 @@ config CPU_R5000
>  config CPU_R5500
>  	bool "R5500"
>  	depends on SYS_HAS_CPU_R5500
> +	select CPU_HAS_LLSC

do you have an user manual stating that the R5k bug is fixed on this CPUs ?

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

  reply	other threads:[~2024-06-20 16:07 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-12  9:53 [PATCH v2 0/4] MIPS: Enable ARCH_SUPPORTS_ATOMIC_RMW Jiaxun Yang
2024-06-12  9:53 ` [PATCH v2 1/4] MIPS: Introduce WAR_4KC_LLSC config option Jiaxun Yang
2024-06-12  9:53 ` [PATCH v2 2/4] MIPS: Introduce config options for LLSC availability Jiaxun Yang
2024-06-20 16:06   ` Thomas Bogendoerfer [this message]
2024-06-20 16:30     ` Jiaxun Yang
2024-06-20 17:41       ` Thomas Bogendoerfer
2024-06-21  0:00   ` Maciej W. Rozycki
2024-06-21 10:45     ` Jiaxun Yang
2024-06-21 13:57       ` Maciej W. Rozycki
2024-06-21 15:21         ` Jiaxun Yang
2024-06-21 17:40           ` Maciej W. Rozycki
2024-06-21 20:31           ` Thomas Bogendoerfer
2024-06-12  9:53 ` [PATCH v2 3/4] MIPS: Select ARCH_SUPPORTS_ATOMIC_RMW when possible Jiaxun Yang
2024-06-12  9:53 ` [PATCH v2 4/4] MIPS: Select ARCH_HAVE_NMI_SAFE_CMPXCHG " Jiaxun Yang

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