From: David Daney <ddaney@caviumnetworks.com>
To: Paul Burton <paul.burton@imgtec.com>, Ralf Baechle <ralf@linux-mips.org>
Cc: <linux-mips@linux-mips.org>, Lars Persson <lars.persson@axis.com>,
"stable # v4 . 1+" <stable@vger.kernel.org>,
"Steven J. Hill" <Steven.Hill@imgtec.com>,
David Daney <david.daney@cavium.com>,
Huacai Chen <chenhc@lemote.com>,
Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>,
<linux-kernel@vger.kernel.org>,
Andrew Morton <akpm@linux-foundation.org>,
Jerome Marchand <jmarchan@redhat.com>,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Subject: Re: [PATCH 4/4] MIPS: Sync icache & dcache in set_pte_at
Date: Tue, 1 Mar 2016 09:13:23 -0800 [thread overview]
Message-ID: <56D5CDB3.80407@caviumnetworks.com> (raw)
In-Reply-To: <1456799879-14711-5-git-send-email-paul.burton@imgtec.com>
On 02/29/2016 06:37 PM, Paul Burton wrote:
[...]
> @@ -234,6 +237,22 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt
> }
> #endif
>
> +static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
> + pte_t *ptep, pte_t pteval)
> +{
> + extern void __update_cache(unsigned long address, pte_t pte);
> +
> + if (!pte_present(pteval))
> + goto cache_sync_done;
> +
> + if (pte_present(*ptep) && (pte_pfn(*ptep) == pte_pfn(pteval)))
> + goto cache_sync_done;
> +
> + __update_cache(addr, pteval);
> +cache_sync_done:
> + set_pte(ptep, pteval);
> +}
> +
This seems crazy. I don't think any other architecture does this type
of work in set_pte_at().
Can you look into finding a better way?
What if you ...
> /*
> * (pmds are folded into puds so this doesn't get actually called,
> * but the define is needed for a generic inline function.)
> @@ -430,15 +449,12 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
>
> extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
> pte_t pte);
> -extern void __update_cache(struct vm_area_struct *vma, unsigned long address,
> - pte_t pte);
>
> static inline void update_mmu_cache(struct vm_area_struct *vma,
> unsigned long address, pte_t *ptep)
> {
> pte_t pte = *ptep;
> __update_tlb(vma, address, pte);
> - __update_cache(vma, address, pte);
... Reversed the order of these two operations?
> }
>
> static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
> diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
> index 8befa55..bf04c6c 100644
> --- a/arch/mips/mm/cache.c
> +++ b/arch/mips/mm/cache.c
> @@ -125,30 +125,17 @@ void __flush_anon_page(struct page *page, unsigned long vmaddr)
>
> EXPORT_SYMBOL(__flush_anon_page);
>
> -void __flush_icache_page(struct vm_area_struct *vma, struct page *page)
> -{
> - unsigned long addr;
> -
> - if (PageHighMem(page))
> - return;
> -
> - addr = (unsigned long) page_address(page);
> - flush_data_cache_page(addr);
> -}
> -EXPORT_SYMBOL_GPL(__flush_icache_page);
> -
> -void __update_cache(struct vm_area_struct *vma, unsigned long address,
> - pte_t pte)
> +void __update_cache(unsigned long address, pte_t pte)
> {
> struct page *page;
> unsigned long pfn, addr;
> - int exec = (vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc;
> + int exec = !pte_no_exec(pte) && !cpu_has_ic_fills_f_dc;
>
> pfn = pte_pfn(pte);
> if (unlikely(!pfn_valid(pfn)))
> return;
> page = pfn_to_page(pfn);
> - if (page_mapping(page) && Page_dcache_dirty(page)) {
> + if (Page_dcache_dirty(page)) {
> if (PageHighMem(page))
> addr = (unsigned long)kmap_atomic(page);
> else
>
WARNING: multiple messages have this Message-ID (diff)
From: David Daney <ddaney@caviumnetworks.com>
To: Paul Burton <paul.burton@imgtec.com>, Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org, Lars Persson <lars.persson@axis.com>,
"stable # v4 . 1+" <stable@vger.kernel.org>,
"Steven J. Hill" <Steven.Hill@imgtec.com>,
David Daney <david.daney@cavium.com>,
Huacai Chen <chenhc@lemote.com>,
"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>,
linux-kernel@vger.kernel.org,
Andrew Morton <akpm@linux-foundation.org>,
Jerome Marchand <jmarchan@redhat.com>,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Subject: Re: [PATCH 4/4] MIPS: Sync icache & dcache in set_pte_at
Date: Tue, 1 Mar 2016 09:13:23 -0800 [thread overview]
Message-ID: <56D5CDB3.80407@caviumnetworks.com> (raw)
Message-ID: <20160301171323.0tr4IQ7_I0IEEHhjPIJWVJ1PciZeylbDurmnjZEX_5o@z> (raw)
In-Reply-To: <1456799879-14711-5-git-send-email-paul.burton@imgtec.com>
On 02/29/2016 06:37 PM, Paul Burton wrote:
[...]
> @@ -234,6 +237,22 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt
> }
> #endif
>
> +static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
> + pte_t *ptep, pte_t pteval)
> +{
> + extern void __update_cache(unsigned long address, pte_t pte);
> +
> + if (!pte_present(pteval))
> + goto cache_sync_done;
> +
> + if (pte_present(*ptep) && (pte_pfn(*ptep) == pte_pfn(pteval)))
> + goto cache_sync_done;
> +
> + __update_cache(addr, pteval);
> +cache_sync_done:
> + set_pte(ptep, pteval);
> +}
> +
This seems crazy. I don't think any other architecture does this type
of work in set_pte_at().
Can you look into finding a better way?
What if you ...
> /*
> * (pmds are folded into puds so this doesn't get actually called,
> * but the define is needed for a generic inline function.)
> @@ -430,15 +449,12 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
>
> extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
> pte_t pte);
> -extern void __update_cache(struct vm_area_struct *vma, unsigned long address,
> - pte_t pte);
>
> static inline void update_mmu_cache(struct vm_area_struct *vma,
> unsigned long address, pte_t *ptep)
> {
> pte_t pte = *ptep;
> __update_tlb(vma, address, pte);
> - __update_cache(vma, address, pte);
... Reversed the order of these two operations?
> }
>
> static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
> diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
> index 8befa55..bf04c6c 100644
> --- a/arch/mips/mm/cache.c
> +++ b/arch/mips/mm/cache.c
> @@ -125,30 +125,17 @@ void __flush_anon_page(struct page *page, unsigned long vmaddr)
>
> EXPORT_SYMBOL(__flush_anon_page);
>
> -void __flush_icache_page(struct vm_area_struct *vma, struct page *page)
> -{
> - unsigned long addr;
> -
> - if (PageHighMem(page))
> - return;
> -
> - addr = (unsigned long) page_address(page);
> - flush_data_cache_page(addr);
> -}
> -EXPORT_SYMBOL_GPL(__flush_icache_page);
> -
> -void __update_cache(struct vm_area_struct *vma, unsigned long address,
> - pte_t pte)
> +void __update_cache(unsigned long address, pte_t pte)
> {
> struct page *page;
> unsigned long pfn, addr;
> - int exec = (vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc;
> + int exec = !pte_no_exec(pte) && !cpu_has_ic_fills_f_dc;
>
> pfn = pte_pfn(pte);
> if (unlikely(!pfn_valid(pfn)))
> return;
> page = pfn_to_page(pfn);
> - if (page_mapping(page) && Page_dcache_dirty(page)) {
> + if (Page_dcache_dirty(page)) {
> if (PageHighMem(page))
> addr = (unsigned long)kmap_atomic(page);
> else
>
next prev parent reply other threads:[~2016-03-01 17:13 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-01 2:37 [PATCH 0/4] MIPS cache & highmem fixes Paul Burton
2016-03-01 2:37 ` Paul Burton
2016-03-01 2:37 ` [PATCH 1/4] MIPS: Flush dcache for flush_kernel_dcache_page Paul Burton
2016-03-01 2:37 ` Paul Burton
2016-03-04 15:09 ` Lars Persson
2016-03-29 8:29 ` Ralf Baechle
2016-03-01 2:37 ` [PATCH 2/4] MIPS: Flush highmem pages in __flush_dcache_page Paul Burton
2016-03-01 2:37 ` Paul Burton
2016-03-29 8:35 ` Ralf Baechle
2016-03-29 8:55 ` Paul Burton
2016-03-29 8:55 ` Paul Burton
2016-03-01 2:37 ` [PATCH 3/4] MIPS: Handle highmem pages in __update_cache Paul Burton
2016-03-01 2:37 ` Paul Burton
2016-03-29 8:39 ` Ralf Baechle
2016-03-01 2:37 ` [PATCH 4/4] MIPS: Sync icache & dcache in set_pte_at Paul Burton
2016-03-01 2:37 ` Paul Burton
2016-03-01 9:44 ` Lars Persson
2016-03-01 9:44 ` Lars Persson
2016-03-01 17:13 ` David Daney [this message]
2016-03-01 17:13 ` David Daney
2016-03-01 17:19 ` Paul Burton
2016-03-01 17:19 ` Paul Burton
2016-03-02 14:12 ` Ralf Baechle
2016-03-02 14:24 ` Paul Burton
2016-03-02 14:24 ` Paul Burton
2016-03-04 17:43 ` David Daney
2016-03-04 17:43 ` David Daney
2016-03-04 17:47 ` Paul Burton
2016-03-04 17:47 ` Paul Burton
2016-03-03 3:03 ` [4/4] " Leonid Yegoshin
2016-03-03 3:03 ` Leonid Yegoshin
2016-03-04 10:37 ` Paul Burton
2016-03-04 10:37 ` Paul Burton
2016-03-04 15:20 ` Lars Persson
2016-03-04 21:01 ` Leonid Yegoshin
2016-03-04 21:01 ` Leonid Yegoshin
2016-03-04 21:21 ` Leonid Yegoshin
2016-03-04 21:21 ` Leonid Yegoshin
2016-03-05 1:06 ` Leonid Yegoshin
2016-03-05 1:06 ` Leonid Yegoshin
2016-03-04 19:02 ` [PATCH 4/4] " Lars Persson
2016-03-05 0:21 ` Paul Burton
2016-03-05 0:27 ` Paul Burton
2016-03-02 11:39 ` [PATCH 0/4] MIPS cache & highmem fixes Harvey Hunt
2016-03-02 11:39 ` Harvey Hunt
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