* Re: [PATCH v2] staging: octeon: remove SPI, POW, PKO, and Helper typedef enums
From: kernel test robot @ 2026-04-18 14:42 UTC (permalink / raw)
To: Maxwell Doose, gregkh, tsbogend
Cc: llvm, oe-kbuild-all, len.bao, yoelvisoliveros, linux-mips,
linux-kernel, linux-staging
In-Reply-To: <20260415122939.77847-1-m32285159@gmail.com>
Hi Maxwell,
kernel test robot noticed the following build warnings:
[auto build test WARNING on staging/staging-testing]
url: https://github.com/intel-lab-lkp/linux/commits/Maxwell-Doose/staging-octeon-remove-SPI-POW-PKO-and-Helper-typedef-enums/20260417-103458
base: staging/staging-testing
patch link: https://lore.kernel.org/r/20260415122939.77847-1-m32285159%40gmail.com
patch subject: [PATCH v2] staging: octeon: remove SPI, POW, PKO, and Helper typedef enums
config: sparc64-allmodconfig (https://download.01.org/0day-ci/archive/20260418/202604182238.w0EH6tRa-lkp@intel.com/config)
compiler: clang version 23.0.0git (https://github.com/llvm/llvm-project 5bac06718f502014fade905512f1d26d578a18f3)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260418/202604182238.w0EH6tRa-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202604182238.w0EH6tRa-lkp@intel.com/
All warnings (new ones prefixed by >>):
In file included from drivers/staging/octeon/ethernet.c:23:
In file included from drivers/staging/octeon/octeon-ethernet.h:41:
drivers/staging/octeon/octeon-stubs.h:1270:49: error: incomplete result type 'struct cvmx_helper_interface_mode' in function definition
1270 | static inline struct cvmx_helper_interface_mode cvmx_helper_interface_get_mode(int
| ^
drivers/staging/octeon/octeon-stubs.h:1270:22: note: forward declaration of 'struct cvmx_helper_interface_mode'
1270 | static inline struct cvmx_helper_interface_mode cvmx_helper_interface_get_mode(int
| ^
drivers/staging/octeon/octeon-stubs.h:1273:9: error: returning 'int' from a function with incompatible result type 'struct cvmx_helper_interface_mode'
1273 | return 0;
| ^
In file included from drivers/staging/octeon/ethernet.c:28:
In file included from drivers/staging/octeon/ethernet-mdio.h:20:
In file included from include/net/xfrm.h:20:
In file included from include/net/sock.h:60:
>> include/linux/poll.h:134:27: warning: division by zero is undefined [-Wdivision-by-zero]
134 | M(RDNORM) | M(RDBAND) | M(WRNORM) | M(WRBAND) |
| ^~~~~~~~~
include/linux/poll.h:132:32: note: expanded from macro 'M'
132 | #define M(X) (__force __poll_t)__MAP(val, POLL##X, (__force __u16)EPOLL##X)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/poll.h:118:51: note: expanded from macro '__MAP'
118 | (from < to ? (v & from) * (to/from) : (v & from) / (from/to))
| ^ ~~~~~~~~~
include/linux/poll.h:134:39: warning: division by zero is undefined [-Wdivision-by-zero]
134 | M(RDNORM) | M(RDBAND) | M(WRNORM) | M(WRBAND) |
| ^~~~~~~~~
include/linux/poll.h:132:32: note: expanded from macro 'M'
132 | #define M(X) (__force __poll_t)__MAP(val, POLL##X, (__force __u16)EPOLL##X)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/poll.h:118:51: note: expanded from macro '__MAP'
118 | (from < to ? (v & from) * (to/from) : (v & from) / (from/to))
| ^ ~~~~~~~~~
include/linux/poll.h:135:12: warning: division by zero is undefined [-Wdivision-by-zero]
135 | M(HUP) | M(RDHUP) | M(MSG);
| ^~~~~~~~
include/linux/poll.h:132:32: note: expanded from macro 'M'
132 | #define M(X) (__force __poll_t)__MAP(val, POLL##X, (__force __u16)EPOLL##X)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/poll.h:118:51: note: expanded from macro '__MAP'
118 | (from < to ? (v & from) * (to/from) : (v & from) / (from/to))
| ^ ~~~~~~~~~
include/linux/poll.h:135:23: warning: division by zero is undefined [-Wdivision-by-zero]
135 | M(HUP) | M(RDHUP) | M(MSG);
| ^~~~~~
include/linux/poll.h:132:32: note: expanded from macro 'M'
132 | #define M(X) (__force __poll_t)__MAP(val, POLL##X, (__force __u16)EPOLL##X)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/poll.h:118:51: note: expanded from macro '__MAP'
118 | (from < to ? (v & from) * (to/from) : (v & from) / (from/to))
| ^ ~~~~~~~~~
4 warnings and 2 errors generated.
--
In file included from ethernet.c:23:
In file included from ./octeon-ethernet.h:41:
./octeon-stubs.h:1270:49: error: incomplete result type 'struct cvmx_helper_interface_mode' in function definition
1270 | static inline struct cvmx_helper_interface_mode cvmx_helper_interface_get_mode(int
| ^
./octeon-stubs.h:1270:22: note: forward declaration of 'struct cvmx_helper_interface_mode'
1270 | static inline struct cvmx_helper_interface_mode cvmx_helper_interface_get_mode(int
| ^
./octeon-stubs.h:1273:9: error: returning 'int' from a function with incompatible result type 'struct cvmx_helper_interface_mode'
1273 | return 0;
| ^
In file included from ethernet.c:28:
In file included from ./ethernet-mdio.h:20:
In file included from include/net/xfrm.h:20:
In file included from include/net/sock.h:60:
>> include/linux/poll.h:134:27: warning: division by zero is undefined [-Wdivision-by-zero]
134 | M(RDNORM) | M(RDBAND) | M(WRNORM) | M(WRBAND) |
| ^~~~~~~~~
include/linux/poll.h:132:32: note: expanded from macro 'M'
132 | #define M(X) (__force __poll_t)__MAP(val, POLL##X, (__force __u16)EPOLL##X)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/poll.h:118:51: note: expanded from macro '__MAP'
118 | (from < to ? (v & from) * (to/from) : (v & from) / (from/to))
| ^ ~~~~~~~~~
include/linux/poll.h:134:39: warning: division by zero is undefined [-Wdivision-by-zero]
134 | M(RDNORM) | M(RDBAND) | M(WRNORM) | M(WRBAND) |
| ^~~~~~~~~
include/linux/poll.h:132:32: note: expanded from macro 'M'
132 | #define M(X) (__force __poll_t)__MAP(val, POLL##X, (__force __u16)EPOLL##X)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/poll.h:118:51: note: expanded from macro '__MAP'
118 | (from < to ? (v & from) * (to/from) : (v & from) / (from/to))
| ^ ~~~~~~~~~
include/linux/poll.h:135:12: warning: division by zero is undefined [-Wdivision-by-zero]
135 | M(HUP) | M(RDHUP) | M(MSG);
| ^~~~~~~~
include/linux/poll.h:132:32: note: expanded from macro 'M'
132 | #define M(X) (__force __poll_t)__MAP(val, POLL##X, (__force __u16)EPOLL##X)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/poll.h:118:51: note: expanded from macro '__MAP'
118 | (from < to ? (v & from) * (to/from) : (v & from) / (from/to))
| ^ ~~~~~~~~~
include/linux/poll.h:135:23: warning: division by zero is undefined [-Wdivision-by-zero]
135 | M(HUP) | M(RDHUP) | M(MSG);
| ^~~~~~
include/linux/poll.h:132:32: note: expanded from macro 'M'
132 | #define M(X) (__force __poll_t)__MAP(val, POLL##X, (__force __u16)EPOLL##X)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/poll.h:118:51: note: expanded from macro '__MAP'
118 | (from < to ? (v & from) * (to/from) : (v & from) / (from/to))
| ^ ~~~~~~~~~
4 warnings and 2 errors generated.
vim +134 include/linux/poll.h
7a163b2195cda0 Al Viro 2018-02-01 129
7a163b2195cda0 Al Viro 2018-02-01 130 static inline __poll_t demangle_poll(u16 val)
7a163b2195cda0 Al Viro 2018-02-01 131 {
7a163b2195cda0 Al Viro 2018-02-01 132 #define M(X) (__force __poll_t)__MAP(val, POLL##X, (__force __u16)EPOLL##X)
7a163b2195cda0 Al Viro 2018-02-01 133 return M(IN) | M(OUT) | M(PRI) | M(ERR) | M(NVAL) |
7a163b2195cda0 Al Viro 2018-02-01 @134 M(RDNORM) | M(RDBAND) | M(WRNORM) | M(WRBAND) |
7a163b2195cda0 Al Viro 2018-02-01 135 M(HUP) | M(RDHUP) | M(MSG);
7a163b2195cda0 Al Viro 2018-02-01 136 #undef M
7a163b2195cda0 Al Viro 2018-02-01 137 }
7a163b2195cda0 Al Viro 2018-02-01 138 #undef __MAP
7a163b2195cda0 Al Viro 2018-02-01 139
7a163b2195cda0 Al Viro 2018-02-01 140
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply
* Re: [PATCH v3] staging: octeon: remove SPI, POW, PKO, and Helper typedef enums
From: Dan Carpenter @ 2026-04-18 7:26 UTC (permalink / raw)
To: Maxwell Doose
Cc: tsbogend, gregkh, len.bao, yoelvisoliveros, linux-mips,
linux-kernel, linux-staging
In-Reply-To: <20260417231908.45323-2-m32285159@gmail.com>
On Fri, Apr 17, 2026 at 06:19:09PM -0500, Maxwell Doose wrote:
> This patch removes custom typedef enums and replaces them with standard
> enums to address the "General code review and cleanup" task in TODO.
>
> The following enums are affected:
>
> - cvmx_spi_mode_t (now enum cvmx_spi_mode)
> - cvmx_helper_interface_mode_t (now enum cvmx_helper_interface_mode_e)
> - cvmx_pow_wait_t (now enum cvmx_pow_wait)
> - cvmx_pko_lock_t (now enum cvmx_pko_lock)
> - cvmx_pko_status_t (now enum cvmx_pko_status)
>
> This patch aligns the octeon codebase more closely with the Linux kernel
> code style, and will address the "cleanup" task in TODO.
>
> Signed-off-by: Maxwell Doose <m32285159@gmail.com>
> ---
> v2:
> - Appended "_e" to enum cvmx_helper_interface_mode to prevent namespace
> collisions with a struct of the same name
> - Fixed errors that were indirect results of the namespace collisions
>
> v3:
> - Fixed function return type in cvmx_helper_interface_get_mode
We're still not going to accept the _e on the end of
cvmx_helper_interface_mode_e. Try figure out a better solution to
having two types with the same name.
regards,
dan carpenter
^ permalink raw reply
* [PATCH v3] staging: octeon: remove SPI, POW, PKO, and Helper typedef enums
From: Maxwell Doose @ 2026-04-17 23:19 UTC (permalink / raw)
To: tsbogend, gregkh
Cc: len.bao, yoelvisoliveros, linux-mips, linux-kernel, linux-staging
This patch removes custom typedef enums and replaces them with standard
enums to address the "General code review and cleanup" task in TODO.
The following enums are affected:
- cvmx_spi_mode_t (now enum cvmx_spi_mode)
- cvmx_helper_interface_mode_t (now enum cvmx_helper_interface_mode_e)
- cvmx_pow_wait_t (now enum cvmx_pow_wait)
- cvmx_pko_lock_t (now enum cvmx_pko_lock)
- cvmx_pko_status_t (now enum cvmx_pko_status)
This patch aligns the octeon codebase more closely with the Linux kernel
code style, and will address the "cleanup" task in TODO.
Signed-off-by: Maxwell Doose <m32285159@gmail.com>
---
v2:
- Appended "_e" to enum cvmx_helper_interface_mode to prevent namespace
collisions with a struct of the same name
- Fixed errors that were indirect results of the namespace collisions
v3:
- Fixed function return type in cvmx_helper_interface_get_mode
.../executive/cvmx-helper-util.c | 2 +-
.../cavium-octeon/executive/cvmx-helper.c | 8 ++---
arch/mips/cavium-octeon/executive/cvmx-pko.c | 6 ++--
arch/mips/cavium-octeon/executive/cvmx-spi.c | 16 ++++-----
.../include/asm/octeon/cvmx-helper-util.h | 2 +-
arch/mips/include/asm/octeon/cvmx-helper.h | 6 ++--
arch/mips/include/asm/octeon/cvmx-pko.h | 20 +++++------
arch/mips/include/asm/octeon/cvmx-pow.h | 12 +++----
arch/mips/include/asm/octeon/cvmx-spi.h | 32 ++++++++---------
drivers/staging/octeon/ethernet.c | 2 +-
drivers/staging/octeon/octeon-ethernet.h | 2 +-
drivers/staging/octeon/octeon-stubs.h | 36 +++++++++----------
12 files changed, 72 insertions(+), 72 deletions(-)
diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper-util.c b/arch/mips/cavium-octeon/executive/cvmx-helper-util.c
index 53b912745dbd..af09e2744e36 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-helper-util.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-helper-util.c
@@ -52,7 +52,7 @@
*
* Returns String
*/
-const char *cvmx_helper_interface_mode_to_string(cvmx_helper_interface_mode_t
+const char *cvmx_helper_interface_mode_to_string(enum cvmx_helper_interface_mode_e
mode)
{
switch (mode) {
diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper.c b/arch/mips/cavium-octeon/executive/cvmx-helper.c
index 9abfc4bf9bd8..b7d037a94769 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-helper.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-helper.c
@@ -95,7 +95,7 @@ EXPORT_SYMBOL_GPL(cvmx_helper_ports_on_interface);
* @INTERNAL
* Return interface mode for CN68xx.
*/
-static cvmx_helper_interface_mode_t __cvmx_get_mode_cn68xx(int interface)
+static enum cvmx_helper_interface_mode_e __cvmx_get_mode_cn68xx(int interface)
{
union cvmx_mio_qlmx_cfg qlm_cfg;
switch (interface) {
@@ -147,7 +147,7 @@ static cvmx_helper_interface_mode_t __cvmx_get_mode_cn68xx(int interface)
* @INTERNAL
* Return interface mode for an Octeon II
*/
-static cvmx_helper_interface_mode_t __cvmx_get_mode_octeon2(int interface)
+static enum cvmx_helper_interface_mode_e __cvmx_get_mode_octeon2(int interface)
{
union cvmx_gmxx_inf_mode mode;
@@ -247,7 +247,7 @@ static cvmx_helper_interface_mode_t __cvmx_get_mode_octeon2(int interface)
* @INTERNAL
* Return interface mode for CN7XXX.
*/
-static cvmx_helper_interface_mode_t __cvmx_get_mode_cn7xxx(int interface)
+static enum cvmx_helper_interface_mode_e __cvmx_get_mode_cn7xxx(int interface)
{
union cvmx_gmxx_inf_mode mode;
@@ -289,7 +289,7 @@ static cvmx_helper_interface_mode_t __cvmx_get_mode_cn7xxx(int interface)
* Returns Mode of the interface. Unknown or unsupported interfaces return
* DISABLED.
*/
-cvmx_helper_interface_mode_t cvmx_helper_interface_get_mode(int interface)
+enum cvmx_helper_interface_mode_e cvmx_helper_interface_get_mode(int interface)
{
union cvmx_gmxx_inf_mode mode;
diff --git a/arch/mips/cavium-octeon/executive/cvmx-pko.c b/arch/mips/cavium-octeon/executive/cvmx-pko.c
index 6e70b859a0ac..199746bc40de 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-pko.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-pko.c
@@ -120,7 +120,7 @@ static void __cvmx_pko_port_map_o68(void)
{
int port;
int interface, index;
- cvmx_helper_interface_mode_t mode;
+ enum cvmx_helper_interface_mode_e mode;
union cvmx_pko_mem_iport_ptrs config;
/*
@@ -323,11 +323,11 @@ EXPORT_SYMBOL_GPL(cvmx_pko_shutdown);
* queues have higher priority than higher numbered queues.
* There must be num_queues elements in the array.
*/
-cvmx_pko_status_t cvmx_pko_config_port(uint64_t port, uint64_t base_queue,
+enum cvmx_pko_status cvmx_pko_config_port(uint64_t port, uint64_t base_queue,
uint64_t num_queues,
const uint64_t priority[])
{
- cvmx_pko_status_t result_code;
+ enum cvmx_pko_status result_code;
uint64_t queue;
union cvmx_pko_mem_queue_ptrs config;
union cvmx_pko_reg_queue_ptrs1 config1;
diff --git a/arch/mips/cavium-octeon/executive/cvmx-spi.c b/arch/mips/cavium-octeon/executive/cvmx-spi.c
index eb9333e84a6b..b6c0b3fa73ad 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-spi.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-spi.c
@@ -102,7 +102,7 @@ void cvmx_spi_set_callbacks(cvmx_spi_callbacks_t *new_callbacks)
*
* Returns Zero on success, negative of failure.
*/
-int cvmx_spi_start_interface(int interface, cvmx_spi_mode_t mode, int timeout,
+int cvmx_spi_start_interface(int interface, enum cvmx_spi_mode mode, int timeout,
int num_ports)
{
int res = -1;
@@ -147,7 +147,7 @@ int cvmx_spi_start_interface(int interface, cvmx_spi_mode_t mode, int timeout,
*
* Returns Zero on success, negative of failure.
*/
-int cvmx_spi_restart_interface(int interface, cvmx_spi_mode_t mode, int timeout)
+int cvmx_spi_restart_interface(int interface, enum cvmx_spi_mode mode, int timeout)
{
int res = -1;
@@ -192,7 +192,7 @@ EXPORT_SYMBOL_GPL(cvmx_spi_restart_interface);
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
-int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode)
+int cvmx_spi_reset_cb(int interface, enum cvmx_spi_mode mode)
{
union cvmx_spxx_dbg_deskew_ctl spxx_dbg_deskew_ctl;
union cvmx_spxx_clk_ctl spxx_clk_ctl;
@@ -308,7 +308,7 @@ int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode)
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
-int cvmx_spi_calendar_setup_cb(int interface, cvmx_spi_mode_t mode,
+int cvmx_spi_calendar_setup_cb(int interface, enum cvmx_spi_mode mode,
int num_ports)
{
int port;
@@ -427,7 +427,7 @@ int cvmx_spi_calendar_setup_cb(int interface, cvmx_spi_mode_t mode,
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
-int cvmx_spi_clock_detect_cb(int interface, cvmx_spi_mode_t mode, int timeout)
+int cvmx_spi_clock_detect_cb(int interface, enum cvmx_spi_mode mode, int timeout)
{
int clock_transitions;
union cvmx_spxx_clk_stat stat;
@@ -505,7 +505,7 @@ int cvmx_spi_clock_detect_cb(int interface, cvmx_spi_mode_t mode, int timeout)
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
-int cvmx_spi_training_cb(int interface, cvmx_spi_mode_t mode, int timeout)
+int cvmx_spi_training_cb(int interface, enum cvmx_spi_mode mode, int timeout)
{
union cvmx_spxx_trn4_ctl spxx_trn4_ctl;
union cvmx_spxx_clk_stat stat;
@@ -574,7 +574,7 @@ int cvmx_spi_training_cb(int interface, cvmx_spi_mode_t mode, int timeout)
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
-int cvmx_spi_calendar_sync_cb(int interface, cvmx_spi_mode_t mode, int timeout)
+int cvmx_spi_calendar_sync_cb(int interface, enum cvmx_spi_mode mode, int timeout)
{
uint64_t MS = cvmx_sysinfo_get()->cpu_clock_hz / 1000;
if (mode & CVMX_SPI_MODE_RX_HALFPLEX) {
@@ -630,7 +630,7 @@ int cvmx_spi_calendar_sync_cb(int interface, cvmx_spi_mode_t mode, int timeout)
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
-int cvmx_spi_interface_up_cb(int interface, cvmx_spi_mode_t mode)
+int cvmx_spi_interface_up_cb(int interface, enum cvmx_spi_mode mode)
{
union cvmx_gmxx_rxx_frm_min gmxx_rxx_frm_min;
union cvmx_gmxx_rxx_frm_max gmxx_rxx_frm_max;
diff --git a/arch/mips/include/asm/octeon/cvmx-helper-util.h b/arch/mips/include/asm/octeon/cvmx-helper-util.h
index 97b27a07cfb0..239819102283 100644
--- a/arch/mips/include/asm/octeon/cvmx-helper-util.h
+++ b/arch/mips/include/asm/octeon/cvmx-helper-util.h
@@ -42,7 +42,7 @@
* Returns String
*/
extern const char
- *cvmx_helper_interface_mode_to_string(cvmx_helper_interface_mode_t mode);
+ *cvmx_helper_interface_mode_to_string(enum cvmx_helper_interface_mode_e mode);
/**
* Setup Random Early Drop to automatically begin dropping packets.
diff --git a/arch/mips/include/asm/octeon/cvmx-helper.h b/arch/mips/include/asm/octeon/cvmx-helper.h
index 0cddce35291b..2aa391a7b059 100644
--- a/arch/mips/include/asm/octeon/cvmx-helper.h
+++ b/arch/mips/include/asm/octeon/cvmx-helper.h
@@ -38,7 +38,7 @@
#include <asm/octeon/cvmx-fpa.h>
#include <asm/octeon/cvmx-wqe.h>
-typedef enum {
+enum cvmx_helper_interface_mode_e {
CVMX_HELPER_INTERFACE_MODE_DISABLED,
CVMX_HELPER_INTERFACE_MODE_RGMII,
CVMX_HELPER_INTERFACE_MODE_GMII,
@@ -49,7 +49,7 @@ typedef enum {
CVMX_HELPER_INTERFACE_MODE_PICMG,
CVMX_HELPER_INTERFACE_MODE_NPI,
CVMX_HELPER_INTERFACE_MODE_LOOP,
-} cvmx_helper_interface_mode_t;
+};
union cvmx_helper_link_info {
uint64_t u64;
@@ -125,7 +125,7 @@ extern int cvmx_helper_get_number_of_interfaces(void);
* Returns Mode of the interface. Unknown or unsupported interfaces return
* DISABLED.
*/
-extern cvmx_helper_interface_mode_t cvmx_helper_interface_get_mode(int
+extern enum cvmx_helper_interface_mode_e cvmx_helper_interface_get_mode(int
interface);
/**
diff --git a/arch/mips/include/asm/octeon/cvmx-pko.h b/arch/mips/include/asm/octeon/cvmx-pko.h
index f18a7f24daf8..a742c1d61d8f 100644
--- a/arch/mips/include/asm/octeon/cvmx-pko.h
+++ b/arch/mips/include/asm/octeon/cvmx-pko.h
@@ -80,7 +80,7 @@
#define CVMX_PKO_ILLEGAL_QUEUE 0xFFFF
#define CVMX_PKO_MAX_QUEUE_DEPTH 0
-typedef enum {
+enum cvmx_pko_status {
CVMX_PKO_SUCCESS,
CVMX_PKO_INVALID_PORT,
CVMX_PKO_INVALID_QUEUE,
@@ -88,12 +88,12 @@ typedef enum {
CVMX_PKO_NO_MEMORY,
CVMX_PKO_PORT_ALREADY_SETUP,
CVMX_PKO_CMD_QUEUE_INIT_ERROR
-} cvmx_pko_status_t;
+};
/**
* This enumeration represents the different locking modes supported by PKO.
*/
-typedef enum {
+enum cvmx_pko_lock {
/*
* PKO doesn't do any locking. It is the responsibility of the
* application to make sure that no other core is accessing
@@ -112,7 +112,7 @@ typedef enum {
* ll/sc. This is the most portable locking mechanism.
*/
CVMX_PKO_LOCK_CMD_QUEUE = 2,
-} cvmx_pko_lock_t;
+};
typedef struct {
uint32_t packets;
@@ -306,7 +306,7 @@ extern void cvmx_pko_shutdown(void);
* of a value of 1. There must be num_queues elements in the
* array.
*/
-extern cvmx_pko_status_t cvmx_pko_config_port(uint64_t port,
+extern enum cvmx_pko_status cvmx_pko_config_port(uint64_t port,
uint64_t base_queue,
uint64_t num_queues,
const uint64_t priority[]);
@@ -374,7 +374,7 @@ static inline void cvmx_pko_doorbell(uint64_t port, uint64_t queue,
*/
static inline void cvmx_pko_send_packet_prepare(uint64_t port, uint64_t queue,
- cvmx_pko_lock_t use_locking)
+ enum cvmx_pko_lock use_locking)
{
if (use_locking == CVMX_PKO_LOCK_ATOMIC_TAG) {
/*
@@ -414,12 +414,12 @@ static inline void cvmx_pko_send_packet_prepare(uint64_t port, uint64_t queue,
* Returns: CVMX_PKO_SUCCESS on success, or error code on
* failure of output
*/
-static inline cvmx_pko_status_t cvmx_pko_send_packet_finish(
+static inline enum cvmx_pko_status cvmx_pko_send_packet_finish(
uint64_t port,
uint64_t queue,
union cvmx_pko_command_word0 pko_command,
union cvmx_buf_ptr packet,
- cvmx_pko_lock_t use_locking)
+ enum cvmx_pko_lock use_locking)
{
cvmx_cmd_queue_result_t result;
if (use_locking == CVMX_PKO_LOCK_ATOMIC_TAG)
@@ -457,13 +457,13 @@ static inline cvmx_pko_status_t cvmx_pko_send_packet_finish(
* Returns: CVMX_PKO_SUCCESS on success, or error code on
* failure of output
*/
-static inline cvmx_pko_status_t cvmx_pko_send_packet_finish3(
+static inline enum cvmx_pko_status cvmx_pko_send_packet_finish3(
uint64_t port,
uint64_t queue,
union cvmx_pko_command_word0 pko_command,
union cvmx_buf_ptr packet,
uint64_t addr,
- cvmx_pko_lock_t use_locking)
+ enum cvmx_pko_lock use_locking)
{
cvmx_cmd_queue_result_t result;
if (use_locking == CVMX_PKO_LOCK_ATOMIC_TAG)
diff --git a/arch/mips/include/asm/octeon/cvmx-pow.h b/arch/mips/include/asm/octeon/cvmx-pow.h
index 21b4378244fa..409029809639 100644
--- a/arch/mips/include/asm/octeon/cvmx-pow.h
+++ b/arch/mips/include/asm/octeon/cvmx-pow.h
@@ -84,10 +84,10 @@ enum cvmx_pow_tag_type {
/**
* Wait flag values for pow functions.
*/
-typedef enum {
+enum cvmx_pow_wait {
CVMX_POW_WAIT = 1,
CVMX_POW_NO_WAIT = 0,
-} cvmx_pow_wait_t;
+};
/**
* POW tag operations. These are used in the data stored to the POW.
@@ -1348,7 +1348,7 @@ static inline void cvmx_pow_tag_sw_wait(void)
* Returns: the WQE pointer from POW. Returns NULL if no work
* was available.
*/
-static inline struct cvmx_wqe *cvmx_pow_work_request_sync_nocheck(cvmx_pow_wait_t
+static inline struct cvmx_wqe *cvmx_pow_work_request_sync_nocheck(enum cvmx_pow_wait
wait)
{
cvmx_pow_load_addr_t ptr;
@@ -1382,7 +1382,7 @@ static inline struct cvmx_wqe *cvmx_pow_work_request_sync_nocheck(cvmx_pow_wait_
* Returns: the WQE pointer from POW. Returns NULL if no work
* was available.
*/
-static inline struct cvmx_wqe *cvmx_pow_work_request_sync(cvmx_pow_wait_t wait)
+static inline struct cvmx_wqe *cvmx_pow_work_request_sync(enum cvmx_pow_wait wait)
{
if (CVMX_ENABLE_POW_CHECKS)
__cvmx_pow_warn_if_pending_switch(__func__);
@@ -1436,7 +1436,7 @@ static inline enum cvmx_pow_tag_type cvmx_pow_work_request_null_rd(void)
* timeout), 0 to cause response to return immediately
*/
static inline void cvmx_pow_work_request_async_nocheck(int scr_addr,
- cvmx_pow_wait_t wait)
+ enum cvmx_pow_wait wait)
{
cvmx_pow_iobdma_store_t data;
@@ -1465,7 +1465,7 @@ static inline void cvmx_pow_work_request_async_nocheck(int scr_addr,
* timeout), 0 to cause response to return immediately
*/
static inline void cvmx_pow_work_request_async(int scr_addr,
- cvmx_pow_wait_t wait)
+ enum cvmx_pow_wait wait)
{
if (CVMX_ENABLE_POW_CHECKS)
__cvmx_pow_warn_if_pending_switch(__func__);
diff --git a/arch/mips/include/asm/octeon/cvmx-spi.h b/arch/mips/include/asm/octeon/cvmx-spi.h
index d5038cc4b475..c9c8590e0a9a 100644
--- a/arch/mips/include/asm/octeon/cvmx-spi.h
+++ b/arch/mips/include/asm/octeon/cvmx-spi.h
@@ -36,35 +36,35 @@
/* CSR typedefs have been moved to cvmx-csr-*.h */
-typedef enum {
+enum cvmx_spi_mode {
CVMX_SPI_MODE_UNKNOWN = 0,
CVMX_SPI_MODE_TX_HALFPLEX = 1,
CVMX_SPI_MODE_RX_HALFPLEX = 2,
CVMX_SPI_MODE_DUPLEX = 3
-} cvmx_spi_mode_t;
+};
/** Callbacks structure to customize SPI4 initialization sequence */
typedef struct {
/** Called to reset SPI4 DLL */
- int (*reset_cb) (int interface, cvmx_spi_mode_t mode);
+ int (*reset_cb) (int interface, enum cvmx_spi_mode mode);
/** Called to setup calendar */
- int (*calendar_setup_cb) (int interface, cvmx_spi_mode_t mode,
+ int (*calendar_setup_cb) (int interface, enum cvmx_spi_mode mode,
int num_ports);
/** Called for Tx and Rx clock detection */
- int (*clock_detect_cb) (int interface, cvmx_spi_mode_t mode,
+ int (*clock_detect_cb) (int interface, enum cvmx_spi_mode mode,
int timeout);
/** Called to perform link training */
- int (*training_cb) (int interface, cvmx_spi_mode_t mode, int timeout);
+ int (*training_cb) (int interface, enum cvmx_spi_mode mode, int timeout);
/** Called for calendar data synchronization */
- int (*calendar_sync_cb) (int interface, cvmx_spi_mode_t mode,
+ int (*calendar_sync_cb) (int interface, enum cvmx_spi_mode mode,
int timeout);
/** Called when interface is up */
- int (*interface_up_cb) (int interface, cvmx_spi_mode_t mode);
+ int (*interface_up_cb) (int interface, enum cvmx_spi_mode mode);
} cvmx_spi_callbacks_t;
@@ -94,7 +94,7 @@ static inline int cvmx_spi_is_spi_interface(int interface)
*
* Returns Zero on success, negative of failure.
*/
-extern int cvmx_spi_start_interface(int interface, cvmx_spi_mode_t mode,
+extern int cvmx_spi_start_interface(int interface, enum cvmx_spi_mode mode,
int timeout, int num_ports);
/**
@@ -110,7 +110,7 @@ extern int cvmx_spi_start_interface(int interface, cvmx_spi_mode_t mode,
* @timeout: Timeout to wait for clock synchronization in seconds
* Returns Zero on success, negative of failure.
*/
-extern int cvmx_spi_restart_interface(int interface, cvmx_spi_mode_t mode,
+extern int cvmx_spi_restart_interface(int interface, enum cvmx_spi_mode mode,
int timeout);
/**
@@ -180,7 +180,7 @@ extern void cvmx_spi_set_callbacks(cvmx_spi_callbacks_t *new_callbacks);
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
-extern int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode);
+extern int cvmx_spi_reset_cb(int interface, enum cvmx_spi_mode mode);
/**
* Callback to setup calendar and miscellaneous settings before clock
@@ -197,7 +197,7 @@ extern int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode);
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
-extern int cvmx_spi_calendar_setup_cb(int interface, cvmx_spi_mode_t mode,
+extern int cvmx_spi_calendar_setup_cb(int interface, enum cvmx_spi_mode mode,
int num_ports);
/**
@@ -214,7 +214,7 @@ extern int cvmx_spi_calendar_setup_cb(int interface, cvmx_spi_mode_t mode,
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
-extern int cvmx_spi_clock_detect_cb(int interface, cvmx_spi_mode_t mode,
+extern int cvmx_spi_clock_detect_cb(int interface, enum cvmx_spi_mode mode,
int timeout);
/**
@@ -231,7 +231,7 @@ extern int cvmx_spi_clock_detect_cb(int interface, cvmx_spi_mode_t mode,
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
-extern int cvmx_spi_training_cb(int interface, cvmx_spi_mode_t mode,
+extern int cvmx_spi_training_cb(int interface, enum cvmx_spi_mode mode,
int timeout);
/**
@@ -248,7 +248,7 @@ extern int cvmx_spi_training_cb(int interface, cvmx_spi_mode_t mode,
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
-extern int cvmx_spi_calendar_sync_cb(int interface, cvmx_spi_mode_t mode,
+extern int cvmx_spi_calendar_sync_cb(int interface, enum cvmx_spi_mode mode,
int timeout);
/**
@@ -264,6 +264,6 @@ extern int cvmx_spi_calendar_sync_cb(int interface, cvmx_spi_mode_t mode,
* Returns Zero on success, non-zero error code on failure (will cause
* SPI initialization to abort)
*/
-extern int cvmx_spi_interface_up_cb(int interface, cvmx_spi_mode_t mode);
+extern int cvmx_spi_interface_up_cb(int interface, enum cvmx_spi_mode mode);
#endif /* __CVMX_SPI_H__ */
diff --git a/drivers/staging/octeon/ethernet.c b/drivers/staging/octeon/ethernet.c
index eadb74fc14c8..5a3fe651bc48 100644
--- a/drivers/staging/octeon/ethernet.c
+++ b/drivers/staging/octeon/ethernet.c
@@ -798,7 +798,7 @@ static int cvm_oct_probe(struct platform_device *pdev)
num_interfaces = cvmx_helper_get_number_of_interfaces();
for (interface = 0; interface < num_interfaces; interface++) {
- cvmx_helper_interface_mode_t imode =
+ enum cvmx_helper_interface_mode_e imode =
cvmx_helper_interface_get_mode(interface);
int num_ports = cvmx_helper_ports_on_interface(interface);
int port;
diff --git a/drivers/staging/octeon/octeon-ethernet.h b/drivers/staging/octeon/octeon-ethernet.h
index a6140705706f..d369c97c1332 100644
--- a/drivers/staging/octeon/octeon-ethernet.h
+++ b/drivers/staging/octeon/octeon-ethernet.h
@@ -57,7 +57,7 @@ struct octeon_ethernet {
struct net_device *netdev;
/*
* Type of port. This is one of the enums in
- * cvmx_helper_interface_mode_t
+ * cvmx_helper_interface_mode
*/
int imode;
/* PHY mode */
diff --git a/drivers/staging/octeon/octeon-stubs.h b/drivers/staging/octeon/octeon-stubs.h
index 291eaffd2543..1557ae2fe091 100644
--- a/drivers/staging/octeon/octeon-stubs.h
+++ b/drivers/staging/octeon/octeon-stubs.h
@@ -215,14 +215,14 @@ enum cvmx_fau_op_size {
CVMX_FAU_OP_SIZE_64 = 3
};
-typedef enum {
+enum cvmx_spi_mode {
CVMX_SPI_MODE_UNKNOWN = 0,
CVMX_SPI_MODE_TX_HALFPLEX = 1,
CVMX_SPI_MODE_RX_HALFPLEX = 2,
CVMX_SPI_MODE_DUPLEX = 3
-} cvmx_spi_mode_t;
+};
-typedef enum {
+enum cvmx_helper_interface_mode_e {
CVMX_HELPER_INTERFACE_MODE_DISABLED,
CVMX_HELPER_INTERFACE_MODE_RGMII,
CVMX_HELPER_INTERFACE_MODE_GMII,
@@ -233,20 +233,20 @@ typedef enum {
CVMX_HELPER_INTERFACE_MODE_PICMG,
CVMX_HELPER_INTERFACE_MODE_NPI,
CVMX_HELPER_INTERFACE_MODE_LOOP,
-} cvmx_helper_interface_mode_t;
+};
-typedef enum {
+enum cvmx_pow_wait {
CVMX_POW_WAIT = 1,
CVMX_POW_NO_WAIT = 0,
-} cvmx_pow_wait_t;
+};
-typedef enum {
+enum cvmx_pko_lock {
CVMX_PKO_LOCK_NONE = 0,
CVMX_PKO_LOCK_ATOMIC_TAG = 1,
CVMX_PKO_LOCK_CMD_QUEUE = 2,
-} cvmx_pko_lock_t;
+};
-typedef enum {
+enum cvmx_pko_status {
CVMX_PKO_SUCCESS,
CVMX_PKO_INVALID_PORT,
CVMX_PKO_INVALID_QUEUE,
@@ -254,7 +254,7 @@ typedef enum {
CVMX_PKO_NO_MEMORY,
CVMX_PKO_PORT_ALREADY_SETUP,
CVMX_PKO_CMD_QUEUE_INIT_ERROR
-} cvmx_pko_status_t;
+};
enum cvmx_pow_tag_type {
CVMX_POW_TAG_TYPE_ORDERED = 0L,
@@ -1267,7 +1267,7 @@ static inline void cvmx_pko_get_port_status(u64 port_num, u64 clear,
cvmx_pko_port_status_t *status)
{ }
-static inline cvmx_helper_interface_mode_t cvmx_helper_interface_get_mode(int
+static inline enum cvmx_helper_interface_mode_e cvmx_helper_interface_get_mode(int
interface)
{
return 0;
@@ -1344,11 +1344,11 @@ static inline unsigned int cvmx_get_core_num(void)
}
static inline void cvmx_pow_work_request_async_nocheck(int scr_addr,
- cvmx_pow_wait_t wait)
+ enum cvmx_pow_wait wait)
{ }
static inline void cvmx_pow_work_request_async(int scr_addr,
- cvmx_pow_wait_t wait)
+ enum cvmx_pow_wait wait)
{ }
static inline struct cvmx_wqe *cvmx_pow_work_response_async(int scr_addr)
@@ -1358,13 +1358,13 @@ static inline struct cvmx_wqe *cvmx_pow_work_response_async(int scr_addr)
return wqe;
}
-static inline struct cvmx_wqe *cvmx_pow_work_request_sync(cvmx_pow_wait_t wait)
+static inline struct cvmx_wqe *cvmx_pow_work_request_sync(enum cvmx_pow_wait wait)
{
return (void *)(unsigned long)wait;
}
static inline int cvmx_spi_restart_interface(int interface,
- cvmx_spi_mode_t mode, int timeout)
+ enum cvmx_spi_mode mode, int timeout)
{
return 0;
}
@@ -1383,12 +1383,12 @@ static inline union cvmx_gmxx_rxx_rx_inbnd cvmx_spi4000_check_speed(int interfac
}
static inline void cvmx_pko_send_packet_prepare(u64 port, u64 queue,
- cvmx_pko_lock_t use_locking)
+ enum cvmx_pko_lock use_locking)
{ }
-static inline cvmx_pko_status_t cvmx_pko_send_packet_finish(u64 port,
+static inline enum cvmx_pko_status cvmx_pko_send_packet_finish(u64 port,
u64 queue, union cvmx_pko_command_word0 pko_command,
- union cvmx_buf_ptr packet, cvmx_pko_lock_t use_locking)
+ union cvmx_buf_ptr packet, enum cvmx_pko_lock use_locking)
{
return 0;
}
--
2.53.0
^ permalink raw reply related
* Re: [PATCH v2] staging: octeon: remove SPI, POW, PKO, and Helper typedef enums
From: kernel test robot @ 2026-04-17 21:16 UTC (permalink / raw)
To: Maxwell Doose, gregkh, tsbogend
Cc: llvm, oe-kbuild-all, len.bao, yoelvisoliveros, linux-mips,
linux-kernel, linux-staging
In-Reply-To: <20260415122939.77847-1-m32285159@gmail.com>
Hi Maxwell,
kernel test robot noticed the following build errors:
[auto build test ERROR on staging/staging-testing]
url: https://github.com/intel-lab-lkp/linux/commits/Maxwell-Doose/staging-octeon-remove-SPI-POW-PKO-and-Helper-typedef-enums/20260417-103458
base: staging/staging-testing
patch link: https://lore.kernel.org/r/20260415122939.77847-1-m32285159%40gmail.com
patch subject: [PATCH v2] staging: octeon: remove SPI, POW, PKO, and Helper typedef enums
config: loongarch-allmodconfig (https://download.01.org/0day-ci/archive/20260418/202604180530.yvwobb0w-lkp@intel.com/config)
compiler: clang version 19.1.7 (https://github.com/llvm/llvm-project cd708029e0b2869e80abe31ddb175f7c35361f90)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260418/202604180530.yvwobb0w-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202604180530.yvwobb0w-lkp@intel.com/
All errors (new ones prefixed by >>):
In file included from drivers/staging/octeon/ethernet.c:23:
In file included from drivers/staging/octeon/octeon-ethernet.h:41:
>> drivers/staging/octeon/octeon-stubs.h:1270:49: error: incomplete result type 'struct cvmx_helper_interface_mode' in function definition
1270 | static inline struct cvmx_helper_interface_mode cvmx_helper_interface_get_mode(int
| ^
drivers/staging/octeon/octeon-stubs.h:1270:22: note: forward declaration of 'struct cvmx_helper_interface_mode'
1270 | static inline struct cvmx_helper_interface_mode cvmx_helper_interface_get_mode(int
| ^
>> drivers/staging/octeon/octeon-stubs.h:1273:9: error: returning 'int' from a function with incompatible result type 'struct cvmx_helper_interface_mode'
1273 | return 0;
| ^
2 errors generated.
vim +1270 drivers/staging/octeon/octeon-stubs.h
1269
> 1270 static inline struct cvmx_helper_interface_mode cvmx_helper_interface_get_mode(int
1271 interface)
1272 {
> 1273 return 0;
1274 }
1275
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply
* Re: [PATCH 1/2] dt-bindings: timer: econet: Update EN751627 for multi-IRQ
From: Conor Dooley @ 2026-04-17 16:17 UTC (permalink / raw)
To: Caleb James DeLisle
Cc: linux-mips, naseefkm, daniel.lezcano, tglx, robh, krzk+dt,
conor+dt, linux-kernel, devicetree
In-Reply-To: <20260416175101.958073-2-cjd@cjdns.fr>
[-- Attachment #1: Type: text/plain, Size: 2853 bytes --]
On Thu, Apr 16, 2026 at 05:51:00PM +0000, Caleb James DeLisle wrote:
> From conception, this driver supported EN751627 as it is the same
> hardware that is used in EN751221. However, it was expected that
> EN751627 would use a percpu IRQ as does EN751221, this is how it
> works in vendor code. However upon finding that the "mti,gic" intc
> works on EN751627 with no modification - but it provides a unique
> interrupt per-timer, it is deemed best to make this driver use
> multiple IRQs when on the EN751627 platform.
Please drop mention of drivers here, bindings are about hardware,
whether or not the driver uses 1 or 4 interrupts doesn't matter, the
binding should have 4 because the hardware has 4.
pw-bot: changes-requested
Otherwise, this looks fine, so with that stuff culled
Acked-by: Conor Dooley <conor.dooley@microchip.com>
>
> Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
> ---
> .../bindings/timer/econet,en751221-timer.yaml | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml b/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml
> index c1e7c2b6afde..f338739e039c 100644
> --- a/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml
> +++ b/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml
> @@ -28,8 +28,8 @@ properties:
> maxItems: 2
>
> interrupts:
> - maxItems: 1
> - description: A percpu-devid timer interrupt shared across CPUs.
> + minItems: 1
> + maxItems: 4
>
> clocks:
> maxItems: 1
> @@ -52,21 +52,31 @@ allOf:
> items:
> - description: VPE timers 0 and 1
> - description: VPE timers 2 and 3
> + interrupts:
> + description: An interrupt for each timer (one per VPE)
> + minItems: 4
> else:
> properties:
> reg:
> items:
> - description: VPE timers 0 and 1
> + interrupts:
> + description: A percpu-devid timer interrupt shared across timers
> + maxItems: 1
>
> additionalProperties: false
>
> examples:
> - |
> + #include <dt-bindings/interrupt-controller/mips-gic.h>
> timer@1fbf0400 {
> compatible = "econet,en751627-timer", "econet,en751221-timer";
> reg = <0x1fbf0400 0x100>, <0x1fbe0000 0x100>;
> interrupt-parent = <&intc>;
> - interrupts = <30>;
> + interrupts = <GIC_SHARED 30 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SHARED 29 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SHARED 37 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SHARED 36 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&hpt_clock>;
> };
> - |
> --
> 2.39.5
>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply
* Re: [GIT PULL] MIPS changes for v7.1
From: pr-tracker-bot @ 2026-04-17 16:04 UTC (permalink / raw)
To: Thomas Bogendoerfer; +Cc: torvalds, linux-mips, linux-kernel
In-Reply-To: <aeI1M497YKp8Ii_S@alpha.franken.de>
The pull request you sent on Fri, 17 Apr 2026 15:27:15 +0200:
> git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git/ tags/mips_7.1
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/d730905bc3c0075275b2d109cd971735274b98c0
Thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/prtracker.html
^ permalink raw reply
* Re: [PATCH] mips: cavium-octeon: remove cmd queue state and related typedefs
From: Maxwell Doose @ 2026-04-17 14:45 UTC (permalink / raw)
To: Dan Carpenter; +Cc: tsbogend, gregkh, linux-mips, linux-kernel, linux-staging
In-Reply-To: <aeI9ZDPoP0apY92N@stanley.mountain>
On Fri, Apr 17, 2026 at 9:02 AM Dan Carpenter <error27@gmail.com> wrote:
>
> Generally, outside of staging, you just go along with whatever the
> original author wanted. They did the work after all, so they get to
> decide.
Sorry about that, still figuring out the workflow. I agree, the way they
did this is...interesting, to say the least, but if I try this again I'll drop
the extern move.
> This patch removes the declaration in __cvmx_cmd_queue_state_ptr() but
> leaves it in __cvmx_cmd_queue_get_state(). We definitely can't do that.
> And we can't mix this in with a remove typedefs patch.
Thanks for pointing that out, I must've missed it. If I try again I'll
fix it but given that this is mips and this stuff is usually for staging,
it's going to be unlikely unless a maintainer wants it.
thanks,
maxwell
^ permalink raw reply
* Re: [PATCH] mips: cavium-octeon: remove cmd queue state and related typedefs
From: Dan Carpenter @ 2026-04-17 14:02 UTC (permalink / raw)
To: Maxwell Doose; +Cc: tsbogend, gregkh, linux-mips, linux-kernel, linux-staging
In-Reply-To: <20260417023602.112359-1-m32285159@gmail.com>
On Thu, Apr 16, 2026 at 09:36:02PM -0500, Maxwell Doose wrote:
> diff --git a/arch/mips/include/asm/octeon/cvmx-cmd-queue.h b/arch/mips/include/asm/octeon/cvmx-cmd-queue.h
> index 67e1b2162b19..faef98173a4f 100644
> --- a/arch/mips/include/asm/octeon/cvmx-cmd-queue.h
> +++ b/arch/mips/include/asm/octeon/cvmx-cmd-queue.h
> @@ -71,6 +71,12 @@
> *
> */
>
> +/* Global pointer to the state of command the queues
> + * Moved here to satisfy requirements in cvmx-cmd-queue.c for EXPORT_SYMBOL_GPL
> + */
> +extern struct __cvmx_cmd_queue_all_state
> + *__cvmx_cmd_queue_state_ptr;
> +
This is arch/mips/ and that's a different tree from staging with
different maintainers. Generally, the rest of the kernel doesn't like
churn so I probably wouldn't send patches like this one for arch/mips/.
This comment isn't accurate. This is a Sparse thing and nothing to do
with EXPORT_SYMBOL_GPL.
Normally we would decare variables like this in a header file, sure.
I guess the original authors wanted make absolutely sure no one ever
used this variable so they declared as an extern in
__cvmx_cmd_queue_state_ptr() __cvmx_cmd_queue_get_state(). It's unusual
and paranoid but I can't think of another reason why they would do it.
Generally, outside of staging, you just go along with whatever the
original author wanted. They did the work after all, so they get to
decide.
This patch removes the declaration in __cvmx_cmd_queue_state_ptr() but
leaves it in __cvmx_cmd_queue_get_state(). We definitely can't do that.
And we can't mix this in with a remove typedefs patch.
regards,
dan carpenter
> @@ -234,10 +240,8 @@ static inline int __cvmx_cmd_queue_get_index(cvmx_cmd_queue_id_t queue_id)
> * @qptr: Pointer to the queue's global state
> */
> static inline void __cvmx_cmd_queue_lock(cvmx_cmd_queue_id_t queue_id,
> - __cvmx_cmd_queue_state_t *qptr)
> + struct __cvmx_cmd_queue_state *qptr)
> {
> - extern __cvmx_cmd_queue_all_state_t
> - *__cvmx_cmd_queue_state_ptr;
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> int tmp;
> int my_ticket;
> prefetch(qptr);
[ snip]
> @@ -299,10 +303,10 @@ static inline void __cvmx_cmd_queue_unlock(__cvmx_cmd_queue_state_t *qptr)
> *
> * Returns Queue structure or NULL on failure
> */
> -static inline __cvmx_cmd_queue_state_t
> +static inline struct __cvmx_cmd_queue_state
> *__cvmx_cmd_queue_get_state(cvmx_cmd_queue_id_t queue_id)
> {
> - extern __cvmx_cmd_queue_all_state_t
> + extern struct __cvmx_cmd_queue_all_state
> *__cvmx_cmd_queue_state_ptr;
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> return &__cvmx_cmd_queue_state_ptr->
> state[__cvmx_cmd_queue_get_index(queue_id)];
^ permalink raw reply
* [GIT PULL] MIPS changes for v7.1
From: Thomas Bogendoerfer @ 2026-04-17 13:27 UTC (permalink / raw)
To: torvalds; +Cc: linux-mips, linux-kernel
The following changes since commit 591cd656a1bf5ea94a222af5ef2ee76df029c1d2:
Linux 7.0-rc7 (2026-04-05 15:26:23 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git/ tags/mips_7.1
for you to fetch changes up to 15513eefac7ca68602e9de9853f5e671bf7b4eef:
MIPS/mtd: Handle READY GPIO in generic NAND platform data (2026-04-13 15:41:56 +0200)
----------------------------------------------------------------
Support for Mobileye EyeQ6Lplus
Cleanups and fixes
----------------------------------------------------------------
Andy Shevchenko (1):
MIPS: Alchemy: Remove unused forward declaration
Benoît Monin (13):
dt-bindings: mips: Add Mobileye EyeQ6Lplus SoC
dt-bindings: soc: mobileye: Add EyeQ6Lplus OLB
MIPS: Add Mobileye EyeQ6Lplus support
reset: eyeq: Add Mobileye EyeQ6Lplus OLB
pinctrl: eyeq5: Use match data
pinctrl: eyeq5: Add Mobileye EyeQ6Lplus OLB
clk: eyeq: Skip post-divisor when computing PLL frequency
clk: eyeq: Adjust PLL accuracy computation
clk: eyeq: Add Mobileye EyeQ6Lplus OLB
MIPS: Add Mobileye EyeQ6Lplus SoC dtsi
MIPS: Add Mobileye EyeQ6Lplus evaluation board dts
MIPS: config: add eyeq6lplus_defconfig
MAINTAINERS: Mobileye: Add EyeQ6Lplus files
Caleb James DeLisle (1):
mips: dts: Add PCIe to EcoNet EN751221
Linus Walleij (2):
MIPS/input: Move RB532 button to GPIO descriptors
MIPS/mtd: Handle READY GPIO in generic NAND platform data
Maciej W. Rozycki (4):
MIPS: kernel: Remove $0 clobber from `mult_sh_align_mod'
MIPS: DEC: Rate-limit memory errors for ECC systems
MIPS: DEC: Rate-limit memory errors for KN01 systems
MIPS: DEC: Rate-limit memory errors for non-KN01 parity systems
Pengpeng Hou (1):
MIPS: validate DT bootargs before appending them
Rong Zhang (1):
MIPS: dts: loongson64g-package: Switch to Loongson UART driver
Shiji Yang (3):
mips: pci-mt7620: fix bridge register access
mips: pci-mt7620: add more register init values
mips: pci-mt7620: rework initialization procedure
Thomas Zimmermann (1):
arch/mips: Drop CONFIG_FIRMWARE_EDID from defconfig files
Théo Lebrun (3):
dt-bindings: soc: mobileye: OLB is an Ethernet PHY provider on EyeQ5
MIPS: mobileye: eyeq5: add two Cadence GEM Ethernet controllers
MIPS: mobileye: eyeq5-epm: add two Cadence GEM Ethernet PHYs
.../devicetree/bindings/mips/mobileye.yaml | 5 +
.../bindings/soc/mobileye/mobileye,eyeq5-olb.yaml | 7 +-
.../soc/mobileye/mobileye,eyeq6lplus-olb.yaml | 208 ++++++++++
MAINTAINERS | 4 +-
arch/mips/boot/dts/econet/en751221.dtsi | 114 ++++++
.../dts/econet/en751221_smartfiber_xp8421-b.dts | 21 +
.../boot/dts/loongson/loongson64g-package.dtsi | 4 +-
arch/mips/boot/dts/mobileye/Makefile | 1 +
arch/mips/boot/dts/mobileye/eyeq5-epm5.dts | 26 ++
arch/mips/boot/dts/mobileye/eyeq5.dtsi | 45 +++
arch/mips/boot/dts/mobileye/eyeq6lplus-epm6.dts | 103 +++++
arch/mips/boot/dts/mobileye/eyeq6lplus-pins.dtsi | 84 ++++
arch/mips/boot/dts/mobileye/eyeq6lplus.dtsi | 170 ++++++++
arch/mips/configs/eyeq6lplus_defconfig | 117 ++++++
arch/mips/configs/ip32_defconfig | 1 -
arch/mips/configs/lemote2f_defconfig | 1 -
arch/mips/configs/malta_qemu_32r6_defconfig | 1 -
arch/mips/configs/maltaaprp_defconfig | 1 -
arch/mips/configs/maltasmvp_defconfig | 1 -
arch/mips/configs/maltasmvp_eva_defconfig | 1 -
arch/mips/configs/maltaup_defconfig | 1 -
arch/mips/dec/ecc-berr.c | 16 +-
arch/mips/dec/kn01-berr.c | 6 +-
arch/mips/dec/kn02xa-berr.c | 26 +-
arch/mips/econet/Kconfig | 2 +
arch/mips/include/asm/mach-au1x00/gpio-au1000.h | 2 -
arch/mips/include/asm/mach-au1x00/gpio-au1300.h | 1 -
arch/mips/kernel/r4k-bugs64.c | 2 +-
arch/mips/kernel/setup.c | 4 +
arch/mips/mobileye/Kconfig | 3 +
arch/mips/mobileye/Platform | 1 +
arch/mips/pci/pci-mt7620.c | 110 ++++--
arch/mips/rb532/devices.c | 83 ++--
drivers/clk/Kconfig | 4 +-
drivers/clk/clk-eyeq.c | 90 ++++-
drivers/input/misc/rb532_button.c | 35 +-
drivers/mtd/nand/raw/plat_nand.c | 24 +-
drivers/pinctrl/Kconfig | 4 +-
drivers/pinctrl/pinctrl-eyeq5.c | 439 +++++++++++++++------
drivers/reset/Kconfig | 4 +-
drivers/reset/reset-eyeq.c | 31 ++
.../dt-bindings/clock/mobileye,eyeq6lplus-clk.h | 37 ++
42 files changed, 1591 insertions(+), 249 deletions(-)
create mode 100644 Documentation/devicetree/bindings/soc/mobileye/mobileye,eyeq6lplus-olb.yaml
create mode 100644 arch/mips/boot/dts/mobileye/eyeq6lplus-epm6.dts
create mode 100644 arch/mips/boot/dts/mobileye/eyeq6lplus-pins.dtsi
create mode 100644 arch/mips/boot/dts/mobileye/eyeq6lplus.dtsi
create mode 100644 arch/mips/configs/eyeq6lplus_defconfig
create mode 100644 include/dt-bindings/clock/mobileye,eyeq6lplus-clk.h
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
^ permalink raw reply
* Re: [PATCH] mips: cavium-octeon: remove cmd queue state and related typedefs
From: Maxwell Doose @ 2026-04-17 13:16 UTC (permalink / raw)
To: Dan Carpenter; +Cc: tsbogend, gregkh, linux-mips, linux-kernel, linux-staging
In-Reply-To: <aeHERE58gSbAe795@stanley.mountain>
On Fri, Apr 17, 2026 at 12:25 AM Dan Carpenter <error27@gmail.com> wrote:
>
> This should be two different patches. Is there no way to move the
> variable declarations around first and then get rid of the typedef?
>
> regards,
> dan carpenter
>
When I was test-compiling the patch yesterday, sparse raised
a "should it be static?" error, and that was resolved by moving
the extern for the __cvmx_queue_state_ptr in the header to the
top of the file.
best regards,
maxwell doose
^ permalink raw reply
* Re: [PATCH] iio: adc: ingenic-adc: use guard(mutex)(&lock) to handle synchronisation
From: Andy Shevchenko @ 2026-04-17 8:01 UTC (permalink / raw)
To: Felipe Ribeiro de Souza
Cc: paul, jic23, dlechner, nuno.sa, andy, Lucas Ivars Cadima Ciziks,
linux-mips, linux-iio
In-Reply-To: <20260416011815.9140-1-felipers@ime.usp.br>
On Wed, Apr 15, 2026 at 10:18:11PM -0300, Felipe Ribeiro de Souza wrote:
> Replace mutex_lock(&lock) and mutex_unlock(&lock) calls with
> guard(mutex)(&lock) in functions ingenic_adc_set_adcmd,
> ingenic_adc_set_config, ingenic_adc_enable, ingenic_adc_capture
> and ingenic_adc_read_chan_info_raw.
We refer to the functions as func().
> This removes the need to call the unlock function, as the lock is
> automatically released when the function return or the scope exits
> for any other case.
...
> #include <linux/of.h>
> #include <linux/platform_device.h>
> #include <linux/property.h>
> +#include <linux/cleanup.h>
Preserve ordering.
...
> /* We cannot sample the aux channels in parallel. */
> - mutex_lock(&adc->aux_lock);
> + guard(mutex)(&adc->lock);
...
> ret = IIO_VAL_INT;
> out:
> - mutex_unlock(&adc->aux_lock);
> clk_disable(adc->clk);
Not sure about this. At bare minimum you should elaborate on this change in the
commit message.
> return ret;
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH] iio: adc: ingenic-adc: use guard(mutex)(&lock) to handle synchronisation
From: Rong Zhang @ 2026-04-17 5:18 UTC (permalink / raw)
To: Felipe Ribeiro de Souza, paul, jic23, dlechner, nuno.sa, andy
Cc: Rong Zhang, Lucas Ivars Cadima Ciziks, linux-mips, linux-iio
In-Reply-To: <20260416011815.9140-1-felipers@ime.usp.br>
Hi Felipe,
On Wed, 2026-04-15 at 22:18 -0300, Felipe Ribeiro de Souza wrote:
> Replace mutex_lock(&lock) and mutex_unlock(&lock) calls with
> guard(mutex)(&lock) in functions ingenic_adc_set_adcmd,
> ingenic_adc_set_config, ingenic_adc_enable, ingenic_adc_capture
> and ingenic_adc_read_chan_info_raw.
>
> This removes the need to call the unlock function, as the lock is
> automatically released when the function return or the scope exits
> for any other case.
>
> Signed-off-by: Felipe Ribeiro de Souza <felipers@ime.usp.br>
> Co-developed-by: Lucas Ivars Cadima Ciziks <lucas@ciziks.com>
> Signed-off-by: Lucas Ivars Cadima Ciziks <lucas@ciziks.com>
> ---
> drivers/iio/adc/ingenic-adc.c | 19 +++++++------------
> 1 file changed, 7 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/iio/adc/ingenic-adc.c b/drivers/iio/adc/ingenic-adc.c
> index 1e802c877..bb7abdcd8 100644
> --- a/drivers/iio/adc/ingenic-adc.c
> +++ b/drivers/iio/adc/ingenic-adc.c
> @@ -20,6 +20,7 @@
> #include <linux/of.h>
> #include <linux/platform_device.h>
> #include <linux/property.h>
> +#include <linux/cleanup.h>
Can you keep #include sorted?
Thanks,
Rong
>
> #define JZ_ADC_REG_ENABLE 0x00
> #define JZ_ADC_REG_CFG 0x04
> @@ -115,7 +116,7 @@ static void ingenic_adc_set_adcmd(struct iio_dev *iio_dev, unsigned long mask)
> {
> struct ingenic_adc *adc = iio_priv(iio_dev);
>
> - mutex_lock(&adc->lock);
> + guard(mutex)(&adc->lock);
>
> /* Init ADCMD */
> readl(adc->base + JZ_ADC_REG_ADCMD);
> @@ -162,8 +163,6 @@ static void ingenic_adc_set_adcmd(struct iio_dev *iio_dev, unsigned long mask)
>
> /* We're done */
> writel(0, adc->base + JZ_ADC_REG_ADCMD);
> -
> - mutex_unlock(&adc->lock);
> }
>
> static void ingenic_adc_set_config(struct ingenic_adc *adc,
> @@ -172,13 +171,11 @@ static void ingenic_adc_set_config(struct ingenic_adc *adc,
> {
> uint32_t cfg;
>
> - mutex_lock(&adc->lock);
> + guard(mutex)(&adc->lock);
>
> cfg = readl(adc->base + JZ_ADC_REG_CFG) & ~mask;
> cfg |= val;
> writel(cfg, adc->base + JZ_ADC_REG_CFG);
> -
> - mutex_unlock(&adc->lock);
> }
>
> static void ingenic_adc_enable_unlocked(struct ingenic_adc *adc,
> @@ -201,9 +198,8 @@ static void ingenic_adc_enable(struct ingenic_adc *adc,
> int engine,
> bool enabled)
> {
> - mutex_lock(&adc->lock);
> + guard(mutex)(&adc->lock);
> ingenic_adc_enable_unlocked(adc, engine, enabled);
> - mutex_unlock(&adc->lock);
> }
>
> static int ingenic_adc_capture(struct ingenic_adc *adc,
> @@ -218,7 +214,7 @@ static int ingenic_adc_capture(struct ingenic_adc *adc,
> * probably due to the switch of VREF. We must keep the lock here to
> * avoid races with the buffer enable/disable functions.
> */
> - mutex_lock(&adc->lock);
> + guard(mutex)(&adc->lock);
> cfg = readl(adc->base + JZ_ADC_REG_CFG);
> writel(cfg & ~JZ_ADC_REG_CFG_CMD_SEL, adc->base + JZ_ADC_REG_CFG);
>
> @@ -229,7 +225,6 @@ static int ingenic_adc_capture(struct ingenic_adc *adc,
> ingenic_adc_enable_unlocked(adc, engine, false);
>
> writel(cfg, adc->base + JZ_ADC_REG_CFG);
> - mutex_unlock(&adc->lock);
>
> return ret;
> }
> @@ -643,7 +638,8 @@ static int ingenic_adc_read_chan_info_raw(struct iio_dev *iio_dev,
> }
>
> /* We cannot sample the aux channels in parallel. */
> - mutex_lock(&adc->aux_lock);
> + guard(mutex)(&adc->lock);
> +
> if (adc->soc_data->has_aux_md && engine == 0) {
> switch (chan->channel) {
> case INGENIC_ADC_AUX0:
> @@ -677,7 +673,6 @@ static int ingenic_adc_read_chan_info_raw(struct iio_dev *iio_dev,
>
> ret = IIO_VAL_INT;
> out:
> - mutex_unlock(&adc->aux_lock);
> clk_disable(adc->clk);
>
> return ret;
^ permalink raw reply
* Re: [PATCH] mips: cavium-octeon: remove cmd queue state and related typedefs
From: Dan Carpenter @ 2026-04-17 5:25 UTC (permalink / raw)
To: Maxwell Doose; +Cc: tsbogend, gregkh, linux-mips, linux-kernel, linux-staging
In-Reply-To: <20260417023602.112359-1-m32285159@gmail.com>
On Thu, Apr 16, 2026 at 09:36:02PM -0500, Maxwell Doose wrote:
> This change removes the cmd queue state typedefs to work towards the
> "code cleanup" task in the staging's TODO, and aligns the codebase further with the
> Linux Kernel Code Style.
>
> The following structs are affected:
>
> - __cvmx_cmd_queue_state_t (now struct __cvmx_cmd_queue_state)
> - __cvmx_cmd_queue_all_state_t (now struct __cvmx_cmd_queue_all_state)
>
> In addition, the global exported pointer __cvmx_cmd_queue_state_ptr has
> also been updated to use the new names, and its extern statement in
> cvmx-cmd-queue.h has been moved to the top of the file to satisfy the
> requirements for EXPORT_SYMBOL_GPL.
>
This should be two different patches. Is there no way to move the
variable declarations around first and then get rid of the typedef?
regards,
dan carpenter
^ permalink raw reply
* [PATCH] mips: cavium-octeon: remove cmd queue state and related typedefs
From: Maxwell Doose @ 2026-04-17 2:36 UTC (permalink / raw)
To: tsbogend; +Cc: gregkh, linux-mips, linux-kernel, linux-staging
This change removes the cmd queue state typedefs to work towards the
"code cleanup" task in the staging's TODO, and aligns the codebase further with the
Linux Kernel Code Style.
The following structs are affected:
- __cvmx_cmd_queue_state_t (now struct __cvmx_cmd_queue_state)
- __cvmx_cmd_queue_all_state_t (now struct __cvmx_cmd_queue_all_state)
In addition, the global exported pointer __cvmx_cmd_queue_state_ptr has
also been updated to use the new names, and its extern statement in
cvmx-cmd-queue.h has been moved to the top of the file to satisfy the
requirements for EXPORT_SYMBOL_GPL.
Signed-off-by: Maxwell Doose <m32285159@gmail.com>
---
note: This patch is a part of a continued effort to remove abiguous
typedefs across the cavium-octeon/octeon codebase.
.../cavium-octeon/executive/cvmx-cmd-queue.c | 8 ++---
arch/mips/include/asm/octeon/cvmx-cmd-queue.h | 32 +++++++++++--------
2 files changed, 22 insertions(+), 18 deletions(-)
diff --git a/arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c b/arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c
index 042a6bc44b5c..4cf4060df48c 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c
@@ -46,7 +46,7 @@
* This application uses this pointer to access the global queue
* state. It points to a bootmem named block.
*/
-__cvmx_cmd_queue_all_state_t *__cvmx_cmd_queue_state_ptr;
+struct __cvmx_cmd_queue_all_state *__cvmx_cmd_queue_state_ptr;
EXPORT_SYMBOL_GPL(__cvmx_cmd_queue_state_ptr);
/*
@@ -109,7 +109,7 @@ cvmx_cmd_queue_result_t cvmx_cmd_queue_initialize(cvmx_cmd_queue_id_t queue_id,
int max_depth, int fpa_pool,
int pool_size)
{
- __cvmx_cmd_queue_state_t *qstate;
+ struct __cvmx_cmd_queue_state *qstate;
cvmx_cmd_queue_result_t result = __cvmx_cmd_queue_init_state_ptr();
if (result != CVMX_CMD_QUEUE_SUCCESS)
return result;
@@ -202,7 +202,7 @@ cvmx_cmd_queue_result_t cvmx_cmd_queue_initialize(cvmx_cmd_queue_id_t queue_id,
*/
cvmx_cmd_queue_result_t cvmx_cmd_queue_shutdown(cvmx_cmd_queue_id_t queue_id)
{
- __cvmx_cmd_queue_state_t *qptr = __cvmx_cmd_queue_get_state(queue_id);
+ struct __cvmx_cmd_queue_state *qptr = __cvmx_cmd_queue_get_state(queue_id);
if (qptr == NULL) {
cvmx_dprintf("ERROR: cvmx_cmd_queue_shutdown: Unable to "
"get queue information.\n");
@@ -295,7 +295,7 @@ int cvmx_cmd_queue_length(cvmx_cmd_queue_id_t queue_id)
*/
void *cvmx_cmd_queue_buffer(cvmx_cmd_queue_id_t queue_id)
{
- __cvmx_cmd_queue_state_t *qptr = __cvmx_cmd_queue_get_state(queue_id);
+ struct __cvmx_cmd_queue_state *qptr = __cvmx_cmd_queue_get_state(queue_id);
if (qptr && qptr->base_ptr_div128)
return cvmx_phys_to_ptr((uint64_t) qptr->base_ptr_div128 << 7);
else
diff --git a/arch/mips/include/asm/octeon/cvmx-cmd-queue.h b/arch/mips/include/asm/octeon/cvmx-cmd-queue.h
index 67e1b2162b19..faef98173a4f 100644
--- a/arch/mips/include/asm/octeon/cvmx-cmd-queue.h
+++ b/arch/mips/include/asm/octeon/cvmx-cmd-queue.h
@@ -71,6 +71,12 @@
*
*/
+/* Global pointer to the state of command the queues
+ * Moved here to satisfy requirements in cvmx-cmd-queue.c for EXPORT_SYMBOL_GPL
+ */
+extern struct __cvmx_cmd_queue_all_state
+ *__cvmx_cmd_queue_state_ptr;
+
#ifndef __CVMX_CMD_QUEUE_H__
#define __CVMX_CMD_QUEUE_H__
@@ -125,7 +131,7 @@ typedef enum {
CVMX_CMD_QUEUE_ALREADY_SETUP = -4,
} cvmx_cmd_queue_result_t;
-typedef struct {
+struct __cvmx_cmd_queue_state {
/* You have lock when this is your ticket */
uint8_t now_serving;
uint64_t unused1:24;
@@ -140,7 +146,7 @@ typedef struct {
uint64_t pool_size_m1:13;
/* Number of commands already used in buffer */
uint64_t index:13;
-} __cvmx_cmd_queue_state_t;
+};
/**
* This structure contains the global state of all command queues.
@@ -150,10 +156,10 @@ typedef struct {
* ll/sc used to get a ticket. If this is not the case, the update
* of queue state causes the ll/sc to fail quite often.
*/
-typedef struct {
+struct __cvmx_cmd_queue_all_state {
uint64_t ticket[(CVMX_CMD_QUEUE_END >> 16) * 256];
- __cvmx_cmd_queue_state_t state[(CVMX_CMD_QUEUE_END >> 16) * 256];
-} __cvmx_cmd_queue_all_state_t;
+ struct __cvmx_cmd_queue_state state[(CVMX_CMD_QUEUE_END >> 16) * 256];
+};
/**
* Initialize a command queue for use. The initial FPA buffer is
@@ -234,10 +240,8 @@ static inline int __cvmx_cmd_queue_get_index(cvmx_cmd_queue_id_t queue_id)
* @qptr: Pointer to the queue's global state
*/
static inline void __cvmx_cmd_queue_lock(cvmx_cmd_queue_id_t queue_id,
- __cvmx_cmd_queue_state_t *qptr)
+ struct __cvmx_cmd_queue_state *qptr)
{
- extern __cvmx_cmd_queue_all_state_t
- *__cvmx_cmd_queue_state_ptr;
int tmp;
int my_ticket;
prefetch(qptr);
@@ -286,7 +290,7 @@ static inline void __cvmx_cmd_queue_lock(cvmx_cmd_queue_id_t queue_id,
*
* @qptr: Queue to unlock
*/
-static inline void __cvmx_cmd_queue_unlock(__cvmx_cmd_queue_state_t *qptr)
+static inline void __cvmx_cmd_queue_unlock(struct __cvmx_cmd_queue_state *qptr)
{
qptr->now_serving++;
CVMX_SYNCWS;
@@ -299,10 +303,10 @@ static inline void __cvmx_cmd_queue_unlock(__cvmx_cmd_queue_state_t *qptr)
*
* Returns Queue structure or NULL on failure
*/
-static inline __cvmx_cmd_queue_state_t
+static inline struct __cvmx_cmd_queue_state
*__cvmx_cmd_queue_get_state(cvmx_cmd_queue_id_t queue_id)
{
- extern __cvmx_cmd_queue_all_state_t
+ extern struct __cvmx_cmd_queue_all_state
*__cvmx_cmd_queue_state_ptr;
return &__cvmx_cmd_queue_state_ptr->
state[__cvmx_cmd_queue_get_index(queue_id)];
@@ -329,7 +333,7 @@ static inline cvmx_cmd_queue_result_t cvmx_cmd_queue_write(cvmx_cmd_queue_id_t
int cmd_count,
uint64_t *cmds)
{
- __cvmx_cmd_queue_state_t *qptr = __cvmx_cmd_queue_get_state(queue_id);
+ struct __cvmx_cmd_queue_state *qptr = __cvmx_cmd_queue_get_state(queue_id);
/* Make sure nobody else is updating the same queue */
if (likely(use_locking))
@@ -427,7 +431,7 @@ static inline cvmx_cmd_queue_result_t cvmx_cmd_queue_write2(cvmx_cmd_queue_id_t
uint64_t cmd1,
uint64_t cmd2)
{
- __cvmx_cmd_queue_state_t *qptr = __cvmx_cmd_queue_get_state(queue_id);
+ struct __cvmx_cmd_queue_state *qptr = __cvmx_cmd_queue_get_state(queue_id);
/* Make sure nobody else is updating the same queue */
if (likely(use_locking))
@@ -528,7 +532,7 @@ static inline cvmx_cmd_queue_result_t cvmx_cmd_queue_write3(cvmx_cmd_queue_id_t
uint64_t cmd2,
uint64_t cmd3)
{
- __cvmx_cmd_queue_state_t *qptr = __cvmx_cmd_queue_get_state(queue_id);
+ struct __cvmx_cmd_queue_state *qptr = __cvmx_cmd_queue_get_state(queue_id);
/* Make sure nobody else is updating the same queue */
if (likely(use_locking))
--
2.53.0
^ permalink raw reply related
* Re: [PATCH v5 6/7] locking: Factor out __queued_read_unlock()/__queued_write_unlock()
From: Paul E. McKenney @ 2026-04-16 23:55 UTC (permalink / raw)
To: Dmitry Ilvokhin
Cc: Peter Zijlstra, Ingo Molnar, Will Deacon, Boqun Feng, Waiman Long,
Thomas Bogendoerfer, Juergen Gross, Ajay Kaher, Alexey Makhalov,
Broadcom internal kernel review list, Thomas Gleixner,
Borislav Petkov, Dave Hansen, x86, H. Peter Anvin, Arnd Bergmann,
Dennis Zhou, Tejun Heo, Christoph Lameter, Steven Rostedt,
Masami Hiramatsu, Mathieu Desnoyers, linux-kernel, linux-mips,
virtualization, linux-arch, linux-mm, linux-trace-kernel,
kernel-team
In-Reply-To: <eabc9de3347ca042eb0593c9b81c8e48254a4874.1776350944.git.d@ilvokhin.com>
On Thu, Apr 16, 2026 at 03:05:12PM +0000, Dmitry Ilvokhin wrote:
> This is a preparatory refactoring for the next commit, which adds
> contended_release tracepoint instrumentation and needs to call the
> unlock from both traced and non-traced paths.
>
> No functional change.
>
> Signed-off-by: Dmitry Ilvokhin <d@ilvokhin.com>
Acked-by: Paul E. McKenney <paulmck@kernel.org>
> ---
> include/asm-generic/qrwlock.h | 20 +++++++++++++++-----
> 1 file changed, 15 insertions(+), 5 deletions(-)
>
> diff --git a/include/asm-generic/qrwlock.h b/include/asm-generic/qrwlock.h
> index 75b8f4601b28..4b627bafba8b 100644
> --- a/include/asm-generic/qrwlock.h
> +++ b/include/asm-generic/qrwlock.h
> @@ -101,16 +101,26 @@ static inline void queued_write_lock(struct qrwlock *lock)
> queued_write_lock_slowpath(lock);
> }
>
> +static __always_inline void __queued_read_unlock(struct qrwlock *lock)
> +{
> + /*
> + * Atomically decrement the reader count
> + */
> + (void)atomic_sub_return_release(_QR_BIAS, &lock->cnts);
> +}
> +
> /**
> * queued_read_unlock - release read lock of a queued rwlock
> * @lock : Pointer to queued rwlock structure
> */
> static inline void queued_read_unlock(struct qrwlock *lock)
> {
> - /*
> - * Atomically decrement the reader count
> - */
> - (void)atomic_sub_return_release(_QR_BIAS, &lock->cnts);
> + __queued_read_unlock(lock);
> +}
> +
> +static __always_inline void __queued_write_unlock(struct qrwlock *lock)
> +{
> + smp_store_release(&lock->wlocked, 0);
> }
>
> /**
> @@ -119,7 +129,7 @@ static inline void queued_read_unlock(struct qrwlock *lock)
> */
> static inline void queued_write_unlock(struct qrwlock *lock)
> {
> - smp_store_release(&lock->wlocked, 0);
> + __queued_write_unlock(lock);
> }
>
> /**
> --
> 2.52.0
>
^ permalink raw reply
* Re: [PATCH v5 5/7] locking: Add contended_release tracepoint to qspinlock
From: Paul E. McKenney @ 2026-04-16 23:54 UTC (permalink / raw)
To: Dmitry Ilvokhin
Cc: Peter Zijlstra, Ingo Molnar, Will Deacon, Boqun Feng, Waiman Long,
Thomas Bogendoerfer, Juergen Gross, Ajay Kaher, Alexey Makhalov,
Broadcom internal kernel review list, Thomas Gleixner,
Borislav Petkov, Dave Hansen, x86, H. Peter Anvin, Arnd Bergmann,
Dennis Zhou, Tejun Heo, Christoph Lameter, Steven Rostedt,
Masami Hiramatsu, Mathieu Desnoyers, linux-kernel, linux-mips,
virtualization, linux-arch, linux-mm, linux-trace-kernel,
kernel-team
In-Reply-To: <af285ffefa3fa2f73b73a39e9f06fb176009e047.1776350944.git.d@ilvokhin.com>
On Thu, Apr 16, 2026 at 03:05:11PM +0000, Dmitry Ilvokhin wrote:
> Use the arch-overridable queued_spin_release(), introduced in the
> previous commit, to ensure the tracepoint works correctly across all
> architectures, including those with custom unlock implementations (e.g.
> x86 paravirt).
>
> When the tracepoint is disabled, the only addition to the hot path is a
> single NOP instruction (the static branch). When enabled, the contention
> check, trace call, and unlock are combined in an out-of-line function to
> minimize hot path impact, avoiding the compiler needing to preserve the
> lock pointer in a callee-saved register across the trace call.
>
> Binary size impact (x86_64, defconfig):
> uninlined unlock (common case): +680 bytes (+0.00%)
> inlined unlock (worst case): +83659 bytes (+0.21%)
>
> The inlined unlock case could not be achieved through Kconfig options on
> x86_64 as PREEMPT_BUILD unconditionally selects UNINLINE_SPIN_UNLOCK on
> x86_64. The UNINLINE_SPIN_UNLOCK guards were manually inverted to force
> inline the unlock path and estimate the worst case binary size increase.
>
> In practice, configurations with UNINLINE_SPIN_UNLOCK=n have already
> opted against binary size optimization, so the inlined worst case is
> unlikely to be a concern.
>
> Architectures with fully custom qspinlock implementations (e.g.
> PowerPC) are not covered by this change.
>
> Signed-off-by: Dmitry Ilvokhin <d@ilvokhin.com>
Much nicer split out!
Acked-by: Paul E. McKenney <paulmck@kernel.org>
> ---
> include/asm-generic/qspinlock.h | 18 ++++++++++++++++++
> kernel/locking/qspinlock.c | 8 ++++++++
> 2 files changed, 26 insertions(+)
>
> diff --git a/include/asm-generic/qspinlock.h b/include/asm-generic/qspinlock.h
> index df76f34645a0..915a4c2777f6 100644
> --- a/include/asm-generic/qspinlock.h
> +++ b/include/asm-generic/qspinlock.h
> @@ -41,6 +41,7 @@
>
> #include <asm-generic/qspinlock_types.h>
> #include <linux/atomic.h>
> +#include <linux/tracepoint-defs.h>
>
> #ifndef queued_spin_is_locked
> /**
> @@ -129,12 +130,29 @@ static __always_inline void queued_spin_release(struct qspinlock *lock)
> }
> #endif
>
> +DECLARE_TRACEPOINT(contended_release);
> +
> +extern void queued_spin_release_traced(struct qspinlock *lock);
> +
> /**
> * queued_spin_unlock - unlock a queued spinlock
> * @lock : Pointer to queued spinlock structure
> + *
> + * Generic tracing wrapper around the arch-overridable
> + * queued_spin_release().
> */
> static __always_inline void queued_spin_unlock(struct qspinlock *lock)
> {
> + /*
> + * Trace and release are combined in queued_spin_release_traced() so
> + * the compiler does not need to preserve the lock pointer across the
> + * function call, avoiding callee-saved register save/restore on the
> + * hot path.
> + */
> + if (tracepoint_enabled(contended_release)) {
> + queued_spin_release_traced(lock);
> + return;
> + }
> queued_spin_release(lock);
> }
>
> diff --git a/kernel/locking/qspinlock.c b/kernel/locking/qspinlock.c
> index af8d122bb649..c72610980ec7 100644
> --- a/kernel/locking/qspinlock.c
> +++ b/kernel/locking/qspinlock.c
> @@ -104,6 +104,14 @@ static __always_inline u32 __pv_wait_head_or_lock(struct qspinlock *lock,
> #define queued_spin_lock_slowpath native_queued_spin_lock_slowpath
> #endif
>
> +void __lockfunc queued_spin_release_traced(struct qspinlock *lock)
> +{
> + if (queued_spin_is_contended(lock))
> + trace_contended_release(lock);
> + queued_spin_release(lock);
> +}
> +EXPORT_SYMBOL(queued_spin_release_traced);
> +
> #endif /* _GEN_PV_LOCK_SLOWPATH */
>
> /**
> --
> 2.52.0
>
^ permalink raw reply
* [PATCH 2/2] clocksource/timer-econet-en751221: Support irq number per timer
From: Caleb James DeLisle @ 2026-04-16 17:51 UTC (permalink / raw)
To: linux-mips
Cc: naseefkm, daniel.lezcano, tglx, robh, krzk+dt, conor+dt,
linux-kernel, devicetree, Caleb James DeLisle
In-Reply-To: <20260416175101.958073-1-cjd@cjdns.fr>
This timer was first developed on the EN751221 which is a MIPS 34Kc
and therefore has a custom interrupt controller. The hardware for
econet,en751221-intc implements percpu routing of the timer
interrupts.
However, the EN751627 and EN7528 are MIPS 1004Kc based, and
therefore use the standard mti,gic compatible interrupt controller.
This interrupt controller uses a different IRQ number for each
timer interrupt.
Add support for both models in this timer driver.
Co-developed-by: Ahmed Naseef <naseefkm@gmail.com>
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/commit/fab098cb6121647ca9cc6e501d56ebe8a9ea550b#diff-a09ee5e4166e89df337d03c1455dce7b81eb89797b1d0f714476b188e6685334
[cjd@cjdns.fr minor changes:
Set ECONET_MAX_IRQS to NR_CPUS rather than 4
Use is_percpu_irq() instead of field
Do not set CLOCK_EVT_FEAT_PERCPU in non-percpu mode
Fold cevt_init() into timer_init()
]
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
---
drivers/clocksource/Kconfig | 5 +-
drivers/clocksource/timer-econet-en751221.c | 137 ++++++++++++++++----
2 files changed, 114 insertions(+), 28 deletions(-)
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index d1a33a231a44..9a77f38d5fb7 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -79,7 +79,10 @@ config ECONET_EN751221_TIMER
select CLKSRC_MMIO
select TIMER_OF
help
- Support for CPU timer found on EcoNet MIPS based SoCs.
+ Support for CPU timer found on EcoNet EN75xx MIPS based SoCs
+ (EN751221, EN751627, EN7528). The driver supports both GIC-based
+ (separate IRQ per CPU) and legacy interrupt controller (percpu IRQ)
+ modes.
config FTTMR010_TIMER
bool "Faraday Technology timer driver" if COMPILE_TEST
diff --git a/drivers/clocksource/timer-econet-en751221.c b/drivers/clocksource/timer-econet-en751221.c
index 4008076b1a21..e280ee8c2b1c 100644
--- a/drivers/clocksource/timer-econet-en751221.c
+++ b/drivers/clocksource/timer-econet-en751221.c
@@ -3,11 +3,13 @@
* Timer present on EcoNet EN75xx MIPS based SoCs.
*
* Copyright (C) 2025 by Caleb James DeLisle <cjd@cjdns.fr>
+ * Copyright (C) 2025 by Ahmed Naseef <naseefkm@gmail.com>
*/
#include <linux/io.h>
#include <linux/cpumask.h>
#include <linux/interrupt.h>
+#include <linux/irq.h>
#include <linux/clockchips.h>
#include <linux/sched_clock.h>
#include <linux/of.h>
@@ -21,14 +23,26 @@
#define ECONET_MAX_DELTA GENMASK(ECONET_BITS - 2, 0)
/* 34Kc hardware has 1 block and 1004Kc has 2. */
#define ECONET_NUM_BLOCKS DIV_ROUND_UP(NR_CPUS, 2)
+#define ECONET_MAX_IRQS NR_CPUS
static struct {
void __iomem *membase[ECONET_NUM_BLOCKS];
u32 freq_hz;
+ int irqs[ECONET_MAX_IRQS];
+ int num_irqs;
} econet_timer __ro_after_init;
static DEFINE_PER_CPU(struct clock_event_device, econet_timer_pcpu);
+/* This timer supports two interrupt controller models, either 1 IRQ which is in per-cpu
+ * mode which is used on 34Kc CPUs, and separate IRQ number per CPU which is used on
+ * 1004Kc CPUs with GIC intc.
+ */
+static inline bool is_percpu_irq(void)
+{
+ return econet_timer.num_irqs == 1;
+}
+
/* Each memory block has 2 timers, the order of registers is:
* CTL, CMR0, CNT0, CMR1, CNT1
*/
@@ -98,12 +112,21 @@ static int cevt_init_cpu(uint cpu)
struct clock_event_device *cd = &per_cpu(econet_timer_pcpu, cpu);
u32 reg;
+ if (!is_percpu_irq() && cpu >= econet_timer.num_irqs)
+ return -EINVAL;
+
pr_debug("%s: Setting up clockevent for CPU %d\n", cd->name, cpu);
reg = ioread32(reg_ctl(cpu)) | ctl_bit_enabled(cpu);
iowrite32(reg, reg_ctl(cpu));
- enable_percpu_irq(cd->irq, IRQ_TYPE_NONE);
+ if (is_percpu_irq()) {
+ enable_percpu_irq(cd->irq, IRQ_TYPE_NONE);
+ } else {
+ if (irq_force_affinity(econet_timer.irqs[cpu], cpumask_of(cpu)))
+ pr_warn("%s: failed to set IRQ %d affinity to CPU %d\n",
+ cd->name, econet_timer.irqs[cpu], cpu);
+ }
/* Do this last because it synchronously configures the timer */
clockevents_config_and_register(cd, econet_timer.freq_hz,
@@ -126,7 +149,20 @@ static void __init cevt_dev_init(uint cpu)
iowrite32(U32_MAX, reg_compare(cpu));
}
-static int __init cevt_init(struct device_node *np)
+static void __init cevt_setup_clockevent(struct clock_event_device *cd,
+ struct device_node *np,
+ int irq, int cpu)
+{
+ cd->rating = 310;
+ cd->features = CLOCK_EVT_FEAT_ONESHOT |
+ CLOCK_EVT_FEAT_C3STOP;
+ cd->set_next_event = cevt_set_next_event;
+ cd->irq = irq;
+ cd->cpumask = cpumask_of(cpu);
+ cd->name = np->name;
+}
+
+static int __init cevt_init_percpu(struct device_node *np)
{
int i, irq, ret;
@@ -137,42 +173,65 @@ static int __init cevt_init(struct device_node *np)
}
ret = request_percpu_irq(irq, cevt_interrupt, np->name, &econet_timer_pcpu);
-
if (ret < 0) {
pr_err("%pOFn: IRQ %d setup failed (%d)\n", np, irq, ret);
- goto err_unmap_irq;
+ irq_dispose_mapping(irq);
+ return ret;
}
for_each_possible_cpu(i) {
struct clock_event_device *cd = &per_cpu(econet_timer_pcpu, i);
- cd->rating = 310;
- cd->features = CLOCK_EVT_FEAT_ONESHOT |
- CLOCK_EVT_FEAT_C3STOP |
- CLOCK_EVT_FEAT_PERCPU;
- cd->set_next_event = cevt_set_next_event;
- cd->irq = irq;
- cd->cpumask = cpumask_of(i);
- cd->name = np->name;
+ cevt_setup_clockevent(cd, np, irq, i);
+ cd->features |= CLOCK_EVT_FEAT_PERCPU;
+ cevt_dev_init(i);
+ }
+
+ return 0;
+}
+static int __init cevt_init_separate(struct device_node *np)
+{
+ int i, ret;
+
+ for (i = 0; i < econet_timer.num_irqs; i++) {
+ struct clock_event_device *cd = &per_cpu(econet_timer_pcpu, i);
+
+ econet_timer.irqs[i] = irq_of_parse_and_map(np, i);
+ if (econet_timer.irqs[i] <= 0) {
+ pr_err("%pOFn: irq_of_parse_and_map failed", np);
+ ret = -EINVAL;
+ goto err_free_irqs;
+ }
+
+ ret = request_irq(econet_timer.irqs[i], cevt_interrupt,
+ IRQF_TIMER | IRQF_NOBALANCING,
+ np->name, NULL);
+ if (ret < 0) {
+ pr_err("%pOFn: IRQ %d setup failed (%d)\n", np,
+ econet_timer.irqs[i], ret);
+ irq_dispose_mapping(econet_timer.irqs[i]);
+ goto err_free_irqs;
+ }
+
+ cevt_setup_clockevent(cd, np, econet_timer.irqs[i], i);
cevt_dev_init(i);
}
- cpuhp_setup_state(CPUHP_AP_ONLINE_DYN,
- "clockevents/econet/timer:starting",
- cevt_init_cpu, NULL);
return 0;
-err_unmap_irq:
- irq_dispose_mapping(irq);
+err_free_irqs:
+ while (--i >= 0) {
+ free_irq(econet_timer.irqs[i], NULL);
+ irq_dispose_mapping(econet_timer.irqs[i]);
+ }
return ret;
}
static int __init timer_init(struct device_node *np)
{
- int num_blocks = DIV_ROUND_UP(num_possible_cpus(), 2);
struct clk *clk;
- int ret;
+ int ret, i;
clk = of_clk_get(np, 0);
if (IS_ERR(clk)) {
@@ -182,11 +241,18 @@ static int __init timer_init(struct device_node *np)
econet_timer.freq_hz = clk_get_rate(clk);
- for (int i = 0; i < num_blocks; i++) {
+ econet_timer.num_irqs = of_irq_count(np);
+ if (econet_timer.num_irqs <= 0 || econet_timer.num_irqs > ECONET_MAX_IRQS) {
+ pr_err("%pOFn: invalid IRQ count %d\n", np, econet_timer.num_irqs);
+ return -EINVAL;
+ }
+
+ for (i = 0; i < ECONET_NUM_BLOCKS; i++) {
econet_timer.membase[i] = of_iomap(np, i);
if (!econet_timer.membase[i]) {
pr_err("%pOFn: failed to map register [%d]\n", np, i);
- return -ENXIO;
+ ret = -ENXIO;
+ goto err_unmap;
}
}
@@ -196,21 +262,38 @@ static int __init timer_init(struct device_node *np)
clocksource_mmio_readl_up);
if (ret) {
pr_err("%pOFn: clocksource_mmio_init failed: %d", np, ret);
- return ret;
+ goto err_unmap;
}
- ret = cevt_init(np);
+ if (is_percpu_irq())
+ ret = cevt_init_percpu(np);
+ else
+ ret = cevt_init_separate(np);
+
if (ret < 0)
- return ret;
+ goto err_unmap;
+
+ cpuhp_setup_state(CPUHP_AP_ONLINE_DYN,
+ "clockevents/econet/timer:starting",
+ cevt_init_cpu, NULL);
sched_clock_register(sched_clock_read, ECONET_BITS,
econet_timer.freq_hz);
- pr_info("%pOFn: using %u.%03u MHz high precision timer\n", np,
+ pr_info("%pOFn: using %u.%03u MHz high precision timer (%s mode)\n", np,
econet_timer.freq_hz / 1000000,
- (econet_timer.freq_hz / 1000) % 1000);
+ (econet_timer.freq_hz / 1000) % 1000,
+ is_percpu_irq() ? "percpu" : "separate IRQ");
return 0;
+
+err_unmap:
+ for (i = 0; i < ECONET_NUM_BLOCKS; i++) {
+ if (econet_timer.membase[i])
+ iounmap(econet_timer.membase[i]);
+ }
+
+ return ret;
}
-TIMER_OF_DECLARE(econet_timer_hpt, "econet,en751221-timer", timer_init);
+TIMER_OF_DECLARE(econet_en751221_timer, "econet,en751221-timer", timer_init);
--
2.39.5
^ permalink raw reply related
* [PATCH 1/2] dt-bindings: timer: econet: Update EN751627 for multi-IRQ
From: Caleb James DeLisle @ 2026-04-16 17:51 UTC (permalink / raw)
To: linux-mips
Cc: naseefkm, daniel.lezcano, tglx, robh, krzk+dt, conor+dt,
linux-kernel, devicetree, Caleb James DeLisle
In-Reply-To: <20260416175101.958073-1-cjd@cjdns.fr>
From conception, this driver supported EN751627 as it is the same
hardware that is used in EN751221. However, it was expected that
EN751627 would use a percpu IRQ as does EN751221, this is how it
works in vendor code. However upon finding that the "mti,gic" intc
works on EN751627 with no modification - but it provides a unique
interrupt per-timer, it is deemed best to make this driver use
multiple IRQs when on the EN751627 platform.
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
---
.../bindings/timer/econet,en751221-timer.yaml | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml b/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml
index c1e7c2b6afde..f338739e039c 100644
--- a/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml
+++ b/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml
@@ -28,8 +28,8 @@ properties:
maxItems: 2
interrupts:
- maxItems: 1
- description: A percpu-devid timer interrupt shared across CPUs.
+ minItems: 1
+ maxItems: 4
clocks:
maxItems: 1
@@ -52,21 +52,31 @@ allOf:
items:
- description: VPE timers 0 and 1
- description: VPE timers 2 and 3
+ interrupts:
+ description: An interrupt for each timer (one per VPE)
+ minItems: 4
else:
properties:
reg:
items:
- description: VPE timers 0 and 1
+ interrupts:
+ description: A percpu-devid timer interrupt shared across timers
+ maxItems: 1
additionalProperties: false
examples:
- |
+ #include <dt-bindings/interrupt-controller/mips-gic.h>
timer@1fbf0400 {
compatible = "econet,en751627-timer", "econet,en751221-timer";
reg = <0x1fbf0400 0x100>, <0x1fbe0000 0x100>;
interrupt-parent = <&intc>;
- interrupts = <30>;
+ interrupts = <GIC_SHARED 30 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SHARED 29 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SHARED 37 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SHARED 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&hpt_clock>;
};
- |
--
2.39.5
^ permalink raw reply related
* [PATCH 0/2] clocksource/timer-econet-en751221: Support irq number per timer
From: Caleb James DeLisle @ 2026-04-16 17:50 UTC (permalink / raw)
To: linux-mips
Cc: naseefkm, daniel.lezcano, tglx, robh, krzk+dt, conor+dt,
linux-kernel, devicetree, Caleb James DeLisle
In prep for adding EN751627 and EN7528 SoCs, we need to support the GIC
interrupt controller. Unlike the intc in the EN751221, this intc does
not create a percpu interrupt for the timers, so we update the timer
driver to support both models.
Caleb James DeLisle (2):
dt-bindings: timer: econet: Update EN751627 for multi-IRQ
clocksource/timer-econet-en751221: Support irq number per timer
.../bindings/timer/econet,en751221-timer.yaml | 16 +-
drivers/clocksource/Kconfig | 5 +-
drivers/clocksource/timer-econet-en751221.c | 137 ++++++++++++++----
3 files changed, 127 insertions(+), 31 deletions(-)
base-commit: ff1c0c5d07028a84837950b619d30da623f8ddb2
--
2.39.5
^ permalink raw reply
* [PATCH v5 7/7] locking: Add contended_release tracepoint to qrwlock
From: Dmitry Ilvokhin @ 2026-04-16 15:05 UTC (permalink / raw)
To: Peter Zijlstra, Ingo Molnar, Will Deacon, Boqun Feng, Waiman Long,
Thomas Bogendoerfer, Juergen Gross, Ajay Kaher, Alexey Makhalov,
Broadcom internal kernel review list, Thomas Gleixner,
Borislav Petkov, Dave Hansen, x86, H. Peter Anvin, Arnd Bergmann,
Dennis Zhou, Tejun Heo, Christoph Lameter, Steven Rostedt,
Masami Hiramatsu, Mathieu Desnoyers
Cc: linux-kernel, linux-mips, virtualization, linux-arch, linux-mm,
linux-trace-kernel, kernel-team, Paul E. McKenney,
Dmitry Ilvokhin
In-Reply-To: <cover.1776350944.git.d@ilvokhin.com>
Extend the contended_release tracepoint to queued rwlocks, using the
same out-of-line traced unlock approach as queued spinlocks.
Signed-off-by: Dmitry Ilvokhin <d@ilvokhin.com>
---
include/asm-generic/qrwlock.h | 22 ++++++++++++++++++++++
kernel/locking/qrwlock.c | 16 ++++++++++++++++
2 files changed, 38 insertions(+)
diff --git a/include/asm-generic/qrwlock.h b/include/asm-generic/qrwlock.h
index 4b627bafba8b..274c19006125 100644
--- a/include/asm-generic/qrwlock.h
+++ b/include/asm-generic/qrwlock.h
@@ -14,6 +14,7 @@
#define __ASM_GENERIC_QRWLOCK_H
#include <linux/atomic.h>
+#include <linux/tracepoint-defs.h>
#include <asm/barrier.h>
#include <asm/processor.h>
@@ -35,6 +36,10 @@
*/
extern void queued_read_lock_slowpath(struct qrwlock *lock);
extern void queued_write_lock_slowpath(struct qrwlock *lock);
+extern void queued_read_unlock_traced(struct qrwlock *lock);
+extern void queued_write_unlock_traced(struct qrwlock *lock);
+
+DECLARE_TRACEPOINT(contended_release);
/**
* queued_read_trylock - try to acquire read lock of a queued rwlock
@@ -115,6 +120,17 @@ static __always_inline void __queued_read_unlock(struct qrwlock *lock)
*/
static inline void queued_read_unlock(struct qrwlock *lock)
{
+ /*
+ * Trace and unlock are combined in the traced unlock variant so
+ * the compiler does not need to preserve the lock pointer across
+ * the function call, avoiding callee-saved register save/restore
+ * on the hot path.
+ */
+ if (tracepoint_enabled(contended_release)) {
+ queued_read_unlock_traced(lock);
+ return;
+ }
+
__queued_read_unlock(lock);
}
@@ -129,6 +145,12 @@ static __always_inline void __queued_write_unlock(struct qrwlock *lock)
*/
static inline void queued_write_unlock(struct qrwlock *lock)
{
+ /* See comment in queued_read_unlock(). */
+ if (tracepoint_enabled(contended_release)) {
+ queued_write_unlock_traced(lock);
+ return;
+ }
+
__queued_write_unlock(lock);
}
diff --git a/kernel/locking/qrwlock.c b/kernel/locking/qrwlock.c
index d2ef312a8611..5f7a0fc2b27a 100644
--- a/kernel/locking/qrwlock.c
+++ b/kernel/locking/qrwlock.c
@@ -90,3 +90,19 @@ void __lockfunc queued_write_lock_slowpath(struct qrwlock *lock)
trace_contention_end(lock, 0);
}
EXPORT_SYMBOL(queued_write_lock_slowpath);
+
+void __lockfunc queued_read_unlock_traced(struct qrwlock *lock)
+{
+ if (queued_rwlock_is_contended(lock))
+ trace_contended_release(lock);
+ __queued_read_unlock(lock);
+}
+EXPORT_SYMBOL(queued_read_unlock_traced);
+
+void __lockfunc queued_write_unlock_traced(struct qrwlock *lock)
+{
+ if (queued_rwlock_is_contended(lock))
+ trace_contended_release(lock);
+ __queued_write_unlock(lock);
+}
+EXPORT_SYMBOL(queued_write_unlock_traced);
--
2.52.0
^ permalink raw reply related
* [PATCH v5 5/7] locking: Add contended_release tracepoint to qspinlock
From: Dmitry Ilvokhin @ 2026-04-16 15:05 UTC (permalink / raw)
To: Peter Zijlstra, Ingo Molnar, Will Deacon, Boqun Feng, Waiman Long,
Thomas Bogendoerfer, Juergen Gross, Ajay Kaher, Alexey Makhalov,
Broadcom internal kernel review list, Thomas Gleixner,
Borislav Petkov, Dave Hansen, x86, H. Peter Anvin, Arnd Bergmann,
Dennis Zhou, Tejun Heo, Christoph Lameter, Steven Rostedt,
Masami Hiramatsu, Mathieu Desnoyers
Cc: linux-kernel, linux-mips, virtualization, linux-arch, linux-mm,
linux-trace-kernel, kernel-team, Paul E. McKenney,
Dmitry Ilvokhin
In-Reply-To: <cover.1776350944.git.d@ilvokhin.com>
Use the arch-overridable queued_spin_release(), introduced in the
previous commit, to ensure the tracepoint works correctly across all
architectures, including those with custom unlock implementations (e.g.
x86 paravirt).
When the tracepoint is disabled, the only addition to the hot path is a
single NOP instruction (the static branch). When enabled, the contention
check, trace call, and unlock are combined in an out-of-line function to
minimize hot path impact, avoiding the compiler needing to preserve the
lock pointer in a callee-saved register across the trace call.
Binary size impact (x86_64, defconfig):
uninlined unlock (common case): +680 bytes (+0.00%)
inlined unlock (worst case): +83659 bytes (+0.21%)
The inlined unlock case could not be achieved through Kconfig options on
x86_64 as PREEMPT_BUILD unconditionally selects UNINLINE_SPIN_UNLOCK on
x86_64. The UNINLINE_SPIN_UNLOCK guards were manually inverted to force
inline the unlock path and estimate the worst case binary size increase.
In practice, configurations with UNINLINE_SPIN_UNLOCK=n have already
opted against binary size optimization, so the inlined worst case is
unlikely to be a concern.
Architectures with fully custom qspinlock implementations (e.g.
PowerPC) are not covered by this change.
Signed-off-by: Dmitry Ilvokhin <d@ilvokhin.com>
---
include/asm-generic/qspinlock.h | 18 ++++++++++++++++++
kernel/locking/qspinlock.c | 8 ++++++++
2 files changed, 26 insertions(+)
diff --git a/include/asm-generic/qspinlock.h b/include/asm-generic/qspinlock.h
index df76f34645a0..915a4c2777f6 100644
--- a/include/asm-generic/qspinlock.h
+++ b/include/asm-generic/qspinlock.h
@@ -41,6 +41,7 @@
#include <asm-generic/qspinlock_types.h>
#include <linux/atomic.h>
+#include <linux/tracepoint-defs.h>
#ifndef queued_spin_is_locked
/**
@@ -129,12 +130,29 @@ static __always_inline void queued_spin_release(struct qspinlock *lock)
}
#endif
+DECLARE_TRACEPOINT(contended_release);
+
+extern void queued_spin_release_traced(struct qspinlock *lock);
+
/**
* queued_spin_unlock - unlock a queued spinlock
* @lock : Pointer to queued spinlock structure
+ *
+ * Generic tracing wrapper around the arch-overridable
+ * queued_spin_release().
*/
static __always_inline void queued_spin_unlock(struct qspinlock *lock)
{
+ /*
+ * Trace and release are combined in queued_spin_release_traced() so
+ * the compiler does not need to preserve the lock pointer across the
+ * function call, avoiding callee-saved register save/restore on the
+ * hot path.
+ */
+ if (tracepoint_enabled(contended_release)) {
+ queued_spin_release_traced(lock);
+ return;
+ }
queued_spin_release(lock);
}
diff --git a/kernel/locking/qspinlock.c b/kernel/locking/qspinlock.c
index af8d122bb649..c72610980ec7 100644
--- a/kernel/locking/qspinlock.c
+++ b/kernel/locking/qspinlock.c
@@ -104,6 +104,14 @@ static __always_inline u32 __pv_wait_head_or_lock(struct qspinlock *lock,
#define queued_spin_lock_slowpath native_queued_spin_lock_slowpath
#endif
+void __lockfunc queued_spin_release_traced(struct qspinlock *lock)
+{
+ if (queued_spin_is_contended(lock))
+ trace_contended_release(lock);
+ queued_spin_release(lock);
+}
+EXPORT_SYMBOL(queued_spin_release_traced);
+
#endif /* _GEN_PV_LOCK_SLOWPATH */
/**
--
2.52.0
^ permalink raw reply related
* [PATCH v5 6/7] locking: Factor out __queued_read_unlock()/__queued_write_unlock()
From: Dmitry Ilvokhin @ 2026-04-16 15:05 UTC (permalink / raw)
To: Peter Zijlstra, Ingo Molnar, Will Deacon, Boqun Feng, Waiman Long,
Thomas Bogendoerfer, Juergen Gross, Ajay Kaher, Alexey Makhalov,
Broadcom internal kernel review list, Thomas Gleixner,
Borislav Petkov, Dave Hansen, x86, H. Peter Anvin, Arnd Bergmann,
Dennis Zhou, Tejun Heo, Christoph Lameter, Steven Rostedt,
Masami Hiramatsu, Mathieu Desnoyers
Cc: linux-kernel, linux-mips, virtualization, linux-arch, linux-mm,
linux-trace-kernel, kernel-team, Paul E. McKenney,
Dmitry Ilvokhin
In-Reply-To: <cover.1776350944.git.d@ilvokhin.com>
This is a preparatory refactoring for the next commit, which adds
contended_release tracepoint instrumentation and needs to call the
unlock from both traced and non-traced paths.
No functional change.
Signed-off-by: Dmitry Ilvokhin <d@ilvokhin.com>
---
include/asm-generic/qrwlock.h | 20 +++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/include/asm-generic/qrwlock.h b/include/asm-generic/qrwlock.h
index 75b8f4601b28..4b627bafba8b 100644
--- a/include/asm-generic/qrwlock.h
+++ b/include/asm-generic/qrwlock.h
@@ -101,16 +101,26 @@ static inline void queued_write_lock(struct qrwlock *lock)
queued_write_lock_slowpath(lock);
}
+static __always_inline void __queued_read_unlock(struct qrwlock *lock)
+{
+ /*
+ * Atomically decrement the reader count
+ */
+ (void)atomic_sub_return_release(_QR_BIAS, &lock->cnts);
+}
+
/**
* queued_read_unlock - release read lock of a queued rwlock
* @lock : Pointer to queued rwlock structure
*/
static inline void queued_read_unlock(struct qrwlock *lock)
{
- /*
- * Atomically decrement the reader count
- */
- (void)atomic_sub_return_release(_QR_BIAS, &lock->cnts);
+ __queued_read_unlock(lock);
+}
+
+static __always_inline void __queued_write_unlock(struct qrwlock *lock)
+{
+ smp_store_release(&lock->wlocked, 0);
}
/**
@@ -119,7 +129,7 @@ static inline void queued_read_unlock(struct qrwlock *lock)
*/
static inline void queued_write_unlock(struct qrwlock *lock)
{
- smp_store_release(&lock->wlocked, 0);
+ __queued_write_unlock(lock);
}
/**
--
2.52.0
^ permalink raw reply related
* [PATCH v5 4/7] locking: Factor out queued_spin_release()
From: Dmitry Ilvokhin @ 2026-04-16 15:05 UTC (permalink / raw)
To: Peter Zijlstra, Ingo Molnar, Will Deacon, Boqun Feng, Waiman Long,
Thomas Bogendoerfer, Juergen Gross, Ajay Kaher, Alexey Makhalov,
Broadcom internal kernel review list, Thomas Gleixner,
Borislav Petkov, Dave Hansen, x86, H. Peter Anvin, Arnd Bergmann,
Dennis Zhou, Tejun Heo, Christoph Lameter, Steven Rostedt,
Masami Hiramatsu, Mathieu Desnoyers
Cc: linux-kernel, linux-mips, virtualization, linux-arch, linux-mm,
linux-trace-kernel, kernel-team, Paul E. McKenney,
Dmitry Ilvokhin
In-Reply-To: <cover.1776350944.git.d@ilvokhin.com>
Introduce queued_spin_release() as an arch-overridable unlock primitive,
and make queued_spin_unlock() a generic wrapper around it.
This is a preparatory refactoring for the next commit, which adds
contended_release tracepoint instrumentation to queued_spin_unlock().
Rename the existing arch-specific queued_spin_unlock() overrides on
x86 (paravirt) and MIPS to queued_spin_release().
No functional change.
Signed-off-by: Dmitry Ilvokhin <d@ilvokhin.com>
Reviewed-by: Paul E. McKenney <paulmck@kernel.org>
---
arch/mips/include/asm/spinlock.h | 6 +++---
arch/x86/include/asm/paravirt-spinlock.h | 6 +++---
include/asm-generic/qspinlock.h | 15 ++++++++++++---
3 files changed, 18 insertions(+), 9 deletions(-)
diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h
index 6ce2117e49f6..c349162f15eb 100644
--- a/arch/mips/include/asm/spinlock.h
+++ b/arch/mips/include/asm/spinlock.h
@@ -13,12 +13,12 @@
#include <asm-generic/qspinlock_types.h>
-#define queued_spin_unlock queued_spin_unlock
+#define queued_spin_release queued_spin_release
/**
- * queued_spin_unlock - release a queued spinlock
+ * queued_spin_release - release a queued spinlock
* @lock : Pointer to queued spinlock structure
*/
-static inline void queued_spin_unlock(struct qspinlock *lock)
+static inline void queued_spin_release(struct qspinlock *lock)
{
/* This could be optimised with ARCH_HAS_MMIOWB */
mmiowb();
diff --git a/arch/x86/include/asm/paravirt-spinlock.h b/arch/x86/include/asm/paravirt-spinlock.h
index 7beffcb08ed6..ac75e0736198 100644
--- a/arch/x86/include/asm/paravirt-spinlock.h
+++ b/arch/x86/include/asm/paravirt-spinlock.h
@@ -49,9 +49,9 @@ static __always_inline bool pv_vcpu_is_preempted(long cpu)
ALT_NOT(X86_FEATURE_VCPUPREEMPT));
}
-#define queued_spin_unlock queued_spin_unlock
+#define queued_spin_release queued_spin_release
/**
- * queued_spin_unlock - release a queued spinlock
+ * queued_spin_release - release a queued spinlock
* @lock : Pointer to queued spinlock structure
*
* A smp_store_release() on the least-significant byte.
@@ -66,7 +66,7 @@ static inline void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val)
pv_queued_spin_lock_slowpath(lock, val);
}
-static inline void queued_spin_unlock(struct qspinlock *lock)
+static inline void queued_spin_release(struct qspinlock *lock)
{
kcsan_release();
pv_queued_spin_unlock(lock);
diff --git a/include/asm-generic/qspinlock.h b/include/asm-generic/qspinlock.h
index bf47cca2c375..df76f34645a0 100644
--- a/include/asm-generic/qspinlock.h
+++ b/include/asm-generic/qspinlock.h
@@ -115,12 +115,12 @@ static __always_inline void queued_spin_lock(struct qspinlock *lock)
}
#endif
-#ifndef queued_spin_unlock
+#ifndef queued_spin_release
/**
- * queued_spin_unlock - release a queued spinlock
+ * queued_spin_release - release a queued spinlock
* @lock : Pointer to queued spinlock structure
*/
-static __always_inline void queued_spin_unlock(struct qspinlock *lock)
+static __always_inline void queued_spin_release(struct qspinlock *lock)
{
/*
* unlock() needs release semantics:
@@ -129,6 +129,15 @@ static __always_inline void queued_spin_unlock(struct qspinlock *lock)
}
#endif
+/**
+ * queued_spin_unlock - unlock a queued spinlock
+ * @lock : Pointer to queued spinlock structure
+ */
+static __always_inline void queued_spin_unlock(struct qspinlock *lock)
+{
+ queued_spin_release(lock);
+}
+
#ifndef virt_spin_lock
static __always_inline bool virt_spin_lock(struct qspinlock *lock)
{
--
2.52.0
^ permalink raw reply related
* [PATCH v5 3/7] locking: Add contended_release tracepoint to sleepable locks
From: Dmitry Ilvokhin @ 2026-04-16 15:05 UTC (permalink / raw)
To: Peter Zijlstra, Ingo Molnar, Will Deacon, Boqun Feng, Waiman Long,
Thomas Bogendoerfer, Juergen Gross, Ajay Kaher, Alexey Makhalov,
Broadcom internal kernel review list, Thomas Gleixner,
Borislav Petkov, Dave Hansen, x86, H. Peter Anvin, Arnd Bergmann,
Dennis Zhou, Tejun Heo, Christoph Lameter, Steven Rostedt,
Masami Hiramatsu, Mathieu Desnoyers
Cc: linux-kernel, linux-mips, virtualization, linux-arch, linux-mm,
linux-trace-kernel, kernel-team, Paul E. McKenney,
Dmitry Ilvokhin
In-Reply-To: <cover.1776350944.git.d@ilvokhin.com>
Add the contended_release trace event. This tracepoint fires on the
holder side when a contended lock is released, complementing the
existing contention_begin/contention_end tracepoints which fire on the
waiter side.
This enables correlating lock hold time under contention with waiter
events by lock address.
Add trace_contended_release() calls to the slowpath unlock paths of
sleepable locks: mutex, rtmutex, semaphore, rwsem, percpu-rwsem, and
RT-specific rwbase locks.
Where possible, trace_contended_release() fires before the lock is
released and before the waiter is woken. For some lock types, the
tracepoint fires after the release but before the wake. Making the
placement consistent across all lock types is not worth the added
complexity.
For reader/writer locks, the tracepoint fires for every reader releasing
while a writer is waiting, not only for the last reader.
Signed-off-by: Dmitry Ilvokhin <d@ilvokhin.com>
Acked-by: Paul E. McKenney <paulmck@kernel.org>
---
include/trace/events/lock.h | 17 +++++++++++++++++
kernel/locking/mutex.c | 4 ++++
kernel/locking/percpu-rwsem.c | 11 +++++++++++
kernel/locking/rtmutex.c | 1 +
kernel/locking/rwbase_rt.c | 6 ++++++
kernel/locking/rwsem.c | 10 ++++++++--
kernel/locking/semaphore.c | 4 ++++
7 files changed, 51 insertions(+), 2 deletions(-)
diff --git a/include/trace/events/lock.h b/include/trace/events/lock.h
index da978f2afb45..1ded869cd619 100644
--- a/include/trace/events/lock.h
+++ b/include/trace/events/lock.h
@@ -137,6 +137,23 @@ TRACE_EVENT(contention_end,
TP_printk("%p (ret=%d)", __entry->lock_addr, __entry->ret)
);
+TRACE_EVENT(contended_release,
+
+ TP_PROTO(void *lock),
+
+ TP_ARGS(lock),
+
+ TP_STRUCT__entry(
+ __field(void *, lock_addr)
+ ),
+
+ TP_fast_assign(
+ __entry->lock_addr = lock;
+ ),
+
+ TP_printk("%p", __entry->lock_addr)
+);
+
#endif /* _TRACE_LOCK_H */
/* This part must be outside protection */
diff --git a/kernel/locking/mutex.c b/kernel/locking/mutex.c
index 427187ff02db..6c2c9312eb8f 100644
--- a/kernel/locking/mutex.c
+++ b/kernel/locking/mutex.c
@@ -997,6 +997,9 @@ static noinline void __sched __mutex_unlock_slowpath(struct mutex *lock, unsigne
wake_q_add(&wake_q, next);
}
+ if (trace_contended_release_enabled() && waiter)
+ trace_contended_release(lock);
+
if (owner & MUTEX_FLAG_HANDOFF)
__mutex_handoff(lock, next);
@@ -1194,6 +1197,7 @@ EXPORT_SYMBOL(ww_mutex_lock_interruptible);
EXPORT_TRACEPOINT_SYMBOL_GPL(contention_begin);
EXPORT_TRACEPOINT_SYMBOL_GPL(contention_end);
+EXPORT_TRACEPOINT_SYMBOL_GPL(contended_release);
/**
* atomic_dec_and_mutex_lock - return holding mutex if we dec to 0
diff --git a/kernel/locking/percpu-rwsem.c b/kernel/locking/percpu-rwsem.c
index f3ee7a0d6047..46b5903989b8 100644
--- a/kernel/locking/percpu-rwsem.c
+++ b/kernel/locking/percpu-rwsem.c
@@ -263,6 +263,9 @@ void percpu_up_write(struct percpu_rw_semaphore *sem)
{
rwsem_release(&sem->dep_map, _RET_IP_);
+ if (trace_contended_release_enabled() && wq_has_sleeper(&sem->waiters))
+ trace_contended_release(sem);
+
/*
* Signal the writer is done, no fast path yet.
*
@@ -292,6 +295,14 @@ EXPORT_SYMBOL_GPL(percpu_up_write);
void __percpu_up_read(struct percpu_rw_semaphore *sem)
{
lockdep_assert_preemption_disabled();
+ /*
+ * After percpu_up_write() completes, rcu_sync_is_idle() can still
+ * return false during the grace period, forcing readers into this
+ * slowpath. Only trace when a writer is actually waiting for
+ * readers to drain.
+ */
+ if (trace_contended_release_enabled() && rcuwait_active(&sem->writer))
+ trace_contended_release(sem);
/*
* slowpath; reader will only ever wake a single blocked
* writer.
diff --git a/kernel/locking/rtmutex.c b/kernel/locking/rtmutex.c
index ccaba6148b61..3db8a840b4e8 100644
--- a/kernel/locking/rtmutex.c
+++ b/kernel/locking/rtmutex.c
@@ -1466,6 +1466,7 @@ static void __sched rt_mutex_slowunlock(struct rt_mutex_base *lock)
raw_spin_lock_irqsave(&lock->wait_lock, flags);
}
+ trace_contended_release(lock);
/*
* The wakeup next waiter path does not suffer from the above
* race. See the comments there.
diff --git a/kernel/locking/rwbase_rt.c b/kernel/locking/rwbase_rt.c
index 82e078c0665a..74da5601018f 100644
--- a/kernel/locking/rwbase_rt.c
+++ b/kernel/locking/rwbase_rt.c
@@ -174,6 +174,8 @@ static void __sched __rwbase_read_unlock(struct rwbase_rt *rwb,
static __always_inline void rwbase_read_unlock(struct rwbase_rt *rwb,
unsigned int state)
{
+ if (trace_contended_release_enabled() && rt_mutex_owner(&rwb->rtmutex))
+ trace_contended_release(rwb);
/*
* rwb->readers can only hit 0 when a writer is waiting for the
* active readers to leave the critical section.
@@ -205,6 +207,8 @@ static inline void rwbase_write_unlock(struct rwbase_rt *rwb)
unsigned long flags;
raw_spin_lock_irqsave(&rtm->wait_lock, flags);
+ if (trace_contended_release_enabled() && rt_mutex_has_waiters(rtm))
+ trace_contended_release(rwb);
__rwbase_write_unlock(rwb, WRITER_BIAS, flags);
}
@@ -214,6 +218,8 @@ static inline void rwbase_write_downgrade(struct rwbase_rt *rwb)
unsigned long flags;
raw_spin_lock_irqsave(&rtm->wait_lock, flags);
+ if (trace_contended_release_enabled() && rt_mutex_has_waiters(rtm))
+ trace_contended_release(rwb);
/* Release it and account current as reader */
__rwbase_write_unlock(rwb, WRITER_BIAS - 1, flags);
}
diff --git a/kernel/locking/rwsem.c b/kernel/locking/rwsem.c
index bf647097369c..602d5fd3c91a 100644
--- a/kernel/locking/rwsem.c
+++ b/kernel/locking/rwsem.c
@@ -1387,6 +1387,8 @@ static inline void __up_read(struct rw_semaphore *sem)
rwsem_clear_reader_owned(sem);
tmp = atomic_long_add_return_release(-RWSEM_READER_BIAS, &sem->count);
DEBUG_RWSEMS_WARN_ON(tmp < 0, sem);
+ if (trace_contended_release_enabled() && (tmp & RWSEM_FLAG_WAITERS))
+ trace_contended_release(sem);
if (unlikely((tmp & (RWSEM_LOCK_MASK|RWSEM_FLAG_WAITERS)) ==
RWSEM_FLAG_WAITERS)) {
clear_nonspinnable(sem);
@@ -1413,8 +1415,10 @@ static inline void __up_write(struct rw_semaphore *sem)
preempt_disable();
rwsem_clear_owner(sem);
tmp = atomic_long_fetch_add_release(-RWSEM_WRITER_LOCKED, &sem->count);
- if (unlikely(tmp & RWSEM_FLAG_WAITERS))
+ if (unlikely(tmp & RWSEM_FLAG_WAITERS)) {
+ trace_contended_release(sem);
rwsem_wake(sem);
+ }
preempt_enable();
}
@@ -1437,8 +1441,10 @@ static inline void __downgrade_write(struct rw_semaphore *sem)
tmp = atomic_long_fetch_add_release(
-RWSEM_WRITER_LOCKED+RWSEM_READER_BIAS, &sem->count);
rwsem_set_reader_owned(sem);
- if (tmp & RWSEM_FLAG_WAITERS)
+ if (tmp & RWSEM_FLAG_WAITERS) {
+ trace_contended_release(sem);
rwsem_downgrade_wake(sem);
+ }
preempt_enable();
}
diff --git a/kernel/locking/semaphore.c b/kernel/locking/semaphore.c
index 74d41433ba13..35ac3498dca5 100644
--- a/kernel/locking/semaphore.c
+++ b/kernel/locking/semaphore.c
@@ -230,6 +230,10 @@ void __sched up(struct semaphore *sem)
sem->count++;
else
__up(sem, &wake_q);
+
+ if (trace_contended_release_enabled() && !wake_q_empty(&wake_q))
+ trace_contended_release(sem);
+
raw_spin_unlock_irqrestore(&sem->lock, flags);
if (!wake_q_empty(&wake_q))
wake_up_q(&wake_q);
--
2.52.0
^ permalink raw reply related
* [PATCH v5 2/7] locking/percpu-rwsem: Extract __percpu_up_read()
From: Dmitry Ilvokhin @ 2026-04-16 15:05 UTC (permalink / raw)
To: Peter Zijlstra, Ingo Molnar, Will Deacon, Boqun Feng, Waiman Long,
Thomas Bogendoerfer, Juergen Gross, Ajay Kaher, Alexey Makhalov,
Broadcom internal kernel review list, Thomas Gleixner,
Borislav Petkov, Dave Hansen, x86, H. Peter Anvin, Arnd Bergmann,
Dennis Zhou, Tejun Heo, Christoph Lameter, Steven Rostedt,
Masami Hiramatsu, Mathieu Desnoyers
Cc: linux-kernel, linux-mips, virtualization, linux-arch, linux-mm,
linux-trace-kernel, kernel-team, Paul E. McKenney,
Dmitry Ilvokhin, Usama Arif
In-Reply-To: <cover.1776350944.git.d@ilvokhin.com>
Move the percpu_up_read() slowpath out of the inline function into a new
__percpu_up_read() to avoid binary size increase from adding a
tracepoint to an inlined function.
Signed-off-by: Dmitry Ilvokhin <d@ilvokhin.com>
Acked-by: Usama Arif <usama.arif@linux.dev>
---
include/linux/percpu-rwsem.h | 15 +++------------
kernel/locking/percpu-rwsem.c | 18 ++++++++++++++++++
2 files changed, 21 insertions(+), 12 deletions(-)
diff --git a/include/linux/percpu-rwsem.h b/include/linux/percpu-rwsem.h
index c8cb010d655e..39d5bf8e6562 100644
--- a/include/linux/percpu-rwsem.h
+++ b/include/linux/percpu-rwsem.h
@@ -107,6 +107,8 @@ static inline bool percpu_down_read_trylock(struct percpu_rw_semaphore *sem)
return ret;
}
+extern void __percpu_up_read(struct percpu_rw_semaphore *sem);
+
static inline void percpu_up_read(struct percpu_rw_semaphore *sem)
{
rwsem_release(&sem->dep_map, _RET_IP_);
@@ -118,18 +120,7 @@ static inline void percpu_up_read(struct percpu_rw_semaphore *sem)
if (likely(rcu_sync_is_idle(&sem->rss))) {
this_cpu_dec(*sem->read_count);
} else {
- /*
- * slowpath; reader will only ever wake a single blocked
- * writer.
- */
- smp_mb(); /* B matches C */
- /*
- * In other words, if they see our decrement (presumably to
- * aggregate zero, as that is the only time it matters) they
- * will also see our critical section.
- */
- this_cpu_dec(*sem->read_count);
- rcuwait_wake_up(&sem->writer);
+ __percpu_up_read(sem);
}
preempt_enable();
}
diff --git a/kernel/locking/percpu-rwsem.c b/kernel/locking/percpu-rwsem.c
index ef234469baac..f3ee7a0d6047 100644
--- a/kernel/locking/percpu-rwsem.c
+++ b/kernel/locking/percpu-rwsem.c
@@ -288,3 +288,21 @@ void percpu_up_write(struct percpu_rw_semaphore *sem)
rcu_sync_exit(&sem->rss);
}
EXPORT_SYMBOL_GPL(percpu_up_write);
+
+void __percpu_up_read(struct percpu_rw_semaphore *sem)
+{
+ lockdep_assert_preemption_disabled();
+ /*
+ * slowpath; reader will only ever wake a single blocked
+ * writer.
+ */
+ smp_mb(); /* B matches C */
+ /*
+ * In other words, if they see our decrement (presumably to
+ * aggregate zero, as that is the only time it matters) they
+ * will also see our critical section.
+ */
+ this_cpu_dec(*sem->read_count);
+ rcuwait_wake_up(&sem->writer);
+}
+EXPORT_SYMBOL_GPL(__percpu_up_read);
--
2.52.0
^ permalink raw reply related
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