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From: Neeraj Soni <neeraj.soni@oss.qualcomm.com>
To: ulf.hansson@linaro.org, robh@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, andersson@kernel.org,
	konradybcio@kernel.org
Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, neeraj.soni@oss.qualcomm.com,
	Abel Vesa <abel.vesa@linaro.org>,
	Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
Subject: [PATCH v4 1/3] dt-bindings: mmc: sdhci-msm: Add ICE phandle
Date: Tue, 17 Feb 2026 10:55:24 +0530	[thread overview]
Message-ID: <20260217052526.2335759-2-neeraj.soni@oss.qualcomm.com> (raw)
In-Reply-To: <20260217052526.2335759-1-neeraj.soni@oss.qualcomm.com>

Starting with sc7280(kodiak), the ICE will have its own device-tree node.
So add the qcom,ice property to reference it.

To avoid double-modeling, when qcom,ice is present, disallow an embedded ICE
register region in the SDHCI node. Older SoCs without ICE remain valid as
no additional requirement is imposed.

Co-developed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Co-developed-by: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
Signed-off-by: Neeraj Soni <neeraj.soni@oss.qualcomm.com>

---

Some initial work is done by Abel here:
https://lore.kernel.org/all/ba3da82d-999b-b040-5230-36e60293e0fd@linaro.org/
and by Abhinaba here:
https://lore.kernel.org/all/20251009-add-separate-ice-ufs-and-emmc-device-nodes-for-qcs615-platform-v1-1-2a34d8d03c72@oss.qualcomm.com/

This patch adds the purpose and usage for phandle in the description and encodes
it properly in the schema.
---
 .../devicetree/bindings/mmc/sdhci-msm.yaml        | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
index 938be8228d66..9b902e0c8d09 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
@@ -140,6 +140,11 @@ properties:
     $ref: /schemas/types.yaml#/definitions/uint32
     description: platform specific settings for DLL_CONFIG reg.
 
+  qcom,ice:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      phandle to the Inline Crypto Engine (ICE) hardware block for this controller.
+
   iommus:
     minItems: 1
     maxItems: 8
@@ -223,6 +228,16 @@ allOf:
             - const: cqhci
             - const: ice
 
+  - if:
+      required:
+        - qcom,ice
+    then:
+      properties:
+        reg-names:
+          not:
+            contains:
+              const: ice
+
 unevaluatedProperties: false
 
 examples:
-- 
2.34.1


  reply	other threads:[~2026-02-17  5:25 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-17  5:25 [PATCH v4 0/3] Enable Inline crypto engine for kodiak and monaco Neeraj Soni
2026-02-17  5:25 ` Neeraj Soni [this message]
2026-02-17 20:16   ` [PATCH v4 1/3] dt-bindings: mmc: sdhci-msm: Add ICE phandle Krzysztof Kozlowski
2026-02-19  5:38     ` Neeraj Soni
2026-02-19  7:20       ` Krzysztof Kozlowski
2026-02-19  8:09         ` Neeraj Soni
2026-02-19  8:27       ` Krzysztof Kozlowski
2026-03-02  7:45         ` Neeraj Soni
2026-03-02  7:48           ` Krzysztof Kozlowski
2026-03-02  8:57             ` Krzysztof Kozlowski
2026-03-02 11:25               ` Neeraj Soni
2026-03-02 16:38                 ` Krzysztof Kozlowski
2026-03-04  7:28                   ` Neeraj Soni
2026-02-17  5:25 ` [PATCH v4 2/3] arm64: dts: qcom: kodiak: enable the inline crypto engine for SDHC Neeraj Soni
2026-02-17  5:25 ` [PATCH v4 3/3] arm64: dts: qcom: monaco: " Neeraj Soni

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