Re: [PATCH v2 2/2] arm64: dts: qcom: kodiak: enable the inline crypto engine for SDHC

[Neeraj Soni <neeraj.soni@oss.qualcomm.com>]

Hi,

On 1/15/2026 2:35 PM, Krzysztof Kozlowski wrote:
> On Wed, Jan 14, 2026 at 03:18:48PM +0530, Neeraj Soni wrote:
>> Add an ICE node to kodiak SoC description and enable it by adding a
>> phandle to the SDHC node.
>>
>> Signed-off-by: Neeraj Soni <neeraj.soni@oss.qualcomm.com>
>> ---
>>  arch/arm64/boot/dts/qcom/kodiak.dtsi | 9 +++++++++
>>  1 file changed, 9 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
>> index c2ccbb67f800..fb2a9c0ea0f5 100644
>> --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
>> @@ -1045,6 +1045,8 @@ sdhc_1: mmc@7c4000 {
>>  			qcom,dll-config = <0x0007642c>;
>>  			qcom,ddr-config = <0x80040868>;
>>  
>> +			qcom,ice = <&sdhc_ice>;
>> +
>>  			mmc-ddr-1_8v;
>>  			mmc-hs200-1_8v;
>>  			mmc-hs400-1_8v;
>> @@ -1071,6 +1073,13 @@ opp-384000000 {
>>  			};
>>  		};
>>  
>> +		sdhc_ice: crypto@7C8000 {
> 
> Why this became uppercase?
Thnaks for pointing out. I will fix this next patch.
> 
>> +			compatible = "qcom,sc7280-inline-crypto-engine",
>> +				     "qcom,inline-crypto-engine";
>> +			reg = <0x0 0x007C8000 0x0 0x18000>;
> 
> And this? there is no uppercase at all, so maybye you copied it from
> downstream, but that's not right approach - do not use downstream code.
> 
Yes it was copied but i missed to align with upstream. Thanks for pointing out. This will be fixed in next patch.
> Best regards,
> Krzysztof
> 
Regards
Neeraj