[PATCH v2 1/1] Revert "ARM: dts: Update pcie ranges for dra7"

[PATCH v2 1/1] Revert "ARM: dts: Update pcie ranges for dra7"

[Frank Li]

This reverts commit c761028ef5e27f477fe14d2b134164c584fc21ee.

The commit being reverted updated the "ranges" property for the sake of
readability. However, this change is no longer appropriate due to the
following reasons:

- On many SoCs, the PCIe parent bus translates CPU addresses to different
values before passing them to the PCIe controller.
- The reverted commit introduced a fake address translation, which violates
the fundamental DTS principle: the device tree should reflect actual
hardware behavior.

Reverting this change prepares for the cleanup of the driver's
cpu_addr_fixup() hook.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Change from v1 to v2:
- update commit message to add more detail.

Previous disscusion at
https://lore.kernel.org/linux-pci/20250314064642.fyf3jqylmc6meft7@uda0492258/
---
 arch/arm/boot/dts/ti/omap/dra7.dtsi | 29 +++++++++++------------------
 1 file changed, 11 insertions(+), 18 deletions(-)

diff --git a/arch/arm/boot/dts/ti/omap/dra7.dtsi b/arch/arm/boot/dts/ti/omap/dra7.dtsi
index b709703f6c0d4..711ce4c31bb1f 100644
--- a/arch/arm/boot/dts/ti/omap/dra7.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dra7.dtsi
@@ -195,24 +195,22 @@ axi0: target-module@51000000 {
 			clock-names = "fck", "phy-clk", "phy-clk-div";
 			#size-cells = <1>;
 			#address-cells = <1>;
-			ranges = <0x51000000 0x51000000 0x3000>,
-				 <0x20000000 0x20000000 0x10000000>;
+			ranges = <0x51000000 0x51000000 0x3000
+				  0x0	     0x20000000 0x10000000>;
 			dma-ranges;
 			/**
 			 * To enable PCI endpoint mode, disable the pcie1_rc
 			 * node and enable pcie1_ep mode.
 			 */
 			pcie1_rc: pcie@51000000 {
-				reg = <0x51000000 0x2000>,
-				      <0x51002000 0x14c>,
-				      <0x20001000 0x2000>;
+				reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
 				reg-names = "rc_dbics", "ti_conf", "config";
 				interrupts = <0 232 0x4>, <0 233 0x4>;
 				#address-cells = <3>;
 				#size-cells = <2>;
 				device_type = "pci";
-				ranges = <0x81000000 0 0x00000000 0x20003000 0 0x00010000>,
-					 <0x82000000 0 0x20013000 0x20013000 0 0x0ffed000>;
+				ranges = <0x81000000 0 0          0x03000 0 0x00010000
+					  0x82000000 0 0x20013000 0x13000 0 0xffed000>;
 				bus-range = <0x00 0xff>;
 				#interrupt-cells = <1>;
 				num-lanes = <1>;
@@ -235,10 +233,7 @@ pcie1_intc: interrupt-controller {
 			};
 
 			pcie1_ep: pcie_ep@51000000 {
-				reg = <0x51000000 0x28>,
-				      <0x51002000 0x14c>,
-				      <0x51001000 0x28>,
-				      <0x20001000 0x10000000>;
+				reg = <0x51000000 0x28>, <0x51002000 0x14c>, <0x51001000 0x28>, <0x1000 0x10000000>;
 				reg-names = "ep_dbics", "ti_conf", "ep_dbics2", "addr_space";
 				interrupts = <0 232 0x4>;
 				num-lanes = <1>;
@@ -269,21 +264,19 @@ axi1: target-module@51800000 {
 			reset-names = "rstctrl";
 			#size-cells = <1>;
 			#address-cells = <1>;
-			ranges = <0x51800000 0x51800000 0x3000>,
-				 <0x30000000 0x30000000 0x10000000>;
+			ranges = <0x51800000 0x51800000 0x3000
+				  0x0	     0x30000000 0x10000000>;
 			dma-ranges;
 			status = "disabled";
 			pcie2_rc: pcie@51800000 {
-				reg = <0x51800000 0x2000>,
-				      <0x51802000 0x14c>,
-				      <0x30001000 0x2000>;
+				reg = <0x51800000 0x2000>, <0x51802000 0x14c>, <0x1000 0x2000>;
 				reg-names = "rc_dbics", "ti_conf", "config";
 				interrupts = <0 355 0x4>, <0 356 0x4>;
 				#address-cells = <3>;
 				#size-cells = <2>;
 				device_type = "pci";
-				ranges = <0x81000000 0 0x00000000 0x30003000 0 0x00010000>,
-					 <0x82000000 0 0x30013000 0x30013000 0 0x0ffed000>;
+				ranges = <0x81000000 0 0          0x03000 0 0x00010000
+					  0x82000000 0 0x30013000 0x13000 0 0xffed000>;
 				bus-range = <0x00 0xff>;
 				#interrupt-cells = <1>;
 				num-lanes = <1>;
-- 
2.34.1

Re: [PATCH v2 1/1] Revert "ARM: dts: Update pcie ranges for dra7"

[Frank Li]

On Fri, Apr 11, 2025 at 11:34:54AM -0400, Frank Li wrote:
> This reverts commit c761028ef5e27f477fe14d2b134164c584fc21ee.
>
> The commit being reverted updated the "ranges" property for the sake of
> readability. However, this change is no longer appropriate due to the
> following reasons:
>
> - On many SoCs, the PCIe parent bus translates CPU addresses to different
> values before passing them to the PCIe controller.
> - The reverted commit introduced a fake address translation, which violates
> the fundamental DTS principle: the device tree should reflect actual
> hardware behavior.
>
> Reverting this change prepares for the cleanup of the driver's
> cpu_addr_fixup() hook.
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---

s-vadapalli:

	Any update about this patch? it prepare to remove cpu_addr_fixes()!

Frank


> Change from v1 to v2:
> - update commit message to add more detail.
>
> Previous disscusion at
> https://lore.kernel.org/linux-pci/20250314064642.fyf3jqylmc6meft7@uda0492258/
> ---
>  arch/arm/boot/dts/ti/omap/dra7.dtsi | 29 +++++++++++------------------
>  1 file changed, 11 insertions(+), 18 deletions(-)
>
> diff --git a/arch/arm/boot/dts/ti/omap/dra7.dtsi b/arch/arm/boot/dts/ti/omap/dra7.dtsi
> index b709703f6c0d4..711ce4c31bb1f 100644
> --- a/arch/arm/boot/dts/ti/omap/dra7.dtsi
> +++ b/arch/arm/boot/dts/ti/omap/dra7.dtsi
> @@ -195,24 +195,22 @@ axi0: target-module@51000000 {
>  			clock-names = "fck", "phy-clk", "phy-clk-div";
>  			#size-cells = <1>;
>  			#address-cells = <1>;
> -			ranges = <0x51000000 0x51000000 0x3000>,
> -				 <0x20000000 0x20000000 0x10000000>;
> +			ranges = <0x51000000 0x51000000 0x3000
> +				  0x0	     0x20000000 0x10000000>;
>  			dma-ranges;
>  			/**
>  			 * To enable PCI endpoint mode, disable the pcie1_rc
>  			 * node and enable pcie1_ep mode.
>  			 */
>  			pcie1_rc: pcie@51000000 {
> -				reg = <0x51000000 0x2000>,
> -				      <0x51002000 0x14c>,
> -				      <0x20001000 0x2000>;
> +				reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
>  				reg-names = "rc_dbics", "ti_conf", "config";
>  				interrupts = <0 232 0x4>, <0 233 0x4>;
>  				#address-cells = <3>;
>  				#size-cells = <2>;
>  				device_type = "pci";
> -				ranges = <0x81000000 0 0x00000000 0x20003000 0 0x00010000>,
> -					 <0x82000000 0 0x20013000 0x20013000 0 0x0ffed000>;
> +				ranges = <0x81000000 0 0          0x03000 0 0x00010000
> +					  0x82000000 0 0x20013000 0x13000 0 0xffed000>;
>  				bus-range = <0x00 0xff>;
>  				#interrupt-cells = <1>;
>  				num-lanes = <1>;
> @@ -235,10 +233,7 @@ pcie1_intc: interrupt-controller {
>  			};
>
>  			pcie1_ep: pcie_ep@51000000 {
> -				reg = <0x51000000 0x28>,
> -				      <0x51002000 0x14c>,
> -				      <0x51001000 0x28>,
> -				      <0x20001000 0x10000000>;
> +				reg = <0x51000000 0x28>, <0x51002000 0x14c>, <0x51001000 0x28>, <0x1000 0x10000000>;
>  				reg-names = "ep_dbics", "ti_conf", "ep_dbics2", "addr_space";
>  				interrupts = <0 232 0x4>;
>  				num-lanes = <1>;
> @@ -269,21 +264,19 @@ axi1: target-module@51800000 {
>  			reset-names = "rstctrl";
>  			#size-cells = <1>;
>  			#address-cells = <1>;
> -			ranges = <0x51800000 0x51800000 0x3000>,
> -				 <0x30000000 0x30000000 0x10000000>;
> +			ranges = <0x51800000 0x51800000 0x3000
> +				  0x0	     0x30000000 0x10000000>;
>  			dma-ranges;
>  			status = "disabled";
>  			pcie2_rc: pcie@51800000 {
> -				reg = <0x51800000 0x2000>,
> -				      <0x51802000 0x14c>,
> -				      <0x30001000 0x2000>;
> +				reg = <0x51800000 0x2000>, <0x51802000 0x14c>, <0x1000 0x2000>;
>  				reg-names = "rc_dbics", "ti_conf", "config";
>  				interrupts = <0 355 0x4>, <0 356 0x4>;
>  				#address-cells = <3>;
>  				#size-cells = <2>;
>  				device_type = "pci";
> -				ranges = <0x81000000 0 0x00000000 0x30003000 0 0x00010000>,
> -					 <0x82000000 0 0x30013000 0x30013000 0 0x0ffed000>;
> +				ranges = <0x81000000 0 0          0x03000 0 0x00010000
> +					  0x82000000 0 0x30013000 0x13000 0 0xffed000>;
>  				bus-range = <0x00 0xff>;
>  				#interrupt-cells = <1>;
>  				num-lanes = <1>;
> --
> 2.34.1
>

Re: [PATCH v2 1/1] Revert "ARM: dts: Update pcie ranges for dra7"

[Siddharth Vadapalli]

On Thu, May 22, 2025 at 03:29:34PM -0400, Frank Li wrote:

Hello Frank,

> On Fri, Apr 11, 2025 at 11:34:54AM -0400, Frank Li wrote:
> > This reverts commit c761028ef5e27f477fe14d2b134164c584fc21ee.
> >
> > The commit being reverted updated the "ranges" property for the sake of
> > readability. However, this change is no longer appropriate due to the
> > following reasons:
> >
> > - On many SoCs, the PCIe parent bus translates CPU addresses to different
> > values before passing them to the PCIe controller.
> > - The reverted commit introduced a fake address translation, which violates
> > the fundamental DTS principle: the device tree should reflect actual
> > hardware behavior.
> >
> > Reverting this change prepares for the cleanup of the driver's
> > cpu_addr_fixup() hook.
> >
> > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > ---
> 
> s-vadapalli:
> 
> 	Any update about this patch? it prepare to remove cpu_addr_fixes()!

This patch looks good to me, but I was hoping that Tony Lindgren, who is
the author of the commit being reverted, would provide feedback as well.

Regards,
Siddharth.

Re: [PATCH v2 1/1] Revert "ARM: dts: Update pcie ranges for dra7"

[Frank Li]

On Fri, May 23, 2025 at 11:02:38AM +0530, Siddharth Vadapalli wrote:
> On Thu, May 22, 2025 at 03:29:34PM -0400, Frank Li wrote:
>
> Hello Frank,
>
> > On Fri, Apr 11, 2025 at 11:34:54AM -0400, Frank Li wrote:
> > > This reverts commit c761028ef5e27f477fe14d2b134164c584fc21ee.
> > >
> > > The commit being reverted updated the "ranges" property for the sake of
> > > readability. However, this change is no longer appropriate due to the
> > > following reasons:
> > >
> > > - On many SoCs, the PCIe parent bus translates CPU addresses to different
> > > values before passing them to the PCIe controller.
> > > - The reverted commit introduced a fake address translation, which violates
> > > the fundamental DTS principle: the device tree should reflect actual
> > > hardware behavior.
> > >
> > > Reverting this change prepares for the cleanup of the driver's
> > > cpu_addr_fixup() hook.
> > >
> > > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > > ---
> >
> > s-vadapalli:
> >
> > 	Any update about this patch? it prepare to remove cpu_addr_fixes()!
>
> This patch looks good to me, but I was hoping that Tony Lindgren, who is
> the author of the commit being reverted, would provide feedback as well.

Move tony to list.

Tony Lindgren:
	Do you have any comments about this one?

Frank
>
> Regards,
> Siddharth.

Re: [PATCH v2 1/1] Revert "ARM: dts: Update pcie ranges for dra7"

[Kevin Hilman]

On Fri, 11 Apr 2025 11:34:54 -0400, Frank Li wrote:
> This reverts commit c761028ef5e27f477fe14d2b134164c584fc21ee.
> 
> The commit being reverted updated the "ranges" property for the sake of
> readability. However, this change is no longer appropriate due to the
> following reasons:
> 
> - On many SoCs, the PCIe parent bus translates CPU addresses to different
> values before passing them to the PCIe controller.
> - The reverted commit introduced a fake address translation, which violates
> the fundamental DTS principle: the device tree should reflect actual
> hardware behavior.
> 
> [...]

Applied, thanks!

[1/1] Revert "ARM: dts: Update pcie ranges for dra7"
      commit: 8c178057e734188eeeceaec33848eaca2766ca07

Best regards,
-- 
Kevin Hilman <khilman@baylibre.com>