From: sashiko-bot@kernel.org
To: "Hans Zhang" <18255117159@163.com>
Cc: linux-pci@vger.kernel.org, wsa+renesas@sang-engineering.com
Subject: Re: [PATCH v3 4/7] PCI: dwc: Use common pci_host_common_link_train_delay() helper
Date: Tue, 12 May 2026 01:00:50 +0000 [thread overview]
Message-ID: <20260512010051.2AE52C2BCB0@smtp.kernel.org> (raw)
In-Reply-To: <20260511055923.37117-5-18255117159@163.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Improper cross-controller coupling by including `../pci-host-common.h` in the DesignWare core.
--
commit f5801e5d9e35ace16e87610771ef7a5939957245
Author: Hans Zhang <18255117159@163.com>
PCI: dwc: Use common pci_host_common_link_train_delay() helper
This commit replaces the open-coded 100 ms PCIe spec delay in the
DesignWare driver with the pci_host_common_link_train_delay() helper
to reduce code duplication.
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index c11cf61b8319e..7021d21bb6011 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -22,6 +22,7 @@
> #include <linux/sizes.h>
> #include <linux/types.h>
>
> +#include "../pci-host-common.h"
Does including this header create an architectural entanglement between the
DesignWare library and the generic PCI ECAM host controller library?
Since the delay implements a generic PCIe specification requirement (PCIe r6.0
sec 6.6.1) applicable to all Downstream Ports > 5.0 GT/s, should this helper
be placed in a shared subsystem-wide header (like drivers/pci/pci.h or
include/linux/pci.h) with a generic name, rather than relying on another
controller's header?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260511055923.37117-1-18255117159@163.com?part=4
next prev parent reply other threads:[~2026-05-12 1:00 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-11 5:59 [PATCH v3 0/7] PCI: Add common helper for 100 ms delay after link training Hans Zhang
2026-05-11 5:59 ` [PATCH v3 1/7] PCI: Add pci_host_common_link_train_delay() helper Hans Zhang
2026-05-12 0:07 ` sashiko-bot
2026-05-12 0:45 ` Hans Zhang
2026-05-12 7:05 ` Claudiu Beznea
2026-05-12 10:06 ` Hans Zhang
2026-05-11 5:59 ` [PATCH v3 2/7] PCI: cadence: Add post-link delay for LGA and j721e glue driver Hans Zhang
2026-05-12 0:24 ` sashiko-bot
2026-05-12 0:44 ` Hans Zhang
2026-05-11 5:59 ` [PATCH v3 3/7] PCI: cadence: HPA: Add post-link delay Hans Zhang
2026-05-12 0:44 ` sashiko-bot
2026-05-11 5:59 ` [PATCH v3 4/7] PCI: dwc: Use common pci_host_common_link_train_delay() helper Hans Zhang
2026-05-11 7:02 ` Krzysztof Wilczyński
2026-05-12 0:43 ` Hans Zhang
2026-05-12 7:14 ` Krzysztof Wilczyński
2026-05-12 10:06 ` Hans Zhang
2026-05-12 6:45 ` Manivannan Sadhasivam
2026-05-12 7:14 ` Krzysztof Wilczyński
2026-05-12 1:00 ` sashiko-bot [this message]
2026-05-11 5:59 ` [PATCH v3 5/7] PCI: aardvark: Add 100 ms delay after link training Hans Zhang
2026-05-12 1:31 ` sashiko-bot
2026-05-11 5:59 ` [PATCH v3 6/7] PCI: mediatek-gen3: Add 100 ms delay after link up Hans Zhang
2026-05-12 1:59 ` sashiko-bot
2026-05-11 5:59 ` [PATCH v3 7/7] PCI: rzg3s-host: Use common pci_host_common_link_train_delay() helper Hans Zhang
2026-05-12 2:15 ` sashiko-bot
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