* [PATCHv2] pci: add PCI_EXT_CAP_ID_PL_32GT define
@ 2023-05-31 9:57 Ben Dooks
2023-05-31 21:37 ` Bjorn Helgaas
0 siblings, 1 reply; 4+ messages in thread
From: Ben Dooks @ 2023-05-31 9:57 UTC (permalink / raw)
To: linux-pci, bhelgaas
Cc: Sudip Mukherjee, Jude Onyenegecha, Greentime Hu, Jeegar Lakhani,
Ben Dooks, Ben Dooks
From: Ben Dooks <ben.dooks@sifive.com>
Add the define for PCI_EXT_CAP_ID_PL_32GT for drivers that
will want this whilst doing Gen5/Gen6 accesses.
Signed-off-by: Ben Dooks <ben.dooks@sifive.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
--
v2:
- fixed tabs
---
include/uapi/linux/pci_regs.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index dc2000e0fe3a..e5f558d96493 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -738,6 +738,7 @@
#define PCI_EXT_CAP_ID_DVSEC 0x23 /* Designated Vendor-Specific */
#define PCI_EXT_CAP_ID_DLF 0x25 /* Data Link Feature */
#define PCI_EXT_CAP_ID_PL_16GT 0x26 /* Physical Layer 16.0 GT/s */
+#define PCI_EXT_CAP_ID_PL_32GT 0x2A /* Physical Layer 32.0 GT/s */
#define PCI_EXT_CAP_ID_DOE 0x2E /* Data Object Exchange */
#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_DOE
--
2.39.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCHv2] pci: add PCI_EXT_CAP_ID_PL_32GT define
2023-05-31 9:57 [PATCHv2] pci: add PCI_EXT_CAP_ID_PL_32GT define Ben Dooks
@ 2023-05-31 21:37 ` Bjorn Helgaas
2023-06-02 13:08 ` Ben Dooks
0 siblings, 1 reply; 4+ messages in thread
From: Bjorn Helgaas @ 2023-05-31 21:37 UTC (permalink / raw)
To: Ben Dooks
Cc: linux-pci, bhelgaas, Sudip Mukherjee, Jude Onyenegecha,
Greentime Hu, Jeegar Lakhani, Ben Dooks
On Wed, May 31, 2023 at 10:57:13AM +0100, Ben Dooks wrote:
> From: Ben Dooks <ben.dooks@sifive.com>
>
> Add the define for PCI_EXT_CAP_ID_PL_32GT for drivers that
> will want this whilst doing Gen5/Gen6 accesses.
>
> Signed-off-by: Ben Dooks <ben.dooks@sifive.com>
> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
I applied this to pci/enumeration for v6.5, thanks.
But I'm very curious about where you expect this to be used.
> --
> v2:
> - fixed tabs
> ---
> include/uapi/linux/pci_regs.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
> index dc2000e0fe3a..e5f558d96493 100644
> --- a/include/uapi/linux/pci_regs.h
> +++ b/include/uapi/linux/pci_regs.h
> @@ -738,6 +738,7 @@
> #define PCI_EXT_CAP_ID_DVSEC 0x23 /* Designated Vendor-Specific */
> #define PCI_EXT_CAP_ID_DLF 0x25 /* Data Link Feature */
> #define PCI_EXT_CAP_ID_PL_16GT 0x26 /* Physical Layer 16.0 GT/s */
> +#define PCI_EXT_CAP_ID_PL_32GT 0x2A /* Physical Layer 32.0 GT/s */
> #define PCI_EXT_CAP_ID_DOE 0x2E /* Data Object Exchange */
> #define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_DOE
>
> --
> 2.39.2
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCHv2] pci: add PCI_EXT_CAP_ID_PL_32GT define
2023-05-31 21:37 ` Bjorn Helgaas
@ 2023-06-02 13:08 ` Ben Dooks
2023-06-02 14:02 ` Bjorn Helgaas
0 siblings, 1 reply; 4+ messages in thread
From: Ben Dooks @ 2023-06-02 13:08 UTC (permalink / raw)
To: Bjorn Helgaas, Ben Dooks
Cc: linux-pci, bhelgaas, Sudip Mukherjee, Jude Onyenegecha,
Greentime Hu, Jeegar Lakhani
On 31/05/2023 22:37, Bjorn Helgaas wrote:
> On Wed, May 31, 2023 at 10:57:13AM +0100, Ben Dooks wrote:
>> From: Ben Dooks <ben.dooks@sifive.com>
>>
>> Add the define for PCI_EXT_CAP_ID_PL_32GT for drivers that
>> will want this whilst doing Gen5/Gen6 accesses.
>>
>> Signed-off-by: Ben Dooks <ben.dooks@sifive.com>
>> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
>
> I applied this to pci/enumeration for v6.5, thanks.
>
> But I'm very curious about where you expect this to be used.
We have an upcoming driver that has gen5 phy and config requirements.
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCHv2] pci: add PCI_EXT_CAP_ID_PL_32GT define
2023-06-02 13:08 ` Ben Dooks
@ 2023-06-02 14:02 ` Bjorn Helgaas
0 siblings, 0 replies; 4+ messages in thread
From: Bjorn Helgaas @ 2023-06-02 14:02 UTC (permalink / raw)
To: Ben Dooks
Cc: Ben Dooks, linux-pci, bhelgaas, Sudip Mukherjee, Jude Onyenegecha,
Greentime Hu, Jeegar Lakhani
On Fri, Jun 02, 2023 at 02:08:45PM +0100, Ben Dooks wrote:
> On 31/05/2023 22:37, Bjorn Helgaas wrote:
> > On Wed, May 31, 2023 at 10:57:13AM +0100, Ben Dooks wrote:
> > > From: Ben Dooks <ben.dooks@sifive.com>
> > >
> > > Add the define for PCI_EXT_CAP_ID_PL_32GT for drivers that
> > > will want this whilst doing Gen5/Gen6 accesses.
> > >
> > > Signed-off-by: Ben Dooks <ben.dooks@sifive.com>
> > > Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
> >
> > I applied this to pci/enumeration for v6.5, thanks.
> >
> > But I'm very curious about where you expect this to be used.
>
> We have an upcoming driver that has gen5 phy and config requirements.
I guess a better question would have been whether
PCI_EXT_CAP_ID_PL_32GT is best used in individual drivers or in the
PCI core. Since it's in the PCIe base spec and doesn't look like it
should be device-specific, it might be a candidate for supporting in
the PCI core somehow so it doesn't get reimplemented in several
places.
Bjorn
^ permalink raw reply [flat|nested] 4+ messages in thread
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2023-05-31 9:57 [PATCHv2] pci: add PCI_EXT_CAP_ID_PL_32GT define Ben Dooks
2023-05-31 21:37 ` Bjorn Helgaas
2023-06-02 13:08 ` Ben Dooks
2023-06-02 14:02 ` Bjorn Helgaas
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