Re: [RFC PATCH 0/9] pci: portdrv: Add auxiliary bus and register CXL PMUs (and aer)

[Lukas Wunner <lukas@wunner.de>]

On Thu, Jun 06, 2024 at 01:57:56PM +0100, Jonathan Cameron wrote:
> Or are you thinking we can make something like the following work
> (even when we can't do dynamic msix)?
> 
> Core bring up facilities and interrupt etc.  That includes bus master
> so msi/msix can be issued (which makes me nervous - putting aside other
> concerns as IIRC there are drivers where you have to be careful to
> tweak registers to ensure you don't get a storm of traffic when you
> hit bus master enable.
> 
> Specific driver may bind later - everything keeps running until 
> the specific driver calls pci_alloc_irq_vectors(), then we have to disable all
> interrupts for core managed services, change the number of vectors and
> then move them to wherever they end up before starting them again.
> We have to do the similar in the unwind path.

My recollection is that Thomas Gleixner has brought up dynamic MSI-X
allocation.  So if both the PCI core services as well as the driver
use MSI-X, there's no problem.

For MSI, one approach might be to reserve a certain number of vectors
in the core for later use by the driver.

Thanks,

Lukas