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From: Dapeng Mi <dapeng1.mi@linux.intel.com>
To: Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Namhyung Kim <namhyung@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Jiri Olsa <jolsa@kernel.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Andi Kleen <ak@linux.intel.com>,
	Eranian Stephane <eranian@google.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	broonie@kernel.org, Ravi Bangoria <ravi.bangoria@amd.com>,
	linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
	Zide Chen <zide.chen@intel.com>,
	Falcon Thomas <thomas.falcon@intel.com>,
	Dapeng Mi <dapeng1.mi@intel.com>,
	Xudong Hao <xudong.hao@intel.com>,
	Dapeng Mi <dapeng1.mi@linux.intel.com>
Subject: [Patch v9 24/24] perf/x86/intel: Add sanity check for PEBS fragment size
Date: Mon,  6 Jul 2026 09:54:39 +0800	[thread overview]
Message-ID: <20260706015439.3040804-25-dapeng1.mi@linux.intel.com> (raw)
In-Reply-To: <20260706015439.3040804-1-dapeng1.mi@linux.intel.com>

Prevent potential infinite loops by adding a sanity check for the
corrupted PEBS fragment sizes which could happen in theory.

If a corrupted PEBS fragment is detected, the entire PEBS record
including the corrupted fragment and all subsequent records will be
dropped and a NULL PEBS record is reported to user space. This ensures
the integrity of PEBS data and prevents infinite loops in
setup_arch_pebs_sample_data() again.

Please note software has no way to figure out which events are impacted
by the corrupted record, so the last record of each event would be
discarded for all events if corrupted record is detected even though
it may be a well-formed record for some events.

Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
---
 arch/x86/events/intel/core.c |  2 +-
 arch/x86/events/intel/ds.c   | 70 ++++++++++++++++++++++++++----------
 2 files changed, 52 insertions(+), 20 deletions(-)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index a2d08f405a57..7fb0b53ed8b4 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3797,7 +3797,7 @@ static int x86_pmu_handle_guest_pebs(struct pt_regs *regs,
 
 static int handle_pmi_common(struct pt_regs *regs, u64 status)
 {
-	struct perf_sample_data data;
+	struct perf_sample_data data = {};
 	struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
 	int bit;
 	int handled = 0;
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index b38aed4f62b4..7a8e61905539 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -1242,7 +1242,7 @@ int intel_pmu_drain_bts_buffer(void)
 
 void intel_pmu_drain_pebs_buffer(void)
 {
-	struct perf_sample_data data;
+	struct perf_sample_data data = {};
 
 	static_call(x86_pmu_drain_pebs)(NULL, &data);
 }
@@ -2659,6 +2659,9 @@ static void setup_arch_pebs_sample_data(struct perf_event *event,
 
 again:
 	header = at;
+	if (!header->size)
+		return;
+
 	next_record = at + sizeof(struct arch_pebs_header);
 	if (header->basic) {
 		struct arch_pebs_basic *basic = next_record;
@@ -2940,13 +2943,21 @@ __intel_pmu_pebs_last_event(struct perf_event *event,
 			    struct pt_regs *iregs,
 			    struct pt_regs *regs,
 			    struct perf_sample_data *data,
-			    void *at,
-			    int count,
+			    void *at, int count, bool corrupted,
 			    setup_fn setup_sample)
 {
 	struct hw_perf_event *hwc = &event->hw;
 
-	setup_sample(event, iregs, at, data, regs);
+	/* Skip parsing corrupted PEBS record. */
+	if (corrupted) {
+		/* Clear stale register states in previous records. */
+		memset(regs, 0, sizeof(*regs));
+		x86_pmu_clear_perf_regs(regs);
+		perf_sample_data_init(data, 0, event->hw.last_period);
+	} else {
+		setup_sample(event, iregs, at, data, regs);
+	}
+
 	if (iregs == &dummy_iregs) {
 		/*
 		 * The PEBS records may be drained in the non-overflow context,
@@ -2964,12 +2975,16 @@ __intel_pmu_pebs_last_event(struct perf_event *event,
 	}
 
 	if (hwc->flags & PERF_X86_EVENT_AUTO_RELOAD) {
-		if ((is_pebs_counter_event_group(event))) {
-			/*
-			 * The value of each sample has been updated when setup
-			 * the corresponding sample data.
-			 */
-			perf_event_update_userpage(event);
+		if (is_pebs_counter_event_group(event)) {
+			if (corrupted) {
+				intel_pmu_save_and_restart_reload(event, 1);
+			} else {
+				/*
+				 * The value of each sample has been updated
+				 * when setup the corresponding sample data.
+				 */
+				perf_event_update_userpage(event);
+			}
 		} else {
 			/*
 			 * Now, auto-reload is only enabled in fixed period mode.
@@ -2993,7 +3008,7 @@ __intel_pmu_pebs_last_event(struct perf_event *event,
 		 * counters-snapshotting record, only needs to set the new
 		 * period for the counter.
 		 */
-		if (is_pebs_counter_event_group(event))
+		if (is_pebs_counter_event_group(event) && !corrupted)
 			static_call(x86_pmu_set_period)(event);
 		else
 			intel_pmu_save_and_restart(event);
@@ -3022,13 +3037,15 @@ __intel_pmu_pebs_events(struct perf_event *event,
 		iregs = &dummy_iregs;
 
 	while (cnt > 1) {
-		__intel_pmu_pebs_event(event, iregs, regs, data, at, setup_sample);
+		__intel_pmu_pebs_event(event, iregs, regs, data,
+				       at, setup_sample);
 		at += cpuc->pebs_record_size;
 		at = get_next_pebs_record_by_bit(at, top, bit);
 		cnt--;
 	}
 
-	__intel_pmu_pebs_last_event(event, iregs, regs, data, at, count, setup_sample);
+	__intel_pmu_pebs_last_event(event, iregs, regs, data, at,
+				    count, false, setup_sample);
 }
 
 static int intel_pmu_drain_pebs_core(struct pt_regs *iregs, struct perf_sample_data *data)
@@ -3244,7 +3261,8 @@ static __always_inline void
 __intel_pmu_handle_last_pebs_record(struct pt_regs *iregs,
 				    struct pt_regs *regs,
 				    struct perf_sample_data *data,
-				    u64 mask, short *counts, void **last,
+				    u64 mask, short *counts,
+				    void **last, bool corrupted,
 				    setup_fn setup_sample)
 {
 	struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
@@ -3258,7 +3276,7 @@ __intel_pmu_handle_last_pebs_record(struct pt_regs *iregs,
 		event = cpuc->events[bit];
 
 		__intel_pmu_pebs_last_event(event, iregs, regs, data, last[bit],
-					    counts[bit], setup_sample);
+					    counts[bit], corrupted, setup_sample);
 	}
 
 }
@@ -3301,6 +3319,8 @@ static int intel_pmu_drain_pebs_icl(struct pt_regs *iregs, struct perf_sample_da
 		u64 pebs_status;
 
 		basic = at;
+		if (WARN_ON_ONCE(!basic->format_size))
+			break;
 		if (basic->format_size != cpuc->pebs_record_size)
 			continue;
 
@@ -3312,7 +3332,7 @@ static int intel_pmu_drain_pebs_icl(struct pt_regs *iregs, struct perf_sample_da
 	}
 
 	__intel_pmu_handle_last_pebs_record(iregs, regs, data, mask, counts, last,
-					    setup_pebs_adaptive_sample_data);
+					    false, setup_pebs_adaptive_sample_data);
 
 	return hweight64(events_bitmap);
 }
@@ -3328,6 +3348,7 @@ static int intel_pmu_drain_arch_pebs(struct pt_regs *iregs,
 	struct pt_regs *regs = &perf_regs->regs;
 	void *base, *at, *top;
 	u64 events_bitmap = 0;
+	bool corrupted = false;
 	u64 mask;
 
 	rdmsrq(MSR_IA32_PEBS_INDEX, index.whole);
@@ -3362,8 +3383,10 @@ static int intel_pmu_drain_arch_pebs(struct pt_regs *iregs,
 
 		header = at;
 
-		if (WARN_ON_ONCE(!header->size))
-			break;
+		if (WARN_ON_ONCE(!header->size)) {
+			corrupted = true;
+			goto done;
+		}
 
 		/* 1st fragment or single record must have basic group */
 		if (!header->basic) {
@@ -3383,15 +3406,24 @@ static int intel_pmu_drain_arch_pebs(struct pt_regs *iregs,
 			if (!header->size)
 				break;
 			at += header->size;
+			if (WARN_ON_ONCE(at >= top)) {
+				corrupted = true;
+				goto done;
+			}
 			header = at;
 		}
 
 		/* Skip last fragment or the single record */
 		at += header->size;
+		if (WARN_ON_ONCE(at > top)) {
+			corrupted = true;
+			goto done;
+		}
 	}
 
+done:
 	__intel_pmu_handle_last_pebs_record(iregs, regs, data, mask,
-					    counts, last,
+					    counts, last, corrupted,
 					    setup_arch_pebs_sample_data);
 
 	return hweight64(events_bitmap);
-- 
2.34.1


  parent reply	other threads:[~2026-07-06  2:03 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-06  1:54 [Patch v9 00/24] Support SIMD/eGPRs/SSP registers sampling for perf Dapeng Mi
2026-07-06  1:54 ` [Patch v9 01/24] perf/x86: Fix two error-path and hybrid PMU guard issues Dapeng Mi
2026-07-06  2:21   ` sashiko-bot
2026-07-06  8:05     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 02/24] perf/x86: Move hybrid PMU initialization before x86_pmu_starting_cpu() Dapeng Mi
2026-07-06  2:18   ` sashiko-bot
2026-07-06  8:33     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 03/24] perf/x86/intel: Enable large PEBS sampling for XMMs Dapeng Mi
2026-07-06  1:54 ` [Patch v9 04/24] perf/x86/intel: Convert x86_perf_regs to per-cpu variables Dapeng Mi
2026-07-06  1:54 ` [Patch v9 05/24] perf: Eliminate duplicate arch-specific function definitions Dapeng Mi
2026-07-06  1:54 ` [Patch v9 06/24] perf/x86: Use x86_perf_regs in NMI handlers Dapeng Mi
2026-07-06  2:31   ` sashiko-bot
2026-07-06  8:43     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 07/24] x86/fpu/xstate: Add xsaves_nmi() helper Dapeng Mi
2026-07-06  2:18   ` sashiko-bot
2026-07-06  9:09     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 08/24] x86/fpu: Add update_fpu_state_and_flag() helper Dapeng Mi
2026-07-06  2:22   ` sashiko-bot
2026-07-06  9:15     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 09/24] perf: Move and enhance has_extended_regs() for arch-specific use Dapeng Mi
2026-07-06  1:54 ` [Patch v9 10/24] perf/x86/intel: Consolidate PMU capability updates Dapeng Mi
2026-07-06  1:54 ` [Patch v9 11/24] perf/x86: Enable XMM register sampling for non-PEBS events Dapeng Mi
2026-07-06  2:34   ` sashiko-bot
2026-07-06  9:47     ` Mi, Dapeng
2026-07-06  1:54 ` [Patch v9 12/24] perf/x86: Enable XMM register sampling for REGS_USER case Dapeng Mi
2026-07-06  2:35   ` sashiko-bot
2026-07-06  1:54 ` [Patch v9 13/24] perf: Add sampling support for SIMD registers Dapeng Mi
2026-07-06  2:34   ` sashiko-bot
2026-07-06  1:54 ` [Patch v9 14/24] perf/x86: Support XMM sampling using sample_simd_vec_reg_* fields Dapeng Mi
2026-07-06  6:45   ` sashiko-bot
2026-07-06  1:54 ` [Patch v9 15/24] perf/x86: Support YMM " Dapeng Mi
2026-07-06  1:54 ` [Patch v9 16/24] perf/x86: Support ZMM " Dapeng Mi
2026-07-06  1:54 ` [Patch v9 17/24] perf/x86: Support OPMASK sampling using sample_simd_pred_reg_* fields Dapeng Mi
2026-07-06  1:54 ` [Patch v9 18/24] perf: Enhance perf_reg_validate() with simd_enabled argument Dapeng Mi
2026-07-06  1:54 ` [Patch v9 19/24] perf/x86: Support eGPRs sampling using sample_regs_* fields Dapeng Mi
2026-07-06  1:54 ` [Patch v9 20/24] perf/x86: Support SSP " Dapeng Mi
2026-07-06  1:54 ` [Patch v9 21/24] perf/x86/intel: Support arch-PEBS based SIMD/eGPRs/SSP sampling Dapeng Mi
2026-07-06  1:54 ` [Patch v9 22/24] perf/x86/intel: Enable PERF_PMU_CAP_SIMD_REGS capability Dapeng Mi
2026-07-06  2:57   ` sashiko-bot
2026-07-06  1:54 ` [Patch v9 23/24] perf/x86: Activate back-to-back NMI detection for arch-PEBS induced NMIs Dapeng Mi
2026-07-06  1:54 ` Dapeng Mi [this message]
2026-07-06  5:04   ` [Patch v9 24/24] perf/x86/intel: Add sanity check for PEBS fragment size sashiko-bot

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