Re: [PATCH v3 00/14] perf c2c: add a function view

[Jiebin Sun <jiebin.sun@intel.com>]

Hi Namhyung,

Thanks a lot for the detailed suggestions -- agreed on both points, and I
wanted to get your thoughts on the reworked layout before sending the next
version.

> I think it's more like "code-address" view rather than "function" view.
> How about organizing the output something like below?
>
>   L1:  function
>   L2:  cache line
>   L3:  shared functions

You're right that keying level 1 on the code address made it read like a
"code-address view". I plan to rework it so every level that names a
function aggregates all of that function's code addresses into a single
entry, together with the per-level indentation you described.

For the lower levels I first tried the cacheline-then-functions layout you
suggested:

  L1: function
  L2: cache line
  L3: sharing functions

but on real data we hit one problem: when the level-1 function touches many
cache lines, the same contending function shows up under many of those
level-2 cache lines. To find out which function modifies the line the most
-- the one most worth fixing -- we then have to aggregate that function's
writes across all those cache lines ourselves, which is the same manual
work the cache line view already leaves to us.

So I am considering putting the contending function at level 2 and the
cache line at level 3 instead:

  L1: function            (reads the line and pays the HITM penalty)
  L2: contending function (writes/modifies the line, causing the HITM)
  L3: the shared cache lines

For example, expanding dequeue_pushable_task and its writers:

  Cycles  Store
       %  count  Function / Contending function / Cache line
  ------------------------------------------------------------
  - 16.54%   419  - [k] dequeue_pushable_task
             145      - [k] pull_rt_task
             145            0xff2d0082809da080
             139      - [k] enqueue_pushable_task
              70            0xff2d00a2071f9640
              69            0xff2d0082809da000
             133      - [k] cpupri_set
             133            0xff2d0082809da080

Here enqueue_pushable_task contends over two cache lines, but it stays a
single level-2 row with its total (139) shown, and the individual cache
lines are underneath -- so the top writers are ranked directly, with no
manual summing.

The key difference from the earlier version is that the code addresses and
function offsets are no longer shown at level 1 and level 2. Those made the
view read like a code-address view; instead the main view keeps only the
concise, at-a-glance information (which function pays, which function it
contends with, and the cache lines involved), and the detailed code
addresses / offsets stay in the per-cacheline detail view ('d').

Once we settle on the layout, I'll send the updated version for review.

Thanks,
Jiebin