From: sashiko-bot@kernel.org
To: "Zhanpeng Zhang" <zhangzhanpeng.jasper@bytedance.com>
Cc: linux-perf-users@vger.kernel.org
Subject: Re: [PATCH v10 RESEND 3/9] riscv: sse: mask events during shutdown and kexec
Date: Mon, 21 Sep 2026 11:30:31 +0000 [thread overview]
Message-ID: <20260921113032.0100D1F00898@smtp.kernel.org> (raw)
In-Reply-To: <03472b45125793a768f3e5bbc168f167e673d4cc.1789974241.git.zhangzhanpeng.jasper@bytedance.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] riscv: dead code in UP panic_smp_self_stop() misses early SSE mask
--
commit 7602c0f047088ef36df958ced3408ede048d0ce9
Author: Zhanpeng Zhang <zhangzhanpeng.jasper@bytedance.com>
riscv: sse: mask events during shutdown and kexec
This commit masks SSE events on the local hart before panic stop, CPU stop,
restart, poweroff, and crash shutdown paths to prevent firmware from entering
a Linux-owned handler state after the CPU or kernel context becomes invalid.
It also rejects normal kexec from a crash kernel to avoid transferring unknown
firmware state to the new kernel.
> diff --git a/arch/riscv/kernel/reset.c b/arch/riscv/kernel/reset.c
> index 14eb08a6db855..fdab37e7ae52d 100644
> --- a/arch/riscv/kernel/reset.c
> +++ b/arch/riscv/kernel/reset.c
> @@ -6,6 +6,20 @@
> #include <linux/efi.h>
> #include <linux/reboot.h>
> #include <linux/pm.h>
> +#include <linux/smp.h>
> +
> +#include <asm/sse.h>
> +
> +#ifndef CONFIG_SMP
> +void __noreturn panic_smp_self_stop(void)
> +{
> + riscv_sse_mask_current_hart();
> + local_irq_disable();
> +
> + for (;;)
> + cpu_relax();
> +}
> +#endif
[Severity: Low]
Is this panic_smp_self_stop() function reachable on UP systems?
When a kernel panic occurs on a UP system, the single CPU will always win the
panic_try_start() race and proceed as the primary panicking CPU. The primary
panicking CPU never calls panic_smp_self_stop().
Additionally, on UP systems, the smp_send_stop() and crash_smp_send_stop()
functions are inline no-ops, so the primary CPU does not mask its own SSE
early in the panic path. Although a follow-up patch (Patch 4) adds a panic
notifier that eventually masks the SSE before the final infinite loop, the UP
CPU remains unmasked during the early panic stages (such as stack trace
dumping), and this added UP code appears to be entirely dead.
--
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1789974241.git.zhangzhanpeng.jasper@bytedance.com?part=3
next prev parent reply other threads:[~2026-09-21 11:30 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-21 11:14 [PATCH v10 RESEND 0/9] riscv: add SBI Supervisor Software Events support Zhanpeng Zhang
2026-09-21 11:14 ` [PATCH v10 RESEND 1/9] riscv: add SBI SSE extension definitions Zhanpeng Zhang
2026-09-21 11:23 ` sashiko-bot
2026-09-21 11:14 ` [PATCH v10 RESEND 2/9] riscv: add support for SBI Supervisor Software Events extension Zhanpeng Zhang
2026-09-21 11:31 ` sashiko-bot
2026-09-21 11:15 ` [PATCH v10 RESEND 3/9] riscv: sse: mask events during shutdown and kexec Zhanpeng Zhang
2026-09-21 11:30 ` sashiko-bot [this message]
2026-09-21 11:15 ` [PATCH v10 RESEND 4/9] drivers: firmware: add riscv SSE support Zhanpeng Zhang
2026-09-21 11:34 ` sashiko-bot
2026-09-21 11:15 ` [PATCH v10 RESEND 5/9] riscv: mm: avoid enabling interrupts for nofault page faults Zhanpeng Zhang
2026-09-21 11:28 ` sashiko-bot
2026-09-21 11:15 ` [PATCH v10 RESEND 6/9] perf: RISC-V: support callchains with SSE delivery Zhanpeng Zhang
2026-09-21 11:36 ` sashiko-bot
2026-09-21 11:15 ` [PATCH v10 RESEND 7/9] perf: RISC-V: add support for SSE event Zhanpeng Zhang
2026-09-21 11:33 ` sashiko-bot
2026-10-02 12:31 ` Conor Dooley
2026-09-21 11:15 ` [PATCH v10 RESEND 8/9] selftests/riscv: add SSE test module Zhanpeng Zhang
2026-09-21 11:32 ` sashiko-bot
2026-09-21 11:15 ` [PATCH v10 RESEND 9/9] selftests/riscv: add perf user-stack SSE copy regression test Zhanpeng Zhang
2026-09-21 11:25 ` sashiko-bot
2026-09-23 4:17 ` [PATCH v10 RESEND 0/9] riscv: add SBI Supervisor Software Events support Himanshu Chauhan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260921113032.0100D1F00898@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=linux-perf-users@vger.kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
--cc=zhangzhanpeng.jasper@bytedance.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox