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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
	Konrad Dybcio <konradybcio@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Marijn Suijten <marijn.suijten@somainline.org>,
	linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/6] dt-bindings: phy: qcom,qmp-pcie: Drop reset number constraints
Date: Mon, 3 Feb 2025 15:17:38 +0100	[thread overview]
Message-ID: <17b3c33c-d277-4a28-b6c8-4852d373b450@kernel.org> (raw)
In-Reply-To: <3ee057ab-927c-4eac-a933-a14a5849d66c@oss.qualcomm.com>

On 03/02/2025 14:03, Konrad Dybcio wrote:
> On 2.02.2025 3:35 PM, Krzysztof Kozlowski wrote:
>> On 01/02/2025 16:56, Konrad Dybcio wrote:
>>> On 27.01.2025 9:26 AM, Krzysztof Kozlowski wrote:
>>>> On Sat, Jan 25, 2025 at 04:31:18AM +0100, Konrad Dybcio wrote:
>>>>> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>>>>>
>>>>> (Almost?) all QMP PHYs come with both a "full reset" ("phy") and a
>>>>> "retain certain registers" one ("phy_nocsr").
>>>>>
>>>>> Drop the maxItems=1 constraint for resets and reset_names as we go
>>>>> ahead and straighten out the DT usage. After that's done (which
>>>>> will involve modifying some clock drivers etc.), we may set
>>>>> *min*Items to 2, bar some possible exceptions.
>>>>
>>>> You drop minItems now, so that's a bit confusing. If all devices have
>>>> two resets, just change in top-level resets the minItems -> 2 now and
>>>> mention that it does not affect the ABI, because Linux will support
>>>> missing reset and it describes the hardware more accurately.
>>>
>>> This will generate a ton of warnings and resolving them may take an
>>> additional cycle, as I'd need to get things merged through clk too,
>>> so I thought this is a good transitional solution
>>
>> I still don't understand why existing devices now get 1 reset, while
>> previously they had minItems:2.
> 
> Hm, right..
> 
> Would it make sense to just remove the else: branch?

Yes, I guess that's what you want to achieve here.

Best regards,
Krzysztof

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  reply	other threads:[~2025-02-03 14:19 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-25  3:31 [PATCH 0/6] X1P42100 DT and PCIe PHY bits Konrad Dybcio
2025-01-25  3:31 ` [PATCH 1/6] dt-bindings: phy: qcom,qmp-pcie: Add X1P42100 PCIe Gen4x4 PHY Konrad Dybcio
2025-01-27  8:24   ` Krzysztof Kozlowski
2025-01-25  3:31 ` [PATCH 2/6] dt-bindings: phy: qcom,qmp-pcie: Drop reset number constraints Konrad Dybcio
2025-01-27  8:26   ` Krzysztof Kozlowski
2025-02-01 15:56     ` Konrad Dybcio
2025-02-02 14:35       ` Krzysztof Kozlowski
2025-02-03 13:03         ` Konrad Dybcio
2025-02-03 14:17           ` Krzysztof Kozlowski [this message]
2025-01-25  3:31 ` [PATCH 3/6] phy: qcom: qmp-pcie: Add X1P42100 Gen4x4 PHY Konrad Dybcio
2025-01-25 17:30   ` Dmitry Baryshkov
2025-01-26  7:29     ` Manivannan Sadhasivam
2025-01-26 11:39       ` Dmitry Baryshkov
2025-01-26 16:32         ` Manivannan Sadhasivam
2025-01-26 21:43           ` Dmitry Baryshkov
2025-01-27  5:34             ` Manivannan Sadhasivam
2025-01-27 14:24               ` Dmitry Baryshkov
2025-01-25  3:31 ` [PATCH 4/6] arm64: dts: qcom: x1e80100: Wire up PCIe PHY NOCSR resets Konrad Dybcio
2025-01-25 17:32   ` Dmitry Baryshkov
2025-01-25  3:31 ` [PATCH 5/6] arm64: dts: qcom: Commonize X1 CRD DTSI Konrad Dybcio
2025-01-25  3:31 ` [PATCH 6/6] arm64: dts: qcom: Add X1P42100 SoC and CRD Konrad Dybcio
2025-01-29 18:10 ` [PATCH 0/6] X1P42100 DT and PCIe PHY bits Jens Glathe

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