Linux-PHY Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Konrad Dybcio <konrad.dybcio@somainline.org>,
	Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@ti.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
	linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org
Subject: [PATCH v1 00/28] phy: qcom-qmp: split register tables
Date: Tue,  5 Jul 2022 12:42:52 +0300	[thread overview]
Message-ID: <20220705094320.1313312-1-dmitry.baryshkov@linaro.org> (raw)

As discussed during sc8280xp PHY review, rework and split QMP register
tables. Create separate files for most of QMP register kinds. The only
things left are various DP registers, which will be handled separately.

Changes since RFC:
 - Rebased on top of phy/next

Dmitry Baryshkov (28):
  phy: qcom-qmp: fix the QSERDES_V5_COM_CMN_MODE register
  phy: qcom-qmp-ufs: remove spurious register write in the msm8996 table
  phy: qcom-qmp-combo,usb: add support for separate PCS_USB region
  phy: qcom-qmp-pcie: split pcs_misc region for ipq6018 pcie gen3
  phy: qcom-qmp: drop special QMP V2 PCIE gen3 defines
  phy: qcom-qmp: rename QMP V2 PCS registers
  phy: qcom-qmp: use QPHY_V4_PCS for ipq6018/ipq8074 PCIe gen3
  phy: qcom-qmp: move QSERDES registers to separate header
  phy: qcom-qmp: move QSERDES V3 registers to separate headers
  phy: qcom-qmp: move QSERDES V4 registers to separate headers
  phy: qcom-qmp: move QSERDES V5 registers to separate headers
  phy: qcom-qmp: move QSERDES PLL registers to separate header
  phy: qcom-qmp: move PCS V2 registers to separate header
  phy: qcom-qmp: move PCS V3 registers to separate headers
  phy: qcom-qmp: move PCS V4 registers to separate headers
  phy: qcom-qmp: move PCS V5 registers to separate headers
  phy: qcom-qmp: move PCIE QHP registers to separate header
  phy: qcom-qmp: split allegedly 4.20 and 5.20 TX/RX registers
  phy: qcom-qmp: split allegedly 4.20 and 5.20 PCS registers
  phy: qcom-qmp: split PCS_UFS V3 symbols to separate header
  phy: qcom-qmp: qserdes-com: add missing registers
  phy: qcom-qmp: qserdes-com-v3: add missing registers
  phy: qcom-qmp: qserdes-com-v4: add missing registers
  phy: qcom-qmp: qserdes-com-v5: add missing registers
  phy: qcom-qmp: pcs-v3: add missing registers
  phy: qcom-qmp: pcs-pcie-v4: add missing registers
  phy: qcom-qmp-usb: replace FLL layout writes for msm8996
  phy: qcom-qmp-usb: define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME register

 drivers/phy/qualcomm/phy-qcom-qmp-combo.c     |   57 +-
 .../phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c  |   34 +-
 drivers/phy/qualcomm/phy-qcom-qmp-pcie-qhp.h  |  123 ++
 drivers/phy/qualcomm/phy-qcom-qmp-pcie.c      |  267 ++--
 .../phy/qualcomm/phy-qcom-qmp-pcs-misc-v3.h   |   17 +
 .../phy/qualcomm/phy-qcom-qmp-pcs-pcie-v4.h   |   72 +
 .../qualcomm/phy-qcom-qmp-pcs-pcie-v4_20.h    |   17 +
 .../phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5.h   |   16 +
 .../qualcomm/phy-qcom-qmp-pcs-pcie-v5_20.h    |   17 +
 .../phy/qualcomm/phy-qcom-qmp-pcs-ufs-v3.h    |   18 +
 .../phy/qualcomm/phy-qcom-qmp-pcs-ufs-v4.h    |   31 +
 .../phy/qualcomm/phy-qcom-qmp-pcs-ufs-v5.h    |   27 +
 .../phy/qualcomm/phy-qcom-qmp-pcs-usb-v4.h    |   34 +
 .../phy/qualcomm/phy-qcom-qmp-pcs-usb-v5.h    |   36 +
 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v2.h    |   46 +
 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v3.h    |  145 ++
 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v4.h    |  135 ++
 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v4_20.h |   15 +
 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v5.h    |   17 +
 .../qualcomm/phy-qcom-qmp-qserdes-com-v3.h    |  111 ++
 .../qualcomm/phy-qcom-qmp-qserdes-com-v4.h    |  123 ++
 .../qualcomm/phy-qcom-qmp-qserdes-com-v5.h    |  124 ++
 .../phy/qualcomm/phy-qcom-qmp-qserdes-com.h   |  140 ++
 .../phy/qualcomm/phy-qcom-qmp-qserdes-pll.h   |   66 +
 .../qualcomm/phy-qcom-qmp-qserdes-txrx-v3.h   |   68 +
 .../qualcomm/phy-qcom-qmp-qserdes-txrx-v4.h   |  233 ++++
 .../phy-qcom-qmp-qserdes-txrx-v4_20.h         |   43 +
 .../qualcomm/phy-qcom-qmp-qserdes-txrx-v5.h   |  231 +++
 .../phy-qcom-qmp-qserdes-txrx-v5_20.h         |   60 +
 .../phy/qualcomm/phy-qcom-qmp-qserdes-txrx.h  |  205 +++
 drivers/phy/qualcomm/phy-qcom-qmp-ufs.c       |   45 +-
 drivers/phy/qualcomm/phy-qcom-qmp-usb.c       |  153 +-
 drivers/phy/qualcomm/phy-qcom-qmp.h           | 1242 +----------------
 33 files changed, 2488 insertions(+), 1480 deletions(-)
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcie-qhp.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v3.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v4.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v4_20.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5_20.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v3.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v4.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v5.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v4.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v5.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v2.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v3.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v4.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v4_20.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v5.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v3.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v4.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v5.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-pll.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v3.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v4.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v4_20.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v5.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v5_20.h
 create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx.h

-- 
2.35.1


-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

             reply	other threads:[~2022-07-05 10:45 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-05  9:42 Dmitry Baryshkov [this message]
2022-07-05  9:42 ` [PATCH v1 01/28] phy: qcom-qmp: fix the QSERDES_V5_COM_CMN_MODE register Dmitry Baryshkov
2022-07-05  9:42 ` [PATCH v1 02/28] phy: qcom-qmp-ufs: remove spurious register write in the msm8996 table Dmitry Baryshkov
2022-07-05  9:42 ` [PATCH v1 03/28] phy: qcom-qmp-combo,usb: add support for separate PCS_USB region Dmitry Baryshkov
2022-07-05  9:42 ` [PATCH v1 04/28] phy: qcom-qmp-pcie: split pcs_misc region for ipq6018 pcie gen3 Dmitry Baryshkov
2022-07-05  9:42 ` [PATCH v1 05/28] phy: qcom-qmp: drop special QMP V2 PCIE gen3 defines Dmitry Baryshkov
2022-07-05  9:42 ` [PATCH v1 06/28] phy: qcom-qmp: rename QMP V2 PCS registers Dmitry Baryshkov
2022-07-05  9:42 ` [PATCH v1 07/28] phy: qcom-qmp: use QPHY_V4_PCS for ipq6018/ipq8074 PCIe gen3 Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 08/28] phy: qcom-qmp: move QSERDES registers to separate header Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 09/28] phy: qcom-qmp: move QSERDES V3 registers to separate headers Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 10/28] phy: qcom-qmp: move QSERDES V4 " Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 11/28] phy: qcom-qmp: move QSERDES V5 " Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 12/28] phy: qcom-qmp: move QSERDES PLL registers to separate header Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 13/28] phy: qcom-qmp: move PCS V2 " Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 14/28] phy: qcom-qmp: move PCS V3 registers to separate headers Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 15/28] phy: qcom-qmp: move PCS V4 " Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 16/28] phy: qcom-qmp: move PCS V5 " Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 17/28] phy: qcom-qmp: move PCIE QHP registers to separate header Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 18/28] phy: qcom-qmp: split allegedly 4.20 and 5.20 TX/RX registers Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 19/28] phy: qcom-qmp: split allegedly 4.20 and 5.20 PCS registers Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 20/28] phy: qcom-qmp: split PCS_UFS V3 symbols to separate header Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 21/28] phy: qcom-qmp: qserdes-com: add missing registers Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 22/28] phy: qcom-qmp: qserdes-com-v3: " Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 23/28] phy: qcom-qmp: qserdes-com-v4: " Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 24/28] phy: qcom-qmp: qserdes-com-v5: " Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 25/28] phy: qcom-qmp: pcs-v3: " Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 26/28] phy: qcom-qmp: pcs-pcie-v4: " Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 27/28] phy: qcom-qmp-usb: replace FLL layout writes for msm8996 Dmitry Baryshkov
2022-07-05  9:43 ` [PATCH v1 28/28] phy: qcom-qmp-usb: define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME register Dmitry Baryshkov
2022-07-07  5:02 ` [PATCH v1 00/28] phy: qcom-qmp: split register tables Vinod Koul

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220705094320.1313312-1-dmitry.baryshkov@linaro.org \
    --to=dmitry.baryshkov@linaro.org \
    --cc=agross@kernel.org \
    --cc=bjorn.andersson@linaro.org \
    --cc=kishon@ti.com \
    --cc=konrad.dybcio@somainline.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-phy@lists.infradead.org \
    --cc=p.zabel@pengutronix.de \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox