From: Atish Patra <atishp@rivosinc.com>
To: linux-kernel@vger.kernel.org
Cc: Tsukasa OI <research_trasio@irq.a4lg.com>,
Heiko Stuebner <heiko@sntech.de>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@rivosinc.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Atish Patra <atishp@atishpatra.org>,
Damien Le Moal <damien.lemoal@wdc.com>,
devicetree@vger.kernel.org, Jisheng Zhang <jszhang@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
linux-riscv@lists.infradead.org,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Rob Herring <robh+dt@kernel.org>
Subject: [PATCH v6 3/6] RISC-V: Extract multi-letter extension names from "riscv, isa"
Date: Mon, 14 Mar 2022 13:38:42 -0700 [thread overview]
Message-ID: <20220314203845.832648-4-atishp@rivosinc.com> (raw)
In-Reply-To: <20220314203845.832648-1-atishp@rivosinc.com>
From: Tsukasa OI <research_trasio@irq.a4lg.com>
Currently, there is no usage for version numbers in extensions as
any ratified non base ISA extension will always at v1.0.
Extract the extension names in place for future parsing.
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Tsukasa OI <research_trasio@irq.a4lg.com>
[Improved commit text and comments]
Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
arch/riscv/kernel/cpufeature.c | 35 ++++++++++++++++++++++++++--------
1 file changed, 27 insertions(+), 8 deletions(-)
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index 72c5f6ef56b5..b0df7eff47f7 100644
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -124,8 +124,28 @@ void __init riscv_fill_hwcap(void)
ext_long = true;
/* Multi-letter extension must be delimited */
for (; *isa && *isa != '_'; ++isa)
- if (!islower(*isa) && !isdigit(*isa))
+ if (unlikely(!islower(*isa)
+ && !isdigit(*isa)))
ext_err = true;
+ /* Parse backwards */
+ ext_end = isa;
+ if (unlikely(ext_err))
+ break;
+ if (!isdigit(ext_end[-1]))
+ break;
+ /* Skip the minor version */
+ while (isdigit(*--ext_end))
+ ;
+ if (ext_end[0] != 'p'
+ || !isdigit(ext_end[-1])) {
+ /* Advance it to offset the pre-decrement */
+ ++ext_end;
+ break;
+ }
+ /* Skip the major version */
+ while (isdigit(*--ext_end))
+ ;
+ ++ext_end;
break;
default:
if (unlikely(!islower(*ext))) {
@@ -151,14 +171,13 @@ void __init riscv_fill_hwcap(void)
}
if (*isa != '_')
--isa;
- /*
- * TODO: Full version-aware handling including
- * multi-letter extensions will be added in-future.
- */
- if (ext_err || ext_long)
+
+ if (unlikely(ext_err))
continue;
- this_hwcap |= isa2hwcap[(unsigned char)(*ext)];
- this_isa |= (1UL << (*ext - 'a'));
+ if (!ext_long) {
+ this_hwcap |= isa2hwcap[(unsigned char)(*ext)];
+ this_isa |= (1UL << (*ext - 'a'));
+ }
}
/*
--
2.30.2
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next prev parent reply other threads:[~2022-03-14 20:39 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-14 20:38 [PATCH v6 0/6] Provide a fraemework for RISC-V ISA extensions Atish Patra
2022-03-14 20:38 ` [PATCH v6 1/6] RISC-V: Correctly print supported extensions Atish Patra
2022-03-18 3:41 ` Joe Perches
2022-03-14 20:38 ` [PATCH v6 2/6] RISC-V: Minimal parser for "riscv, isa" strings Atish Patra
2022-03-15 3:08 ` Anup Patel
2022-03-14 20:38 ` Atish Patra [this message]
2022-03-14 20:38 ` [PATCH v6 4/6] RISC-V: Implement multi-letter ISA extension probing framework Atish Patra
2022-03-15 3:09 ` Anup Patel
2022-03-14 20:38 ` [PATCH v6 5/6] RISC-V: Do no continue isa string parsing without correct XLEN Atish Patra
2022-03-15 3:09 ` Anup Patel
2022-03-14 20:38 ` [PATCH v6 6/6] RISC-V: Improve /proc/cpuinfo output for ISA extensions Atish Patra
2022-03-15 3:11 ` Anup Patel
2022-03-18 3:10 ` [PATCH v6 0/6] Provide a fraemework for RISC-V " Palmer Dabbelt
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