Re: [PATCH v4 1/4] memory: tegra: Group mc-err related registers

[Ketan Patil <ketanp@nvidia.com>]

On 18/12/25 22:21, Jon Hunter wrote:
>
> On 18/12/2025 16:17, Krzysztof Kozlowski wrote:
>> On 24/11/2025 18:35, Ketan Patil wrote:
>>> Group MC error related registers into a struct as they could have soc
>>> specific values.
>>
>> I do not understand the goal. The values already have "soc specific
>> values". Your commit msg should explain why you are doing this and based
>> on that explanation that's a no. There is no point in doing this.
> Krzysztof is correct. We need to state here that Tegra264 has 
> different register offsets that the existing devices and so in order 
> to add support for Tegra264 we need to first make this change.
>
> Although in patch 4/4 you add Tegra264, looking at this patch alone 
> the reviewer has no idea why we are doing this and it just looks like 
> churn.
Sure. I am updating the commit message in v5. These patches first create 
the base for Tegra264 and then 4th patch add actual changes for Tegra264.