[PATCH 14/22] usb: xhci: update PORTSC aggregate macros

[Niklas Neronin <niklas.neronin@linux.intel.com>]

PORTSC bit 24 is no longer reserved and is defined as Cold Attach
Status (CAS), a read-only field. Include it in 'XHCI_PORT_RO' and
remove it from the reserved mask.

PORTSC bit 31 is Warm Port Reset (WPR), used on USB 3 ports and
write-1-to-set. Include it in 'XHCI_PORT_RW1S'.

Signed-off-by: Niklas Neronin <niklas.neronin@linux.intel.com>
---
 drivers/usb/host/xhci-hub.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c
index c9f73054737d..48dda978d5a4 100644
--- a/drivers/usb/host/xhci-hub.c
+++ b/drivers/usb/host/xhci-hub.c
@@ -392,12 +392,12 @@ static unsigned int xhci_port_speed(int portsc)
 
 /*
  * These bits are Read Only (RO) and should be saved and written to the
- * registers: 0, 3, 10:13, 30
+ * registers: 0, 3, 10:13, 24, 30
  * connect status, over-current status, port speed, and device removable.
  * connect status and port speed are also sticky - meaning they're in
  * the AUX well and they aren't changed by a hot, warm, or cold reset.
  */
-#define	XHCI_PORT_RO	(PORT_CCS | PORT_OCA | PORT_SPEED_MASK | PORT_DR)
+#define	XHCI_PORT_RO	(PORT_CCS | PORT_OCA | PORT_SPEED_MASK | PORT_CAS | PORT_DR)
 /*
  * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
  * bits 5:8, 9, 14:15, 25, 26, 27
@@ -407,9 +407,9 @@ static unsigned int xhci_port_speed(int portsc)
 			 PORT_WDE | PORT_WOE)
 /*
  * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
- * bit 4 (port reset)
+ * bits 4, 31
  */
-#define	XHCI_PORT_RW1S	(PORT_PR)
+#define	XHCI_PORT_RW1S	(PORT_PR | PORT_WPR)
 /*
  * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
  * bits 1, 17, 18, 19, 20, 21, 22, 23
@@ -426,9 +426,9 @@ static unsigned int xhci_port_speed(int portsc)
 #define	XHCI_PORT_RW	(PORT_LWS)
 /*
  * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
- * bits 2, 24, 28:31
+ * bits 2, 28:31
  */
-#define	XHCI_PORT_RZ	((1<<2) | (1<<24) | (0xf<<28))
+#define	XHCI_PORT_RZ	((1<<2) | (0xf<<28))
 
 /**
  * xhci_port_state_to_neutral() - Clean up read portsc value back into writeable
-- 
2.50.1