* PPC440SPe: generating PCIe INTx
@ 2008-01-16 8:46 kannappan
0 siblings, 0 replies; only message in thread
From: kannappan @ 2008-01-16 8:46 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 867 bytes --]
Hello All,
I would like to know how to generate PCIe INTx interrupt from Legacy
PCIe EP in PPC440SPe.
Also, please clarify,
Page 741 of the user manual (PPC440SPe_UM2014_V1_26.pdf) write
Assert_INTx message to INT_ADDR[61:63].
Page 739, table 27-9, mentions, Assert_INTA by writing to Outbound GBIF
write channel 9, A[52:59]=0x20.
Whether the INT_ADDR is any addresses BAR3 / POM3 address?
What is the Assert_INTx value to be written to INT_ADDR[61:63]? How do
I correlate with the message code values given in PCI express system
architecture?
The message codes given in PCI express system architecture is as follows
INTx Messages
Message Code
Assert_INTA
0010 0000
Assert_INTB
0010 0001
Assert_INTC
0010 0010
Assert_INTD
0010 0011
Deassert_INTA
0010 0100
Deassert_INTB
0010 0101
Deassert_INTC
0010 0110
Deassert_INTD
0010 0111
Regards,
Kans.
[-- Attachment #2: Type: text/html, Size: 12516 bytes --]
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2008-01-16 9:13 UTC | newest]
Thread overview: (only message) (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2008-01-16 8:46 PPC440SPe: generating PCIe INTx kannappan
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox