The Linux Kernel Mailing List
 help / color / mirror / Atom feed
From: Kan Liang <kan.liang@intel.com>
To: a.p.zijlstra@chello.nl, eranian@google.com
Cc: linux-kernel@vger.kernel.org, mingo@redhat.com, paulus@samba.org,
	acme@kernel.org, jolsa@redhat.com, ak@linux.intel.com,
	Kan Liang <kan.liang@intel.com>
Subject: [PATCH V8 13/14] perf, x86: Discard zero length call entries in LBR call stack
Date: Thu,  6 Nov 2014 09:54:30 -0500	[thread overview]
Message-ID: <1415285671-16894-14-git-send-email-kan.liang@intel.com> (raw)
In-Reply-To: <1415285671-16894-1-git-send-email-kan.liang@intel.com>

From: Yan, Zheng <zheng.z.yan@intel.com>

"Zero length call" uses the attribute of the call instruction to push
the immediate instruction pointer on to the stack and then pops off
that address into a register. This is accomplished without any matching
return instruction. It confuses the hardware and make the recorded call
stack incorrect.

We can partially resolve this issue by: decode call instructions and
discard any zero length call entry in the LBR stack.

Signed-off-by: Yan, Zheng <zheng.z.yan@intel.com>
Signed-off-by: Kan Liang <kan.liang@intel.com>
---
 arch/x86/kernel/cpu/perf_event_intel_lbr.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
index 45a63a4..7ed04f8 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
@@ -94,7 +94,8 @@ enum {
 	X86_BR_ABORT		= 1 << 12,/* transaction abort */
 	X86_BR_IN_TX		= 1 << 13,/* in transaction */
 	X86_BR_NO_TX		= 1 << 14,/* not in transaction */
-	X86_BR_CALL_STACK	= 1 << 15,/* call stack */
+	X86_BR_ZERO_CALL	= 1 << 15,/* zero length call */
+	X86_BR_CALL_STACK	= 1 << 16,/* call stack */
 };
 
 #define X86_BR_PLM (X86_BR_USER | X86_BR_KERNEL)
@@ -111,13 +112,15 @@ enum {
 	 X86_BR_JMP	 |\
 	 X86_BR_IRQ	 |\
 	 X86_BR_ABORT	 |\
-	 X86_BR_IND_CALL)
+	 X86_BR_IND_CALL |\
+	 X86_BR_ZERO_CALL)
 
 #define X86_BR_ALL (X86_BR_PLM | X86_BR_ANY)
 
 #define X86_BR_ANY_CALL		 \
 	(X86_BR_CALL		|\
 	 X86_BR_IND_CALL	|\
+	 X86_BR_ZERO_CALL	|\
 	 X86_BR_SYSCALL		|\
 	 X86_BR_IRQ		|\
 	 X86_BR_INT)
@@ -689,6 +692,12 @@ static int branch_type(unsigned long from, unsigned long to, int abort)
 		ret = X86_BR_INT;
 		break;
 	case 0xe8: /* call near rel */
+		insn_get_immediate(&insn);
+		if (insn.immediate1.value == 0) {
+			/* zero length call */
+			ret = X86_BR_ZERO_CALL;
+			break;
+		}
 	case 0x9a: /* call far absolute */
 		ret = X86_BR_CALL;
 		break;
-- 
1.8.3.2


  parent reply	other threads:[~2014-11-06 15:10 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-06 14:54 [PATCH V8 00/14] perf, x86: Haswell LBR call stack support (kernel) Kan Liang
2014-11-06 14:54 ` [PATCH V8 01/14] perf, x86: Reduce lbr_sel_map size Kan Liang
2014-11-06 14:54 ` [PATCH V8 02/14] perf, core: introduce pmu context switch callback Kan Liang
2014-11-06 14:54 ` [PATCH V8 03/14] perf, x86: use context switch callback to flush LBR stack Kan Liang
2015-01-14 13:29   ` Peter Zijlstra
2015-01-14 14:16     ` Liang, Kan
2014-11-06 14:54 ` [PATCH V8 04/14] perf, x86: Basic Haswell LBR call stack support Kan Liang
2014-11-06 14:54 ` [PATCH V8 05/14] perf, core: pmu specific data for perf task context Kan Liang
2014-11-06 14:54 ` [PATCH V8 06/14] perf, core: always switch pmu specific data during context switch Kan Liang
2014-11-06 14:54 ` [PATCH V8 07/14] perf, x86: allocate space for storing LBR stack Kan Liang
2014-11-06 14:54 ` [PATCH V8 08/14] perf, x86: track number of events that use LBR callstack Kan Liang
2014-11-06 14:54 ` [PATCH V8 09/14] perf, x86: Save/resotre LBR stack during context switch Kan Liang
2014-11-06 14:54 ` [PATCH V8 10/14] perf, core: simplify need branch stack check Kan Liang
2014-11-06 14:54 ` [PATCH V8 11/14] perf, x86: re-organize code that implicitly enables LBR/PEBS Kan Liang
2014-11-06 14:54 ` [PATCH V8 12/14] perf, x86: disable FREEZE_LBRS_ON_PMI when LBR operates in callstack mode Kan Liang
2014-11-06 14:54 ` Kan Liang [this message]
2014-11-06 14:54 ` [PATCH V8 14/14] perf, x86: expose LBR callstack to user space tool Kan Liang
2014-11-10 10:13 ` [PATCH V8 00/14] perf, x86: Haswell LBR call stack support (kernel) Peter Zijlstra
2014-11-10 13:54   ` Liang, Kan
2014-11-10 14:03     ` Peter Zijlstra

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1415285671-16894-14-git-send-email-kan.liang@intel.com \
    --to=kan.liang@intel.com \
    --cc=a.p.zijlstra@chello.nl \
    --cc=acme@kernel.org \
    --cc=ak@linux.intel.com \
    --cc=eranian@google.com \
    --cc=jolsa@redhat.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mingo@redhat.com \
    --cc=paulus@samba.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox