From: Jiri Olsa <jolsa@redhat.com>
To: Stephane Eranian <eranian@google.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
"mingo@elte.hu" <mingo@elte.hu>,
"ak@linux.intel.com" <ak@linux.intel.com>,
Arnaldo Carvalho de Melo <acme@redhat.com>,
Namhyung Kim <namhyung.kim@lge.com>
Subject: Re: [PATCH v4 08/18] perf/x86: add memory profiling via PEBS Load Latency
Date: Mon, 7 Jan 2013 11:11:13 +0100 [thread overview]
Message-ID: <20130107101113.GB963@krava.brq.redhat.com> (raw)
In-Reply-To: <CABPqkBRkJtB+5C=gq=ngJE9hYxVkxE7s2-4UN+Ub+Y8_pf9x2A@mail.gmail.com>
On Sun, Jan 06, 2013 at 09:37:25PM +0100, Stephane Eranian wrote:
> On Sat, Jan 5, 2013 at 7:43 PM, Jiri Olsa <jolsa@redhat.com> wrote:
> > On Thu, Dec 20, 2012 at 04:41:38PM +0100, Stephane Eranian wrote:
> >> This patch adds support for memory profiling using the
> >> PEBS Load Latency facility.
> >>
> >> Load accesses are sampled by HW and the instruction
> >> address, data address, load latency, data source, tlb,
> >> locked information can be saved in the sampling buffer
> >> if using the PERF_SAMPLE_COST (for latency),
> >
> > PERF_SAMPLE_WEIGHT ?
> >
> No I switched to using Andi's PERF_SAMPLE_WEIGHT patch for this.
> So it's PERF_SAMPLE_COST now.
Is it? I dont see PERF_SAMPLE_COST being used in the code..
>
> >> PERF_SAMPLE_ADDR, PERF_SAMPLE_DSRC types.
> >>
> >> To enable PEBS Load Latency, users have to use the
> >> model specific event:
> >> - on NHM/WSM: MEM_INST_RETIRED:LATENCY_ABOVE_THRESHOLD
> >> - on SNB/IVB: MEM_TRANS_RETIRED:LATENCY_ABOVE_THRESHOLD
> >>
> >> To make things easier, this patch also exports a generic
> >> alias via sysfs: mem-loads. It export the right event
> >> encoding based on the host CPU and can be used directly
> >> by the perf tool.
> >>
> >> Loosely based on Intel's Lin Ming patch posted on LKML
> >> in July 2011.
> >>
> >> Signed-off-by: Stephane Eranian <eranian@google.com>
> >
> > SNIP
> >
> >> +/*
> >> + * Map PEBS Load Latency Data Source encodings to generic
> >> + * memory data source information
> >> + */
> >> +#define P(a, b) PERF_MEM_S(a, b)
> >> +#define OP_LH (P(OP, LOAD) | P(LVL, HIT))
> >> +#define SNOOP_NONE_MISS (P(SNOOP, NONE) | P(SNOOP, MISS))
> >> +
> >
> > I checked Intel SDM 'Table 18-13. Data Source Encoding for Load Latency Record'
> > and it seems to be different (below) at some points.. did you use another source?
> >
> Yeah, and the table is wrong in the SDM. What I have is correct and approved by
> Intel.
Is there any public link?
thanks,
jirka
next prev parent reply other threads:[~2013-01-07 10:11 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-12-20 15:41 [PATCH v4 00/18] perf: add memory access sampling support Stephane Eranian
2012-12-20 15:41 ` [PATCH v4 01/18] perf, x86: Support CPU specific sysfs events Stephane Eranian
2013-01-02 14:04 ` Jiri Olsa
2013-01-02 17:07 ` Stephane Eranian
2012-12-20 15:41 ` [PATCH v4 02/18] perf/x86: improve sysfs event mapping with event string Stephane Eranian
2013-01-02 14:05 ` Jiri Olsa
2012-12-20 15:41 ` [PATCH v4 03/18] perf/x86: add flags to event constraints Stephane Eranian
2012-12-20 15:41 ` [PATCH v4 04/18] perf, core: Add a concept of a weightened sample Stephane Eranian
2012-12-20 15:41 ` [PATCH v4 05/18] perf: add minimal support for PERF_SAMPLE_WEIGHT Stephane Eranian
2013-01-02 14:07 ` Jiri Olsa
2013-01-07 13:10 ` Stephane Eranian
2013-01-07 13:27 ` Jiri Olsa
2013-01-07 14:03 ` Stephane Eranian
2012-12-20 15:41 ` [PATCH v4 06/18] perf: add support for PERF_SAMPLE_ADDR in dump_sampple() Stephane Eranian
2012-12-20 15:41 ` [PATCH v4 07/18] perf: add generic memory sampling interface Stephane Eranian
2013-01-05 18:38 ` Jiri Olsa
2013-01-05 19:05 ` Jiri Olsa
2013-01-06 6:43 ` Andi Kleen
2012-12-20 15:41 ` [PATCH v4 08/18] perf/x86: add memory profiling via PEBS Load Latency Stephane Eranian
2013-01-05 18:43 ` Jiri Olsa
2013-01-06 20:37 ` Stephane Eranian
2013-01-07 10:11 ` Jiri Olsa [this message]
2013-01-07 12:34 ` Stephane Eranian
2012-12-20 15:41 ` [PATCH v4 09/18] perf/x86: export PEBS load latency threshold register to sysfs Stephane Eranian
2012-12-20 15:41 ` [PATCH v4 10/18] perf/x86: add support for PEBS Precise Store Stephane Eranian
2012-12-20 15:41 ` [PATCH v4 11/18] perf tools: add mem access sampling core support Stephane Eranian
2012-12-20 15:41 ` [PATCH v4 12/18] perf report: add support for mem access profiling Stephane Eranian
2012-12-20 15:41 ` [PATCH v4 13/18] perf record: " Stephane Eranian
2012-12-20 15:41 ` [PATCH v4 14/18] perf tools: add new mem command for memory " Stephane Eranian
2013-01-02 14:16 ` Jiri Olsa
2013-01-07 13:04 ` Stephane Eranian
2013-01-07 13:08 ` Jiri Olsa
2012-12-20 15:41 ` [PATCH v4 15/18] perf: add PERF_RECORD_MISC_MMAP_DATA to RECORD_MMAP Stephane Eranian
2012-12-20 15:41 ` [PATCH v4 16/18] perf tools: detect data vs. text mappings Stephane Eranian
2012-12-20 15:41 ` [PATCH v4 17/18] perf tools: Ignore ABS symbols when loading data maps Stephane Eranian
2012-12-20 15:41 ` [PATCH v4 18/18] perf tools: Fix output of symbol_daddr offset Stephane Eranian
2012-12-20 16:05 ` [PATCH v4 00/18] perf: add memory access sampling support Jiri Olsa
2012-12-20 16:07 ` Stephane Eranian
2012-12-20 16:12 ` Jiri Olsa
2012-12-20 16:44 ` Stephane Eranian
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20130107101113.GB963@krava.brq.redhat.com \
--to=jolsa@redhat.com \
--cc=acme@redhat.com \
--cc=ak@linux.intel.com \
--cc=eranian@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@elte.hu \
--cc=namhyung.kim@lge.com \
--cc=peterz@infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox