From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: <linux-kernel@vger.kernel.org>, <iommu@lists.linux.dev>,
<joro@8bytes.org>, <jgg@nvidia.com>
Cc: <yi.l.liu@intel.com>, <kevin.tian@intel.com>,
<nicolinc@nvidia.com>, <vasant.hegde@amd.com>,
<jon.grimm@amd.com>, <santosh.shukla@amd.com>,
<sairaj.arunkodilkar@amd.com>, <jay.chen@amd.com>,
<wvw@google.com>, <wnliu@google.com>, <dantuluris@google.com>,
<chriscli@google.com>, <kpsingh@google.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: [PATCH v3 17/22] iommu/amd: Introduce helper function for updating domain ID mapping table
Date: Mon, 29 Jun 2026 15:35:30 +0000 [thread overview]
Message-ID: <20260629153535.15775-18-suravee.suthikulpanit@amd.com> (raw)
In-Reply-To: <20260629153535.15775-1-suravee.suthikulpanit@amd.com>
AMD vIOMMU hardware uses the Domain ID mapping table to map Guest Domain ID
(GDomID) to Host Domain ID when it virtualises guest IOMMU commands.
It uses GID and GDomID to index into the table to look up host domain ID.
Linux IOMMU driver programs the table entry using VFCntlMMIO Guest Domain
Map Control Register.
Introduce amd_viommu_domain_id_update(), which is used to set the entry
when attaching the nested device. Clearing the entry is done during VM
destroy.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
drivers/iommu/amd/amd_viommu.h | 2 ++
drivers/iommu/amd/nested.c | 5 ++++
drivers/iommu/amd/viommu.c | 46 ++++++++++++++++++++++++++++++++++
3 files changed, 53 insertions(+)
diff --git a/drivers/iommu/amd/amd_viommu.h b/drivers/iommu/amd/amd_viommu.h
index 8b57717c22a6..b6fd5ffc3b82 100644
--- a/drivers/iommu/amd/amd_viommu.h
+++ b/drivers/iommu/amd/amd_viommu.h
@@ -18,6 +18,8 @@ int amd_viommu_init_one(struct amd_iommu *iommu, struct amd_iommu_viommu *viommu
void amd_viommu_uninit_one(struct amd_iommu *iommu, struct amd_iommu_viommu *viommu);
+int amd_viommu_domain_id_update(struct amd_iommu *iommu, u16 gid,
+ u16 hdom_id, u16 gdom_id);
#else
static inline int amd_viommu_init(struct amd_iommu *iommu)
diff --git a/drivers/iommu/amd/nested.c b/drivers/iommu/amd/nested.c
index 524362aed269..6fff9e67bdd8 100644
--- a/drivers/iommu/amd/nested.c
+++ b/drivers/iommu/amd/nested.c
@@ -10,6 +10,7 @@
#include <uapi/linux/iommufd.h>
#include "amd_iommu.h"
+#include "amd_viommu.h"
static const struct iommu_domain_ops nested_domain_ops;
@@ -245,6 +246,7 @@ static int nested_attach_device(struct iommu_domain *dom, struct device *dev,
struct iommu_domain *old)
{
struct dev_table_entry new = {0};
+ struct nested_domain *ndom = to_ndomain(dom);
struct iommu_dev_data *dev_data = dev_iommu_priv_get(dev);
struct amd_iommu *iommu = get_amd_iommu_from_dev_data(dev_data);
int ret = 0;
@@ -262,6 +264,9 @@ static int nested_attach_device(struct iommu_domain *dom, struct device *dev,
amd_iommu_update_dte(iommu, dev_data, &new);
+ ret = amd_viommu_domain_id_update(iommu, dev_data->gid,
+ ndom->gdom_info->hdom_id, ndom->gdom_id);
+
mutex_unlock(&dev_data->mutex);
return ret;
diff --git a/drivers/iommu/amd/viommu.c b/drivers/iommu/amd/viommu.c
index 27b17edb910e..9b471aadd5df 100644
--- a/drivers/iommu/amd/viommu.c
+++ b/drivers/iommu/amd/viommu.c
@@ -40,6 +40,8 @@
#define VIOMMU_DOMID_MAPPING_BASE 0x2000000000ULL
#define VIOMMU_DOMID_MAPPING_ENTRY_SIZE (1 << 19)
+#define VIOMMU_VFCTRL_GUEST_DID_MAP_CONTROL1_OFFSET 0x08
+
LIST_HEAD(viommu_devid_map);
static int viommu_init_pci_vsc(struct amd_iommu *iommu)
@@ -427,6 +429,22 @@ static void __maybe_unused free_private_vm_region(struct amd_iommu *iommu, u64 *
*entry = NULL;
}
+static void viommu_clear_mapping(struct amd_iommu *iommu,
+ struct amd_iommu_viommu *aviommu)
+{
+ int i;
+ u16 gid = aviommu->gid;
+
+ /*
+ * IOMMU hardware uses the domain ID mapping table to map gdom ID to hdom ID.
+ * If the mapping does not exist, the hardware would generate error in the event log.
+ * Therefore, initialize all gdom ID entries to map to parent domain ID to prevent
+ * unknown mapping scenario.
+ */
+ for (i = 0; i <= VIOMMU_MAX_GDOMID; i++)
+ amd_viommu_domain_id_update(iommu, gid, aviommu->parent->id, i);
+}
+
void amd_viommu_uninit_one(struct amd_iommu *iommu, struct amd_iommu_viommu *aviommu)
{
pr_debug("%s: gid=%u\n", __func__, aviommu->gid);
@@ -439,6 +457,7 @@ void amd_viommu_uninit_one(struct amd_iommu *iommu, struct amd_iommu_viommu *avi
VIOMMU_DOMID_MAPPING_BASE,
VIOMMU_DOMID_MAPPING_ENTRY_SIZE,
aviommu->gid);
+ viommu_clear_mapping(iommu, aviommu);
}
int amd_viommu_init_one(struct amd_iommu *iommu, struct amd_iommu_viommu *viommu)
@@ -459,8 +478,35 @@ int amd_viommu_init_one(struct amd_iommu *iommu, struct amd_iommu_viommu *viommu
if (ret)
goto err_out;
+ viommu_clear_mapping(iommu, viommu);
+
return 0;
err_out:
amd_viommu_uninit_one(iommu, viommu);
return -ENOMEM;
}
+
+/*
+ * Program the DomID via VFCTRL registers
+ * This function will be called during VM init via VFIO.
+ */
+
+ #define DOMID_ENTRY_GDOMID_MASK GENMASK_ULL(61, 46)
+ #define DOMID_ENTRY_HDOMID_MASK GENMASK_ULL(29, 14)
+ #define DOMID_ENTRY_VALID BIT_ULL(0)
+ #define DOMID_ENTRY_WRITE BIT_ULL(63)
+
+int amd_viommu_domain_id_update(struct amd_iommu *iommu, u16 gid,
+ u16 hdom_id, u16 gdom_id)
+{
+ u64 val;
+ u8 __iomem *vfctrl = VIOMMU_VFCTRL_MMIO_BASE(iommu, gid);
+
+ val = FIELD_PREP(DOMID_ENTRY_GDOMID_MASK, gdom_id) |
+ FIELD_PREP(DOMID_ENTRY_HDOMID_MASK, hdom_id) |
+ DOMID_ENTRY_WRITE | DOMID_ENTRY_VALID;
+
+ writeq(val, vfctrl + VIOMMU_VFCTRL_GUEST_DID_MAP_CONTROL1_OFFSET);
+ return 0;
+}
+EXPORT_SYMBOL(amd_viommu_domain_id_update);
--
2.34.1
next prev parent reply other threads:[~2026-06-29 15:42 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-29 15:35 [PATCH v3 00/22] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 01/22] iommu/amd: Make amd_iommu_completion_wait() non-static Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 02/22] iommu/amd: Introduce vIOMMU-specific events and event Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 03/22] iommu/amd: Detect and initialize AMD vIOMMU feature Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 04/22] iommu/amd: Introduce IOMMUFD vIOMMU support for AMD Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 05/22] iommu/amd: Allocate Guest IDs for IOMMUFD vIOMMU instances Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 06/22] iommu/amd: Map vIOMMU VF and VF Control MMIO BARs Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 07/22] iommu/amd: Add support for AMD vIOMMU VF MMIO region Suravee Suthikulpanit
2026-07-07 14:33 ` Jason Gunthorpe
2026-06-29 15:35 ` [PATCH v3 08/22] iommu/amd: Introduce Reset vMMIO Command Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 09/22] iommu/amd: Introduce and map vIOMMU private IPA region Suravee Suthikulpanit
2026-07-07 14:07 ` Jason Gunthorpe
2026-06-29 15:35 ` [PATCH v3 10/22] iommu/amd: Pass iommu to device_flush_dte() Suravee Suthikulpanit
2026-07-07 14:18 ` Jason Gunthorpe
2026-06-29 15:35 ` [PATCH v3 11/22] iommu/amd: Export amd_iommu_alloc_dev_data() helper Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 12/22] iommu/amd: Pass iommu and devid to amd_iommu_make_clear_dte() Suravee Suthikulpanit
2026-07-07 14:20 ` Jason Gunthorpe
2026-06-29 15:35 ` [PATCH v3 13/22] iommu/amd: Assign IOMMU Private Address domain to IOMMU Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 14/22] iommu/amd: Add per-VM private IPA alloc/map helpers Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 15/22] iommu/amd: Add helper functions to manage DevID / DomID mapping tables Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 16/22] iommu/amd: Introduce IOMMUFD vDevice support for AMD Suravee Suthikulpanit
2026-07-07 14:31 ` Jason Gunthorpe
2026-06-29 15:35 ` Suravee Suthikulpanit [this message]
2026-07-07 14:32 ` [PATCH v3 17/22] iommu/amd: Introduce helper function for updating domain ID mapping table Jason Gunthorpe
2026-06-29 15:35 ` [PATCH v3 18/22] iommu/amd: Introduce helper function for updating device " Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 19/22] iommu/amd: Add per-segment translate device ID pool Suravee Suthikulpanit
2026-07-07 14:36 ` Jason Gunthorpe
2026-06-29 15:35 ` [PATCH v3 20/22] iommu/amd: Reserve translate-device-id for PCI requestor aliases Suravee Suthikulpanit
2026-07-07 14:39 ` Jason Gunthorpe
2026-06-29 15:35 ` [PATCH v3 21/22] iommu/amd: Add translation DTE and VFctrl TransDevID helpers Suravee Suthikulpanit
2026-07-07 14:43 ` Jason Gunthorpe
2026-06-29 15:35 ` [PATCH v3 22/22] iommu/amd: Assign per-vIOMMU translate device ID Suravee Suthikulpanit
2026-07-07 14:45 ` [PATCH v3 00/22] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Jason Gunthorpe
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