[PATCH 0/2] arm64: sleep: two small compute_mpidr_hash cleanups

[PATCH 0/2] arm64: sleep: two small compute_mpidr_hash cleanups

[Bradley Morgan]

compute_mpidr_hash silently produces a wrong hash if its register
arguments overlap. Patch 1 turns that documented constraint into a
build time error. Patch 2 factors the MPIDR hash slot lookup, open
coded twice in the suspend and resume paths, into a shared macro so
both callers stay in sync. No functional change intended.

Bradley Morgan (2):
  arm64: sleep: assert compute_mpidr_hash registers are distinct
  arm64: sleep: dedup the sleep_save_stash slot lookup

 arch/arm64/kernel/sleep.S | 69 +++++++++++++++++++++++++--------------
 1 file changed, 44 insertions(+), 25 deletions(-)

-- 
2.53.0

[PATCH 1/2] arm64: sleep: assert compute_mpidr_hash registers are distinct

[Bradley Morgan]

Turn the documented register distinctness requirement into an error
at build time instead of silent corruption.

Signed-off-by: Bradley Morgan <include@grrlz.net>
---
 arch/arm64/kernel/sleep.S | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/kernel/sleep.S b/arch/arm64/kernel/sleep.S
index f093cdf71be1..e112b8537f10 100644
--- a/arch/arm64/kernel/sleep.S
+++ b/arch/arm64/kernel/sleep.S
@@ -35,8 +35,22 @@
  * Output register: dst
  * Note: input and output registers must be disjoint register sets
          (eg: a macro instance with mpidr = x1 and dst = x1 is invalid)
+         This is enforced at build time by the assertions below.
  */
+	.macro mpidr_hash_assert_distinct reg, regs:vararg
+	.irp	r, \regs
+	.ifc	\reg, \r
+	.error	"compute_mpidr_hash: register arguments must be distinct"
+	.endif
+	.endr
+	.endm
+
 	.macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask
+	/* \dst is written before any input is consumed */
+	mpidr_hash_assert_distinct \dst, \rs0, \rs1, \rs2, \rs3, \mpidr, \mask
+	/* \mpidr and \mask are clobbered while other inputs are still live */
+	mpidr_hash_assert_distinct \mpidr, \rs0, \rs1, \rs2, \rs3, \mask
+	mpidr_hash_assert_distinct \mask, \rs1, \rs2, \rs3
 	and	\mpidr, \mpidr, \mask		// mask out MPIDR bits
 	and	\dst, \mpidr, #0xff		// mask=aff0
 	lsr	\dst ,\dst, \rs0		// dst=aff0>>rs0
-- 
2.53.0

[PATCH 2/2] arm64: sleep: dedup the sleep_save_stash slot lookup

[Bradley Morgan]

Both __cpu_suspend_enter() and _cpu_resume() open code the same MPIDR
hash lookup. Factor it into a get_sleep_stash_slot macro.

Signed-off-by: Bradley Morgan <include@grrlz.net>
---
 arch/arm64/kernel/sleep.S | 55 +++++++++++++++++++++------------------
 1 file changed, 30 insertions(+), 25 deletions(-)

diff --git a/arch/arm64/kernel/sleep.S b/arch/arm64/kernel/sleep.S
index e112b8537f10..8820a131aef7 100644
--- a/arch/arm64/kernel/sleep.S
+++ b/arch/arm64/kernel/sleep.S
@@ -64,6 +64,31 @@
 	lsr	\mask ,\mask, \rs3
 	orr	\dst, \dst, \mask		// dst|=(aff3>>rs3)
 	.endm
+
+/*
+ * Compute the address of the current CPU's entry in sleep_save_stash,
+ * i.e. &sleep_save_stash[hash(MPIDR_EL1)].
+ *
+ * @slot: output register
+ *
+ * Clobbers: x2 - x8
+ */
+	.macro get_sleep_stash_slot slot
+	mpidr_hash_assert_distinct \slot, x2
+	mrs	x3, mpidr_el1
+	adr_l	x2, mpidr_hash
+	ldr	x8, [x2, #MPIDR_HASH_MASK]
+	/*
+	 * Following code relies on the struct mpidr_hash
+	 * members size.
+	 */
+	ldp	w4, w5, [x2, #MPIDR_HASH_SHIFTS]
+	ldp	w6, w7, [x2, #(MPIDR_HASH_SHIFTS + 8)]
+	compute_mpidr_hash x2, x4, x5, x6, x7, x3, x8
+	ldr_l	\slot, sleep_save_stash
+	add	\slot, \slot, x2, lsl #3
+	.endm
+
 /*
  * Save CPU state in the provided sleep_stack_data area, and publish its
  * location for cpu_resume()'s use in sleep_save_stash.
@@ -88,19 +113,8 @@ SYM_FUNC_START(__cpu_suspend_enter)
 	mov	x2, sp
 	str	x2, [x0, #SLEEP_STACK_DATA_SYSTEM_REGS + CPU_CTX_SP]
 
-	/* find the mpidr_hash */
-	ldr_l	x1, sleep_save_stash
-	mrs	x7, mpidr_el1
-	adr_l	x9, mpidr_hash
-	ldr	x10, [x9, #MPIDR_HASH_MASK]
-	/*
-	 * Following code relies on the struct mpidr_hash
-	 * members size.
-	 */
-	ldp	w3, w4, [x9, #MPIDR_HASH_SHIFTS]
-	ldp	w5, w6, [x9, #(MPIDR_HASH_SHIFTS + 8)]
-	compute_mpidr_hash x8, x3, x4, x5, x6, x7, x10
-	add	x1, x1, x8, lsl #3
+	/* find this CPU's slot in sleep_save_stash */
+	get_sleep_stash_slot x1
 
 	str	x0, [x1]
 	add	x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
@@ -131,18 +145,9 @@ SYM_FUNC_START(_cpu_resume)
 	mov	x0, x19
 	bl	finalise_el2
 
-	mrs	x1, mpidr_el1
-	adr_l	x8, mpidr_hash		// x8 = struct mpidr_hash virt address
-
-	/* retrieve mpidr_hash members to compute the hash */
-	ldr	x2, [x8, #MPIDR_HASH_MASK]
-	ldp	w3, w4, [x8, #MPIDR_HASH_SHIFTS]
-	ldp	w5, w6, [x8, #(MPIDR_HASH_SHIFTS + 8)]
-	compute_mpidr_hash x7, x3, x4, x5, x6, x1, x2
-
-	/* x7 contains hash index, let's use it to grab context pointer */
-	ldr_l	x0, sleep_save_stash
-	ldr	x0, [x0, x7, lsl #3]
+	/* grab this CPU's context pointer from sleep_save_stash */
+	get_sleep_stash_slot x0
+	ldr	x0, [x0]
 	add	x29, x0, #SLEEP_STACK_DATA_CALLEE_REGS
 	add	x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
 	/* load sp from context */
-- 
2.53.0