From: Linu Cherian <linu.cherian@arm.com>
To: Ryan Roberts <ryan.roberts@arm.com>
Cc: Will Deacon <will@kernel.org>, Ard Biesheuvel <ardb@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Oliver Upton <oliver.upton@linux.dev>,
Marc Zyngier <maz@kernel.org>, Dev Jain <dev.jain@arm.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 12/13] arm64: mm: Wrap flush_tlb_page() around ___flush_tlb_range()
Date: Wed, 7 Jan 2026 15:27:01 +0530 [thread overview]
Message-ID: <aV4t7YajY8omwVHf@a079125.arm.com> (raw)
In-Reply-To: <20251216144601.2106412-13-ryan.roberts@arm.com>
On Tue, Dec 16, 2025 at 02:45:57PM +0000, Ryan Roberts wrote:
> Flushing a page from the tlb is just a special case of flushing a range.
> So let's rework flush_tlb_page() so that it simply wraps
> ___flush_tlb_range(). While at it, let's also update the API to take the
> same flags that we use when flushing a range. This allows us to delete
> all the ugly "_nosync", "_local" and "_nonotify" variants.
>
> Thanks to constant folding, all of the complex looping and tlbi-by-range
> options get eliminated so that the generated code for flush_tlb_page()
> looks very similar to the previous version.
>
> Signed-off-by: Ryan Roberts <ryan.roberts@arm.com>
> ---
> arch/arm64/include/asm/pgtable.h | 6 +--
> arch/arm64/include/asm/tlbflush.h | 81 ++++++++++---------------------
> arch/arm64/mm/fault.c | 2 +-
> 3 files changed, 29 insertions(+), 60 deletions(-)
>
> diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
> index 736747fbc843..b96a7ca465a1 100644
> --- a/arch/arm64/include/asm/pgtable.h
> +++ b/arch/arm64/include/asm/pgtable.h
> @@ -136,10 +136,10 @@ static inline void arch_leave_lazy_mmu_mode(void)
> * entries exist.
> */
> #define flush_tlb_fix_spurious_fault(vma, address, ptep) \
> - local_flush_tlb_page_nonotify(vma, address)
> + __flush_tlb_page(vma, address, TLBF_NOBROADCAST | TLBF_NONOTIFY)
>
> #define flush_tlb_fix_spurious_fault_pmd(vma, address, pmdp) \
> - local_flush_tlb_page_nonotify(vma, address)
> + __flush_tlb_page(vma, address, TLBF_NOBROADCAST | TLBF_NONOTIFY)
>
> /*
> * ZERO_PAGE is a global shared page that is always zero: used
> @@ -1351,7 +1351,7 @@ static inline int __ptep_clear_flush_young(struct vm_area_struct *vma,
> * context-switch, which provides a DSB to complete the TLB
> * invalidation.
> */
> - flush_tlb_page_nosync(vma, address);
> + __flush_tlb_page(vma, address, TLBF_NOSYNC);
> }
>
> return young;
> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
> index ee747e66bbef..fa5aee990742 100644
> --- a/arch/arm64/include/asm/tlbflush.h
> +++ b/arch/arm64/include/asm/tlbflush.h
> @@ -256,10 +256,7 @@ static inline void __tlbi_level(tlbi_op op, u64 addr, u32 level)
> * unmapping pages from vmalloc/io space.
> *
> * flush_tlb_page(vma, addr)
> - * Invalidate a single user mapping for address 'addr' in the
> - * address space corresponding to 'vma->mm'. Note that this
> - * operation only invalidates a single, last-level page-table
> - * entry and therefore does not affect any walk-caches.
> + * Equivalent to __flush_tlb_page(..., flags=TLBF_NONE)
> *
> *
> * Next, we have some undocumented invalidation routines that you probably
> @@ -287,13 +284,14 @@ static inline void __tlbi_level(tlbi_op op, u64 addr, u32 level)
> * TLBF_NOSYNC (don't issue trailing dsb) and TLBF_NOBROADCAST
> * (only perform the invalidation for the local cpu).
> *
> - * local_flush_tlb_page(vma, addr)
> - * Local variant of flush_tlb_page(). Stale TLB entries may
> - * remain in remote CPUs.
> - *
> - * local_flush_tlb_page_nonotify(vma, addr)
> - * Same as local_flush_tlb_page() except MMU notifier will not be
> - * called.
> + * __flush_tlb_page(vma, addr, flags)
> + * Invalidate a single user mapping for address 'addr' in the
> + * address space corresponding to 'vma->mm'. Note that this
> + * operation only invalidates a single, last-level page-table entry
> + * and therefore does not affect any walk-caches. flags may contain
> + * any combination of TLBF_NONOTIFY (don't call mmu notifiers),
> + * TLBF_NOSYNC (don't issue trailing dsb) and TLBF_NOBROADCAST
> + * (only perform the invalidation for the local cpu).
> *
> * Finally, take a look at asm/tlb.h to see how tlb_flush() is implemented
> * on top of these routines, since that is our interface to the mmu_gather
> @@ -327,51 +325,6 @@ static inline void flush_tlb_mm(struct mm_struct *mm)
> mmu_notifier_arch_invalidate_secondary_tlbs(mm, 0, -1UL);
> }
>
> -static inline void __local_flush_tlb_page_nonotify_nosync(struct mm_struct *mm,
> - unsigned long uaddr)
> -{
> - dsb(nshst);
> - __tlbi_level_asid(vale1, uaddr, TLBI_TTL_UNKNOWN, ASID(mm));
> -}
> -
> -static inline void local_flush_tlb_page_nonotify(struct vm_area_struct *vma,
> - unsigned long uaddr)
> -{
> - __local_flush_tlb_page_nonotify_nosync(vma->vm_mm, uaddr);
> - dsb(nsh);
> -}
> -
> -static inline void local_flush_tlb_page(struct vm_area_struct *vma,
> - unsigned long uaddr)
> -{
> - __local_flush_tlb_page_nonotify_nosync(vma->vm_mm, uaddr);
> - mmu_notifier_arch_invalidate_secondary_tlbs(vma->vm_mm, uaddr & PAGE_MASK,
> - (uaddr & PAGE_MASK) + PAGE_SIZE);
> - dsb(nsh);
> -}
> -
> -static inline void __flush_tlb_page_nosync(struct mm_struct *mm,
> - unsigned long uaddr)
> -{
> - dsb(ishst);
> - __tlbi_level_asid(vale1is, uaddr, TLBI_TTL_UNKNOWN, ASID(mm));
> - mmu_notifier_arch_invalidate_secondary_tlbs(mm, uaddr & PAGE_MASK,
> - (uaddr & PAGE_MASK) + PAGE_SIZE);
> -}
> -
> -static inline void flush_tlb_page_nosync(struct vm_area_struct *vma,
> - unsigned long uaddr)
> -{
> - return __flush_tlb_page_nosync(vma->vm_mm, uaddr);
> -}
> -
> -static inline void flush_tlb_page(struct vm_area_struct *vma,
> - unsigned long uaddr)
> -{
> - flush_tlb_page_nosync(vma, uaddr);
> - dsb(ish);
> -}
> -
> static inline bool arch_tlbbatch_should_defer(struct mm_struct *mm)
> {
> /*
> @@ -618,6 +571,22 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
> __flush_tlb_range(vma, start, end, PAGE_SIZE, TLBI_TTL_UNKNOWN, TLBF_NONE);
> }
>
> +static inline void __flush_tlb_page(struct vm_area_struct *vma,
> + unsigned long uaddr, tlbf_t flags)
> +{
> + unsigned long start = round_down(uaddr, PAGE_SIZE);
> + unsigned long end = start + PAGE_SIZE;
> +
> + ___flush_tlb_range(vma, start, end, PAGE_SIZE, TLBI_TTL_UNKNOWN,
> + TLBF_NOWALKCACHE | flags);
> +}
> +
> +static inline void flush_tlb_page(struct vm_area_struct *vma,
> + unsigned long uaddr)
> +{
> + __flush_tlb_page(vma, uaddr, TLBF_NONE);
> +}
> +
> static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end)
> {
> const unsigned long stride = PAGE_SIZE;
> diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
> index be9dab2c7d6a..f91aa686f142 100644
> --- a/arch/arm64/mm/fault.c
> +++ b/arch/arm64/mm/fault.c
> @@ -239,7 +239,7 @@ int __ptep_set_access_flags(struct vm_area_struct *vma,
> * flush_tlb_fix_spurious_fault().
> */
> if (dirty)
> - local_flush_tlb_page(vma, address);
> + __flush_tlb_page(vma, address, TLBF_NOBROADCAST);
> return 1;
> }
Reviewed-by: Linu Cherian <linu.cherian@arm.com>
next prev parent reply other threads:[~2026-01-07 9:57 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-16 14:45 [PATCH v1 00/13] arm64: Refactor TLB invalidation API and implementation Ryan Roberts
2025-12-16 14:45 ` [PATCH v1 01/13] arm64: mm: Re-implement the __tlbi_level macro as a C function Ryan Roberts
2025-12-16 17:53 ` Jonathan Cameron
2026-01-02 14:18 ` Ryan Roberts
2026-01-05 5:30 ` Linu Cherian
2026-01-05 17:09 ` Ryan Roberts
2025-12-16 14:45 ` [PATCH v1 02/13] arm64: mm: Introduce a C wrapper for by-range TLB invalidation Ryan Roberts
2026-01-05 5:33 ` Linu Cherian
2026-01-05 17:12 ` Ryan Roberts
2025-12-16 14:45 ` [PATCH v1 03/13] arm64: mm: Implicitly invalidate user ASID based on TLBI operation Ryan Roberts
2025-12-16 18:01 ` Jonathan Cameron
2026-01-02 14:20 ` Ryan Roberts
2025-12-18 6:30 ` Linu Cherian
2025-12-18 7:05 ` Linu Cherian
2025-12-18 15:47 ` Linu Cherian
2026-01-02 14:30 ` Ryan Roberts
2026-01-05 13:03 ` Linu Cherian
2026-01-05 5:34 ` Linu Cherian
2026-01-05 17:13 ` Ryan Roberts
2025-12-16 14:45 ` [PATCH v1 04/13] arm64: mm: Push __TLBI_VADDR() into __tlbi_level() Ryan Roberts
2026-01-05 5:35 ` Linu Cherian
2025-12-16 14:45 ` [PATCH v1 05/13] arm64: mm: Inline __TLBI_VADDR_RANGE() into __tlbi_range() Ryan Roberts
2026-01-05 5:35 ` Linu Cherian
2025-12-16 14:45 ` [PATCH v1 06/13] arm64: mm: Re-implement the __flush_tlb_range_op macro in C Ryan Roberts
2025-12-16 14:45 ` [PATCH v1 07/13] arm64: mm: Simplify __TLBI_RANGE_NUM() macro Ryan Roberts
2025-12-16 14:45 ` [PATCH v1 08/13] arm64: mm: Simplify __flush_tlb_range_limit_excess() Ryan Roberts
2025-12-17 8:12 ` Dev Jain
2026-01-02 15:23 ` Ryan Roberts
2025-12-16 14:45 ` [PATCH v1 09/13] arm64: mm: Refactor flush_tlb_page() to use __tlbi_level_asid() Ryan Roberts
2026-01-06 3:25 ` Linu Cherian
2025-12-16 14:45 ` [PATCH v1 10/13] arm64: mm: Refactor __flush_tlb_range() to take flags Ryan Roberts
2026-01-06 4:51 ` Linu Cherian
2025-12-16 14:45 ` [PATCH v1 11/13] arm64: mm: More flags for __flush_tlb_range() Ryan Roberts
2026-01-06 15:28 ` Linu Cherian
2026-01-12 11:52 ` Ryan Roberts
2026-01-07 3:21 ` Linu Cherian
2026-01-12 12:00 ` Ryan Roberts
2025-12-16 14:45 ` [PATCH v1 12/13] arm64: mm: Wrap flush_tlb_page() around ___flush_tlb_range() Ryan Roberts
2026-01-07 9:57 ` Linu Cherian [this message]
2025-12-16 14:45 ` [PATCH v1 13/13] arm64: mm: Provide level hint for flush_tlb_page() Ryan Roberts
2026-01-07 14:44 ` Linu Cherian
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