* [PATCH] arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical timer
@ 2024-06-04 8:59 Cong Zhang
2024-06-04 9:08 ` Krzysztof Kozlowski
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Cong Zhang @ 2024-06-04 8:59 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bartosz Golaszewski
Cc: Cong Zhang, linux-arm-msm, devicetree, linux-kernel, kernel
The INTID of EL2 non-secure physical timer is 26. In linux, the IRQ
number has a fixed 16 offset for PPIs. Therefore, the linux IRQ number
of EL2 non-secure physical timer should be 10 (26 - 16).
Fixes: 603f96d4c9d0 ("arm64: dts: qcom: add initial support for qcom sa8775p-ride")
Signed-off-by: Cong Zhang <quic_congzhan@quicinc.com>
---
ARM documentation for reference:
https://developer.arm.com/documentation/102379/0103/The-processor-timers/Summary-table
---
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 89496728d840..efd588fa2abb 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -4566,7 +4566,7 @@ arch_timer: timer {
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
};
pcie0: pcie@1c00000 {
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical timer
2024-06-04 8:59 [PATCH] arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical timer Cong Zhang
@ 2024-06-04 9:08 ` Krzysztof Kozlowski
2024-06-04 11:57 ` Konrad Dybcio
2024-06-04 20:11 ` Bjorn Andersson
2 siblings, 0 replies; 4+ messages in thread
From: Krzysztof Kozlowski @ 2024-06-04 9:08 UTC (permalink / raw)
To: Cong Zhang, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bartosz Golaszewski
Cc: linux-arm-msm, devicetree, linux-kernel, kernel
On 04/06/2024 10:59, Cong Zhang wrote:
> The INTID of EL2 non-secure physical timer is 26. In linux, the IRQ
> number has a fixed 16 offset for PPIs. Therefore, the linux IRQ number
> of EL2 non-secure physical timer should be 10 (26 - 16).
>
> Fixes: 603f96d4c9d0 ("arm64: dts: qcom: add initial support for qcom sa8775p-ride")
Please add Cc stable. See stable kernel guidelines.
> Signed-off-by: Cong Zhang <quic_congzhan@quicinc.com>
> ---
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical timer
2024-06-04 8:59 [PATCH] arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical timer Cong Zhang
2024-06-04 9:08 ` Krzysztof Kozlowski
@ 2024-06-04 11:57 ` Konrad Dybcio
2024-06-04 20:11 ` Bjorn Andersson
2 siblings, 0 replies; 4+ messages in thread
From: Konrad Dybcio @ 2024-06-04 11:57 UTC (permalink / raw)
To: Cong Zhang, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bartosz Golaszewski
Cc: linux-arm-msm, devicetree, linux-kernel, kernel
On 6/4/24 10:59, Cong Zhang wrote:
> The INTID of EL2 non-secure physical timer is 26. In linux, the IRQ
> number has a fixed 16 offset for PPIs. Therefore, the linux IRQ number
> of EL2 non-secure physical timer should be 10 (26 - 16).
>
> Fixes: 603f96d4c9d0 ("arm64: dts: qcom: add initial support for qcom sa8775p-ride")
> Signed-off-by: Cong Zhang <quic_congzhan@quicinc.com>
> ---
Seems to match other qcom platforms of the timeframe too..
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical timer
2024-06-04 8:59 [PATCH] arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical timer Cong Zhang
2024-06-04 9:08 ` Krzysztof Kozlowski
2024-06-04 11:57 ` Konrad Dybcio
@ 2024-06-04 20:11 ` Bjorn Andersson
2 siblings, 0 replies; 4+ messages in thread
From: Bjorn Andersson @ 2024-06-04 20:11 UTC (permalink / raw)
To: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bartosz Golaszewski, Cong Zhang
Cc: linux-arm-msm, devicetree, linux-kernel, kernel
On Tue, 04 Jun 2024 16:59:29 +0800, Cong Zhang wrote:
> The INTID of EL2 non-secure physical timer is 26. In linux, the IRQ
> number has a fixed 16 offset for PPIs. Therefore, the linux IRQ number
> of EL2 non-secure physical timer should be 10 (26 - 16).
>
>
Applied, thanks!
[1/1] arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical timer
commit: 41fca5930afb36453cc90d4002841edd9990d0ad
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
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2024-06-04 8:59 [PATCH] arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical timer Cong Zhang
2024-06-04 9:08 ` Krzysztof Kozlowski
2024-06-04 11:57 ` Konrad Dybcio
2024-06-04 20:11 ` Bjorn Andersson
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