Re: [PATCH net-next] bnx2x: reduce skb truesize by 50%

[Eric Dumazet <eric.dumazet@gmail.com>]

Le dimanche 13 novembre 2011 à 20:53 +0200, Eilon Greenstein a écrit :

> I’m not sure I’m following the math over here. Assuming L1 is 64 bytes,
> we need up to 63 bytes to align the start address (assuming SLOB is
> being used) and additional (up to) 63 bytes at the end. That can sum up
> to 126 bytes  am I missing something?
> 

What do you really mean by aligning the end ?

How can both start and end of a frame can be aligned ?

If hardware needs extra room after the end of frame, then we already
have it (since we store struct skb_shared_info here)



I ran following patch and everything is fine here

diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
index aec7212..ddc94cc 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h
@@ -1188,8 +1188,8 @@ struct bnx2x {
 	/* Max supported alignment is 256 (8 shift) */
 #define BNX2X_RX_ALIGN_SHIFT		((L1_CACHE_SHIFT < 8) ? \
 					 L1_CACHE_SHIFT : 8)
-	/* FW use 2 Cache lines Alignment for start packet and size  */
-#define BNX2X_FW_RX_ALIGN		(2 << BNX2X_RX_ALIGN_SHIFT)
+	/* FW use Cache line Alignment for start packet and size  */
+#define BNX2X_FW_RX_ALIGN		(1 << BNX2X_RX_ALIGN_SHIFT)
 #define BNX2X_PXP_DRAM_ALIGN		(BNX2X_RX_ALIGN_SHIFT - 5)
 
 	struct host_sp_status_block *def_status_blk;