* Re: [PATCH net-next v3 17/17] net: WireGuard secure network tunnel
From: kbuild test robot @ 2018-09-11 12:59 UTC (permalink / raw)
To: Jason A. Donenfeld
Cc: kbuild-all, linux-kernel, netdev, davem, gregkh,
Jason A. Donenfeld
In-Reply-To: <20180911010838.8818-19-Jason@zx2c4.com>
[-- Attachment #1: Type: text/plain, Size: 45354 bytes --]
Hi Jason,
I love your patch! Yet something to improve:
[auto build test ERROR on net-next/master]
url: https://github.com/0day-ci/linux/commits/Jason-A-Donenfeld/WireGuard-Secure-Network-Tunnel/20180911-185037
config: um-i386_defconfig (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=um SUBARCH=i386
All error/warnings (new ones prefixed by >>):
In file included from lib/zinc/chacha20/chacha20-x86_64-glue.h:8:0,
from <command-line>:0:
>> arch/x86/include/asm/cpufeature.h:134:34: warning: 'struct cpuinfo_x86' declared inside parameter list will not be visible outside of this definition or declaration
extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit);
^~~~~~~~~~~
In file included from include/linux/compiler_types.h:64:0,
from <command-line>:0:
arch/x86/include/asm/cpufeature.h: In function '_static_cpu_has':
>> arch/x86/include/asm/cpufeature.h:198:52: error: 'struct cpuinfo_um' has no member named 'x86_capability'
[cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3])
^
include/linux/compiler-gcc.h:182:47: note: in definition of macro 'asm_volatile_goto'
#define asm_volatile_goto(x...) do { asm goto(x); asm (""); } while (0)
^
In file included from lib/zinc/chacha20/chacha20-x86_64-glue.h:8:0,
from <command-line>:0:
lib/zinc/chacha20/chacha20-x86_64-glue.h: In function 'chacha20_fpu_init':
>> arch/x86/include/asm/cpufeature.h:65:28: error: 'REQUIRED_MASK0' undeclared (first use in this function); did you mean 'DISABLED_MASK0'?
( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \
^
arch/x86/include/asm/cpufeature.h:62:44: note: in definition of macro 'CHECK_BIT_IN_MASK_WORD'
(((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
^~~~~~~~
>> arch/x86/include/asm/cpufeature.h:111:32: note: in expansion of macro 'REQUIRED_MASK_BIT_SET'
(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
^~~~~~~~~~~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:129:27: note: in expansion of macro 'cpu_has'
#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
^~~~~~~
>> lib/zinc/chacha20/chacha20-x86_64-glue.h:36:23: note: in expansion of macro 'boot_cpu_has'
chacha20_use_ssse3 = boot_cpu_has(X86_FEATURE_SSSE3);
^~~~~~~~~~~~
arch/x86/include/asm/cpufeature.h:65:28: note: each undeclared identifier is reported only once for each function it appears in
( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \
^
arch/x86/include/asm/cpufeature.h:62:44: note: in definition of macro 'CHECK_BIT_IN_MASK_WORD'
(((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
^~~~~~~~
>> arch/x86/include/asm/cpufeature.h:111:32: note: in expansion of macro 'REQUIRED_MASK_BIT_SET'
(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
^~~~~~~~~~~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:129:27: note: in expansion of macro 'cpu_has'
#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
^~~~~~~
>> lib/zinc/chacha20/chacha20-x86_64-glue.h:36:23: note: in expansion of macro 'boot_cpu_has'
chacha20_use_ssse3 = boot_cpu_has(X86_FEATURE_SSSE3);
^~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:66:28: error: 'REQUIRED_MASK1' undeclared (first use in this function); did you mean 'REQUIRED_MASK0'?
CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 1, feature_bit) || \
^
arch/x86/include/asm/cpufeature.h:62:44: note: in definition of macro 'CHECK_BIT_IN_MASK_WORD'
(((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
^~~~~~~~
>> arch/x86/include/asm/cpufeature.h:111:32: note: in expansion of macro 'REQUIRED_MASK_BIT_SET'
(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
^~~~~~~~~~~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:129:27: note: in expansion of macro 'cpu_has'
#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
^~~~~~~
>> lib/zinc/chacha20/chacha20-x86_64-glue.h:36:23: note: in expansion of macro 'boot_cpu_has'
chacha20_use_ssse3 = boot_cpu_has(X86_FEATURE_SSSE3);
^~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:67:28: error: 'REQUIRED_MASK2' undeclared (first use in this function); did you mean 'REQUIRED_MASK1'?
CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 2, feature_bit) || \
^
arch/x86/include/asm/cpufeature.h:62:44: note: in definition of macro 'CHECK_BIT_IN_MASK_WORD'
(((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
^~~~~~~~
>> arch/x86/include/asm/cpufeature.h:111:32: note: in expansion of macro 'REQUIRED_MASK_BIT_SET'
(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
^~~~~~~~~~~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:129:27: note: in expansion of macro 'cpu_has'
#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
^~~~~~~
>> lib/zinc/chacha20/chacha20-x86_64-glue.h:36:23: note: in expansion of macro 'boot_cpu_has'
chacha20_use_ssse3 = boot_cpu_has(X86_FEATURE_SSSE3);
^~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:68:28: error: 'REQUIRED_MASK3' undeclared (first use in this function); did you mean 'REQUIRED_MASK2'?
CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 3, feature_bit) || \
^
arch/x86/include/asm/cpufeature.h:62:44: note: in definition of macro 'CHECK_BIT_IN_MASK_WORD'
(((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
^~~~~~~~
>> arch/x86/include/asm/cpufeature.h:111:32: note: in expansion of macro 'REQUIRED_MASK_BIT_SET'
(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
^~~~~~~~~~~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:129:27: note: in expansion of macro 'cpu_has'
#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
^~~~~~~
--
In file included from lib/zinc/poly1305/poly1305-x86_64-glue.h:7:0,
from <command-line>:0:
>> arch/x86/include/asm/cpufeature.h:134:34: warning: 'struct cpuinfo_x86' declared inside parameter list will not be visible outside of this definition or declaration
extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit);
^~~~~~~~~~~
In file included from include/linux/compiler_types.h:64:0,
from <command-line>:0:
arch/x86/include/asm/cpufeature.h: In function '_static_cpu_has':
>> arch/x86/include/asm/cpufeature.h:198:52: error: 'struct cpuinfo_um' has no member named 'x86_capability'
[cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3])
^
include/linux/compiler-gcc.h:182:47: note: in definition of macro 'asm_volatile_goto'
#define asm_volatile_goto(x...) do { asm goto(x); asm (""); } while (0)
^
In file included from lib/zinc/poly1305/poly1305-x86_64-glue.h:7:0,
from <command-line>:0:
lib/zinc/poly1305/poly1305-x86_64-glue.h: In function 'poly1305_fpu_init':
>> arch/x86/include/asm/cpufeature.h:65:28: error: 'REQUIRED_MASK0' undeclared (first use in this function); did you mean 'DISABLED_MASK0'?
( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \
^
arch/x86/include/asm/cpufeature.h:62:44: note: in definition of macro 'CHECK_BIT_IN_MASK_WORD'
(((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
^~~~~~~~
>> arch/x86/include/asm/cpufeature.h:111:32: note: in expansion of macro 'REQUIRED_MASK_BIT_SET'
(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
^~~~~~~~~~~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:129:27: note: in expansion of macro 'cpu_has'
#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
^~~~~~~
>> lib/zinc/poly1305/poly1305-x86_64-glue.h:39:3: note: in expansion of macro 'boot_cpu_has'
boot_cpu_has(X86_FEATURE_AVX) &&
^~~~~~~~~~~~
arch/x86/include/asm/cpufeature.h:65:28: note: each undeclared identifier is reported only once for each function it appears in
( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \
^
arch/x86/include/asm/cpufeature.h:62:44: note: in definition of macro 'CHECK_BIT_IN_MASK_WORD'
(((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
^~~~~~~~
>> arch/x86/include/asm/cpufeature.h:111:32: note: in expansion of macro 'REQUIRED_MASK_BIT_SET'
(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
^~~~~~~~~~~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:129:27: note: in expansion of macro 'cpu_has'
#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
^~~~~~~
>> lib/zinc/poly1305/poly1305-x86_64-glue.h:39:3: note: in expansion of macro 'boot_cpu_has'
boot_cpu_has(X86_FEATURE_AVX) &&
^~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:66:28: error: 'REQUIRED_MASK1' undeclared (first use in this function); did you mean 'REQUIRED_MASK0'?
CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 1, feature_bit) || \
^
arch/x86/include/asm/cpufeature.h:62:44: note: in definition of macro 'CHECK_BIT_IN_MASK_WORD'
(((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
^~~~~~~~
>> arch/x86/include/asm/cpufeature.h:111:32: note: in expansion of macro 'REQUIRED_MASK_BIT_SET'
(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
^~~~~~~~~~~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:129:27: note: in expansion of macro 'cpu_has'
#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
^~~~~~~
>> lib/zinc/poly1305/poly1305-x86_64-glue.h:39:3: note: in expansion of macro 'boot_cpu_has'
boot_cpu_has(X86_FEATURE_AVX) &&
^~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:67:28: error: 'REQUIRED_MASK2' undeclared (first use in this function); did you mean 'REQUIRED_MASK1'?
CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 2, feature_bit) || \
^
arch/x86/include/asm/cpufeature.h:62:44: note: in definition of macro 'CHECK_BIT_IN_MASK_WORD'
(((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
^~~~~~~~
>> arch/x86/include/asm/cpufeature.h:111:32: note: in expansion of macro 'REQUIRED_MASK_BIT_SET'
(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
^~~~~~~~~~~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:129:27: note: in expansion of macro 'cpu_has'
#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
^~~~~~~
>> lib/zinc/poly1305/poly1305-x86_64-glue.h:39:3: note: in expansion of macro 'boot_cpu_has'
boot_cpu_has(X86_FEATURE_AVX) &&
^~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:68:28: error: 'REQUIRED_MASK3' undeclared (first use in this function); did you mean 'REQUIRED_MASK2'?
CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 3, feature_bit) || \
^
arch/x86/include/asm/cpufeature.h:62:44: note: in definition of macro 'CHECK_BIT_IN_MASK_WORD'
(((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
^~~~~~~~
>> arch/x86/include/asm/cpufeature.h:111:32: note: in expansion of macro 'REQUIRED_MASK_BIT_SET'
(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
^~~~~~~~~~~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:129:27: note: in expansion of macro 'cpu_has'
#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
^~~~~~~
--
lib/zinc/poly1305/poly1305-x86_64.S: Assembler messages:
>> lib/zinc/poly1305/poly1305-x86_64.S:25: Error: bad register name `%rax'
lib/zinc/poly1305/poly1305-x86_64.S:26: Error: bad register name `%rax'
lib/zinc/poly1305/poly1305-x86_64.S:27: Error: bad register name `%rax'
lib/zinc/poly1305/poly1305-x86_64.S:28: Error: bad register name `%rax'
>> lib/zinc/poly1305/poly1305-x86_64.S:30: Error: bad register name `%rsi'
lib/zinc/poly1305/poly1305-x86_64.S:33: Error: bad register name `%rax'
>> lib/zinc/poly1305/poly1305-x86_64.S:34: Error: bad register name `%rcx'
>> lib/zinc/poly1305/poly1305-x86_64.S:35: Error: bad register name `%rsi)'
lib/zinc/poly1305/poly1305-x86_64.S:36: Error: bad register name `%rsi)'
lib/zinc/poly1305/poly1305-x86_64.S:37: Error: bad register name `%rax'
lib/zinc/poly1305/poly1305-x86_64.S:38: Error: bad register name `%rcx'
>> lib/zinc/poly1305/poly1305-x86_64.S:47: Error: bad register name `%rdx'
>> lib/zinc/poly1305/poly1305-x86_64.S:50: Error: bad register name `%rbx'
>> lib/zinc/poly1305/poly1305-x86_64.S:51: Error: bad register name `%r12'
>> lib/zinc/poly1305/poly1305-x86_64.S:52: Error: bad register name `%r13'
>> lib/zinc/poly1305/poly1305-x86_64.S:53: Error: bad register name `%r14'
>> lib/zinc/poly1305/poly1305-x86_64.S:54: Error: bad register name `%r15'
>> lib/zinc/poly1305/poly1305-x86_64.S:55: Error: bad register name `%rdi'
lib/zinc/poly1305/poly1305-x86_64.S:59: Error: bad register name `%rdx'
>> lib/zinc/poly1305/poly1305-x86_64.S:61: Error: bad register name `%rdi)'
lib/zinc/poly1305/poly1305-x86_64.S:62: Error: bad register name `%rdi)'
lib/zinc/poly1305/poly1305-x86_64.S:64: Error: bad register name `%rdi)'
lib/zinc/poly1305/poly1305-x86_64.S:65: Error: bad register name `%rdi)'
lib/zinc/poly1305/poly1305-x86_64.S:66: Error: bad register name `%rdi)'
lib/zinc/poly1305/poly1305-x86_64.S:68: Error: bad register name `%r13'
lib/zinc/poly1305/poly1305-x86_64.S:69: Error: bad register name `%r13'
lib/zinc/poly1305/poly1305-x86_64.S:70: Error: bad register name `%r12'
lib/zinc/poly1305/poly1305-x86_64.S:71: Error: bad register name `%r12'
lib/zinc/poly1305/poly1305-x86_64.S:77: Error: bad register name `%rsi)'
lib/zinc/poly1305/poly1305-x86_64.S:78: Error: bad register name `%rsi)'
lib/zinc/poly1305/poly1305-x86_64.S:79: Error: bad register name `%rsi)'
lib/zinc/poly1305/poly1305-x86_64.S:80: Error: bad register name `%rcx'
lib/zinc/poly1305/poly1305-x86_64.S:81: Error: bad register name `%r14'
lib/zinc/poly1305/poly1305-x86_64.S:82: Error: bad register name `%rax'
>> lib/zinc/poly1305/poly1305-x86_64.S:83: Error: bad register name `%r11'
lib/zinc/poly1305/poly1305-x86_64.S:84: Error: bad register name `%rdx'
lib/zinc/poly1305/poly1305-x86_64.S:86: Error: bad register name `%r14'
lib/zinc/poly1305/poly1305-x86_64.S:87: Error: bad register name `%rax'
lib/zinc/poly1305/poly1305-x86_64.S:88: Error: bad register name `%r11'
lib/zinc/poly1305/poly1305-x86_64.S:89: Error: bad register name `%rdx'
lib/zinc/poly1305/poly1305-x86_64.S:91: Error: bad register name `%rbx'
lib/zinc/poly1305/poly1305-x86_64.S:92: Error: bad register name `%rax'
lib/zinc/poly1305/poly1305-x86_64.S:93: Error: bad register name `%r13'
lib/zinc/poly1305/poly1305-x86_64.S:94: Error: bad register name `%rdx'
lib/zinc/poly1305/poly1305-x86_64.S:96: Error: bad register name `%rbx'
>> lib/zinc/poly1305/poly1305-x86_64.S:97: Error: bad register name `%r10'
lib/zinc/poly1305/poly1305-x86_64.S:98: Error: bad register name `%rax'
lib/zinc/poly1305/poly1305-x86_64.S:99: Error: bad register name `%rdx'
lib/zinc/poly1305/poly1305-x86_64.S:101: Error: bad register name `%r13'
lib/zinc/poly1305/poly1305-x86_64.S:102: Error: bad register name `%rbx'
>> lib/zinc/poly1305/poly1305-x86_64.S:103: Error: bad register name `%r8'
lib/zinc/poly1305/poly1305-x86_64.S:104: Error: bad register name `%rdi'
lib/zinc/poly1305/poly1305-x86_64.S:106: Error: bad register name `%r11'
>> lib/zinc/poly1305/poly1305-x86_64.S:107: Error: bad register name `%r9'
lib/zinc/poly1305/poly1305-x86_64.S:108: Error: bad register name `%rax'
lib/zinc/poly1305/poly1305-x86_64.S:109: Error: bad register name `%r10'
lib/zinc/poly1305/poly1305-x86_64.S:111: Error: bad register name `%rdi'
lib/zinc/poly1305/poly1305-x86_64.S:112: Error: bad register name `%rdi'
lib/zinc/poly1305/poly1305-x86_64.S:113: Error: bad register name `%rdi'
lib/zinc/poly1305/poly1305-x86_64.S:114: Error: bad register name `%r10'
lib/zinc/poly1305/poly1305-x86_64.S:115: Error: bad register name `%rdi'
lib/zinc/poly1305/poly1305-x86_64.S:116: Error: bad register name `%rax'
lib/zinc/poly1305/poly1305-x86_64.S:117: Error: bad register name `%rbx'
lib/zinc/poly1305/poly1305-x86_64.S:118: Error: bad register name `%r10'
lib/zinc/poly1305/poly1305-x86_64.S:120: Error: bad register name `%r12'
lib/zinc/poly1305/poly1305-x86_64.S:121: Error: bad register name `%r15'
>> lib/zinc/poly1305/poly1305-x86_64.S:124: Error: bad register name `%rsp)'
lib/zinc/poly1305/poly1305-x86_64.S:126: Error: bad register name `%r14'
lib/zinc/poly1305/poly1305-x86_64.S:127: Error: bad register name `%rbx'
lib/zinc/poly1305/poly1305-x86_64.S:128: Error: bad register name `%r10'
lib/zinc/poly1305/poly1305-x86_64.S:130: Error: bad register name `%rsp)'
lib/zinc/poly1305/poly1305-x86_64.S:131: Error: bad register name `%rsp)'
lib/zinc/poly1305/poly1305-x86_64.S:132: Error: bad register name `%rsp)'
lib/zinc/poly1305/poly1305-x86_64.S:133: Error: bad register name `%rsp)'
lib/zinc/poly1305/poly1305-x86_64.S:134: Error: bad register name `%rsp)'
lib/zinc/poly1305/poly1305-x86_64.S:135: Error: bad register name `%rsp)'
lib/zinc/poly1305/poly1305-x86_64.S:144: Error: bad register name `%rdi)'
lib/zinc/poly1305/poly1305-x86_64.S:145: Error: bad register name `%rdi)'
lib/zinc/poly1305/poly1305-x86_64.S:146: Error: bad register name `%rdi)'
lib/zinc/poly1305/poly1305-x86_64.S:148: Error: bad register name `%r8'
lib/zinc/poly1305/poly1305-x86_64.S:149: Error: bad register name `%r8'
lib/zinc/poly1305/poly1305-x86_64.S:150: Error: bad register name `%r9'
lib/zinc/poly1305/poly1305-x86_64.S:151: Error: bad register name `%r9'
lib/zinc/poly1305/poly1305-x86_64.S:152: Error: bad register name `%r10'
lib/zinc/poly1305/poly1305-x86_64.S:153: Error: bad register name `%r10'
lib/zinc/poly1305/poly1305-x86_64.S:154: Error: bad register name `%r8'
lib/zinc/poly1305/poly1305-x86_64.S:155: Error: bad register name `%r9'
>> lib/zinc/poly1305/poly1305-x86_64.S:157: Error: bad register name `%rdx)'
lib/zinc/poly1305/poly1305-x86_64.S:158: Error: bad register name `%rdx)'
lib/zinc/poly1305/poly1305-x86_64.S:159: Error: bad register name `%rax'
lib/zinc/poly1305/poly1305-x86_64.S:160: Error: bad register name `%rcx'
--
In file included from lib/zinc/curve25519/curve25519-x86_64-glue.h:8:0,
from <command-line>:0:
>> arch/x86/include/asm/cpufeature.h:134:34: warning: 'struct cpuinfo_x86' declared inside parameter list will not be visible outside of this definition or declaration
extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit);
^~~~~~~~~~~
In file included from include/linux/compiler_types.h:64:0,
from <command-line>:0:
arch/x86/include/asm/cpufeature.h: In function '_static_cpu_has':
>> arch/x86/include/asm/cpufeature.h:198:52: error: 'struct cpuinfo_um' has no member named 'x86_capability'
[cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3])
^
include/linux/compiler-gcc.h:182:47: note: in definition of macro 'asm_volatile_goto'
#define asm_volatile_goto(x...) do { asm goto(x); asm (""); } while (0)
^
In file included from lib/zinc/curve25519/curve25519-x86_64-glue.h:8:0,
from <command-line>:0:
lib/zinc/curve25519/curve25519-x86_64-glue.h: In function 'curve25519_fpu_init':
>> arch/x86/include/asm/cpufeature.h:65:28: error: 'REQUIRED_MASK0' undeclared (first use in this function); did you mean 'DISABLED_MASK0'?
( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \
^
arch/x86/include/asm/cpufeature.h:62:44: note: in definition of macro 'CHECK_BIT_IN_MASK_WORD'
(((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
^~~~~~~~
>> arch/x86/include/asm/cpufeature.h:111:32: note: in expansion of macro 'REQUIRED_MASK_BIT_SET'
(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
^~~~~~~~~~~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:129:27: note: in expansion of macro 'cpu_has'
#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
^~~~~~~
>> lib/zinc/curve25519/curve25519-x86_64-glue.h:18:24: note: in expansion of macro 'boot_cpu_has'
curve25519_use_bmi2 = boot_cpu_has(X86_FEATURE_BMI2);
^~~~~~~~~~~~
arch/x86/include/asm/cpufeature.h:65:28: note: each undeclared identifier is reported only once for each function it appears in
( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \
^
arch/x86/include/asm/cpufeature.h:62:44: note: in definition of macro 'CHECK_BIT_IN_MASK_WORD'
(((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
^~~~~~~~
>> arch/x86/include/asm/cpufeature.h:111:32: note: in expansion of macro 'REQUIRED_MASK_BIT_SET'
(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
^~~~~~~~~~~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:129:27: note: in expansion of macro 'cpu_has'
#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
^~~~~~~
>> lib/zinc/curve25519/curve25519-x86_64-glue.h:18:24: note: in expansion of macro 'boot_cpu_has'
curve25519_use_bmi2 = boot_cpu_has(X86_FEATURE_BMI2);
^~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:66:28: error: 'REQUIRED_MASK1' undeclared (first use in this function); did you mean 'REQUIRED_MASK0'?
CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 1, feature_bit) || \
^
arch/x86/include/asm/cpufeature.h:62:44: note: in definition of macro 'CHECK_BIT_IN_MASK_WORD'
(((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
^~~~~~~~
>> arch/x86/include/asm/cpufeature.h:111:32: note: in expansion of macro 'REQUIRED_MASK_BIT_SET'
(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
^~~~~~~~~~~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:129:27: note: in expansion of macro 'cpu_has'
#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
^~~~~~~
>> lib/zinc/curve25519/curve25519-x86_64-glue.h:18:24: note: in expansion of macro 'boot_cpu_has'
curve25519_use_bmi2 = boot_cpu_has(X86_FEATURE_BMI2);
^~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:67:28: error: 'REQUIRED_MASK2' undeclared (first use in this function); did you mean 'REQUIRED_MASK1'?
CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 2, feature_bit) || \
^
arch/x86/include/asm/cpufeature.h:62:44: note: in definition of macro 'CHECK_BIT_IN_MASK_WORD'
(((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
^~~~~~~~
>> arch/x86/include/asm/cpufeature.h:111:32: note: in expansion of macro 'REQUIRED_MASK_BIT_SET'
(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
^~~~~~~~~~~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:129:27: note: in expansion of macro 'cpu_has'
#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
^~~~~~~
>> lib/zinc/curve25519/curve25519-x86_64-glue.h:18:24: note: in expansion of macro 'boot_cpu_has'
curve25519_use_bmi2 = boot_cpu_has(X86_FEATURE_BMI2);
^~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:68:28: error: 'REQUIRED_MASK3' undeclared (first use in this function); did you mean 'REQUIRED_MASK2'?
CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 3, feature_bit) || \
^
arch/x86/include/asm/cpufeature.h:62:44: note: in definition of macro 'CHECK_BIT_IN_MASK_WORD'
(((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
^~~~~~~~
>> arch/x86/include/asm/cpufeature.h:111:32: note: in expansion of macro 'REQUIRED_MASK_BIT_SET'
(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
^~~~~~~~~~~~~~~~~~~~~
>> arch/x86/include/asm/cpufeature.h:129:27: note: in expansion of macro 'cpu_has'
#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
^~~~~~~
..
vim +198 arch/x86/include/asm/cpufeature.h
80a208bd arch/x86/include/asm/cpufeature.h Borislav Petkov 2014-06-24 50
0f8d2b92 include/asm-x86/cpufeature.h Ingo Molnar 2008-02-26 51 #define test_cpu_cap(c, bit) \
0f8d2b92 include/asm-x86/cpufeature.h Ingo Molnar 2008-02-26 @52 test_bit(bit, (unsigned long *)((c)->x86_capability))
0f8d2b92 include/asm-x86/cpufeature.h Ingo Molnar 2008-02-26 53
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 54 /*
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 55 * There are 32 bits/features in each mask word. The high bits
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 56 * (selected with (bit>>5) give us the word number and the low 5
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 57 * bits give us the bit/feature number inside the word.
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 58 * (1UL<<((bit)&31) gives us a mask for the feature_bit so we can
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 59 * see if it is set in the mask word.
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 60 */
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 61 #define CHECK_BIT_IN_MASK_WORD(maskname, word, bit) \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 62 (((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 63
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 64 #define REQUIRED_MASK_BIT_SET(feature_bit) \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @65 ( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @66 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 1, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @67 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 2, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @68 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 3, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @69 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 4, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @70 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 5, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @71 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 6, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @72 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 7, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @73 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 8, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @74 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 9, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @75 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 10, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @76 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 11, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @77 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 12, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @78 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 13, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @79 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 14, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @80 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 15, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @81 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 16, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @82 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 17, feature_bit) || \
95ca0ee8 arch/x86/include/asm/cpufeature.h David Woodhouse 2018-01-25 @83 CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 18, feature_bit) || \
1e61f78b arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 @84 REQUIRED_MASK_CHECK || \
95ca0ee8 arch/x86/include/asm/cpufeature.h David Woodhouse 2018-01-25 85 BUILD_BUG_ON_ZERO(NCAPINTS != 19))
349c004e arch/x86/include/asm/cpufeature.h Christoph Lameter 2011-03-12 86
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 87 #define DISABLED_MASK_BIT_SET(feature_bit) \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 88 ( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 0, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 89 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 1, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 90 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 2, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 91 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 3, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 92 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 4, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 93 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 5, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 94 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 6, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 95 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 7, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 96 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 8, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 97 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 9, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 98 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 10, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 99 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 11, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 100 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 12, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 101 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 13, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 102 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 14, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 103 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 15, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 104 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 16, feature_bit) || \
8eda072e arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 105 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 17, feature_bit) || \
95ca0ee8 arch/x86/include/asm/cpufeature.h David Woodhouse 2018-01-25 106 CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 18, feature_bit) || \
1e61f78b arch/x86/include/asm/cpufeature.h Dave Hansen 2016-06-29 107 DISABLED_MASK_CHECK || \
95ca0ee8 arch/x86/include/asm/cpufeature.h David Woodhouse 2018-01-25 108 BUILD_BUG_ON_ZERO(NCAPINTS != 19))
381aa07a arch/x86/include/asm/cpufeature.h Dave Hansen 2014-09-11 109
349c004e arch/x86/include/asm/cpufeature.h Christoph Lameter 2011-03-12 110 #define cpu_has(c, bit) \
349c004e arch/x86/include/asm/cpufeature.h Christoph Lameter 2011-03-12 @111 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
0f8d2b92 include/asm-x86/cpufeature.h Ingo Molnar 2008-02-26 @112 test_cpu_cap(c, bit))
0f8d2b92 include/asm-x86/cpufeature.h Ingo Molnar 2008-02-26 113
349c004e arch/x86/include/asm/cpufeature.h Christoph Lameter 2011-03-12 114 #define this_cpu_has(bit) \
349c004e arch/x86/include/asm/cpufeature.h Christoph Lameter 2011-03-12 115 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
349c004e arch/x86/include/asm/cpufeature.h Christoph Lameter 2011-03-12 116 x86_this_cpu_test_bit(bit, (unsigned long *)&cpu_info.x86_capability))
349c004e arch/x86/include/asm/cpufeature.h Christoph Lameter 2011-03-12 117
381aa07a arch/x86/include/asm/cpufeature.h Dave Hansen 2014-09-11 118 /*
381aa07a arch/x86/include/asm/cpufeature.h Dave Hansen 2014-09-11 119 * This macro is for detection of features which need kernel
381aa07a arch/x86/include/asm/cpufeature.h Dave Hansen 2014-09-11 120 * infrastructure to be used. It may *not* directly test the CPU
381aa07a arch/x86/include/asm/cpufeature.h Dave Hansen 2014-09-11 121 * itself. Use the cpu_has() family if you want true runtime
381aa07a arch/x86/include/asm/cpufeature.h Dave Hansen 2014-09-11 122 * testing of CPU features, like in hypervisor code where you are
381aa07a arch/x86/include/asm/cpufeature.h Dave Hansen 2014-09-11 123 * supporting a possible guest feature where host support for it
381aa07a arch/x86/include/asm/cpufeature.h Dave Hansen 2014-09-11 124 * is not relevant.
381aa07a arch/x86/include/asm/cpufeature.h Dave Hansen 2014-09-11 125 */
381aa07a arch/x86/include/asm/cpufeature.h Dave Hansen 2014-09-11 126 #define cpu_feature_enabled(bit) \
f2cc8e07 arch/x86/include/asm/cpufeature.h Borislav Petkov 2016-02-16 127 (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit))
381aa07a arch/x86/include/asm/cpufeature.h Dave Hansen 2014-09-11 128
7b11fb51 include/asm-x86/cpufeature.h H. Peter Anvin 2008-01-30 @129 #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
7b11fb51 include/asm-x86/cpufeature.h H. Peter Anvin 2008-01-30 130
53756d37 include/asm-x86/cpufeature.h Jeremy Fitzhardinge 2008-01-30 131 #define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability))
0b00de85 arch/x86/include/asm/cpufeature.h Andi Kleen 2017-10-13 132
0b00de85 arch/x86/include/asm/cpufeature.h Andi Kleen 2017-10-13 133 extern void setup_clear_cpu_cap(unsigned int bit);
0b00de85 arch/x86/include/asm/cpufeature.h Andi Kleen 2017-10-13 @134 extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit);
0b00de85 arch/x86/include/asm/cpufeature.h Andi Kleen 2017-10-13 135
404ee5b1 include/asm-x86/cpufeature.h Andi Kleen 2008-01-30 136 #define setup_force_cpu_cap(bit) do { \
404ee5b1 include/asm-x86/cpufeature.h Andi Kleen 2008-01-30 137 set_cpu_cap(&boot_cpu_data, bit); \
3e0c3737 arch/x86/include/asm/cpufeature.h Yinghai Lu 2009-05-09 138 set_bit(bit, (unsigned long *)cpu_caps_set); \
404ee5b1 include/asm-x86/cpufeature.h Andi Kleen 2008-01-30 139 } while (0)
53756d37 include/asm-x86/cpufeature.h Jeremy Fitzhardinge 2008-01-30 140
6cbd2171 arch/x86/include/asm/cpufeature.h Thomas Gleixner 2017-12-04 141 #define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit)
6cbd2171 arch/x86/include/asm/cpufeature.h Thomas Gleixner 2017-12-04 142
b1ae32db arch/x86/include/asm/cpufeature.h Alexei Starovoitov 2018-05-13 143 #if defined(__clang__) && !defined(CC_HAVE_ASM_GOTO)
b1ae32db arch/x86/include/asm/cpufeature.h Alexei Starovoitov 2018-05-13 144
b1ae32db arch/x86/include/asm/cpufeature.h Alexei Starovoitov 2018-05-13 145 /*
b1ae32db arch/x86/include/asm/cpufeature.h Alexei Starovoitov 2018-05-13 146 * Workaround for the sake of BPF compilation which utilizes kernel
b1ae32db arch/x86/include/asm/cpufeature.h Alexei Starovoitov 2018-05-13 147 * headers, but clang does not support ASM GOTO and fails the build.
b1ae32db arch/x86/include/asm/cpufeature.h Alexei Starovoitov 2018-05-13 148 */
b1ae32db arch/x86/include/asm/cpufeature.h Alexei Starovoitov 2018-05-13 149 #ifndef __BPF_TRACING__
b1ae32db arch/x86/include/asm/cpufeature.h Alexei Starovoitov 2018-05-13 150 #warning "Compiler lacks ASM_GOTO support. Add -D __BPF_TRACING__ to your compiler arguments"
b1ae32db arch/x86/include/asm/cpufeature.h Alexei Starovoitov 2018-05-13 151 #endif
b1ae32db arch/x86/include/asm/cpufeature.h Alexei Starovoitov 2018-05-13 152
b1ae32db arch/x86/include/asm/cpufeature.h Alexei Starovoitov 2018-05-13 153 #define static_cpu_has(bit) boot_cpu_has(bit)
b1ae32db arch/x86/include/asm/cpufeature.h Alexei Starovoitov 2018-05-13 154
b1ae32db arch/x86/include/asm/cpufeature.h Alexei Starovoitov 2018-05-13 155 #else
b1ae32db arch/x86/include/asm/cpufeature.h Alexei Starovoitov 2018-05-13 156
a3c8acd0 arch/x86/include/asm/cpufeature.h H. Peter Anvin 2010-05-11 157 /*
a3c8acd0 arch/x86/include/asm/cpufeature.h H. Peter Anvin 2010-05-11 158 * Static testing of CPU features. Used the same as boot_cpu_has().
a362bf9f arch/x86/include/asm/cpufeature.h Borislav Petkov 2016-01-27 159 * These will statically patch the target code for additional
a362bf9f arch/x86/include/asm/cpufeature.h Borislav Petkov 2016-01-27 160 * performance.
a3c8acd0 arch/x86/include/asm/cpufeature.h H. Peter Anvin 2010-05-11 161 */
bc696ca0 arch/x86/include/asm/cpufeature.h Borislav Petkov 2016-01-26 162 static __always_inline __pure bool _static_cpu_has(u16 bit)
4a90a99c arch/x86/include/asm/cpufeature.h Borislav Petkov 2013-06-09 163 {
2476f2fa arch/x86/include/asm/cpufeature.h Brian Gerst 2016-01-27 164 asm_volatile_goto("1: jmp 6f\n"
4a90a99c arch/x86/include/asm/cpufeature.h Borislav Petkov 2013-06-09 165 "2:\n"
4332195c arch/x86/include/asm/cpufeature.h Borislav Petkov 2014-12-27 166 ".skip -(((5f-4f) - (2b-1b)) > 0) * "
4332195c arch/x86/include/asm/cpufeature.h Borislav Petkov 2014-12-27 167 "((5f-4f) - (2b-1b)),0x90\n"
4332195c arch/x86/include/asm/cpufeature.h Borislav Petkov 2014-12-27 168 "3:\n"
4a90a99c arch/x86/include/asm/cpufeature.h Borislav Petkov 2013-06-09 169 ".section .altinstructions,\"a\"\n"
4a90a99c arch/x86/include/asm/cpufeature.h Borislav Petkov 2013-06-09 170 " .long 1b - .\n" /* src offset */
4332195c arch/x86/include/asm/cpufeature.h Borislav Petkov 2014-12-27 171 " .long 4f - .\n" /* repl offset */
3197b04b arch/x86/include/asm/cpufeature.h Peter Zijlstra 2018-01-16 172 " .word %P[always]\n" /* always replace */
4332195c arch/x86/include/asm/cpufeature.h Borislav Petkov 2014-12-27 173 " .byte 3b - 1b\n" /* src len */
4332195c arch/x86/include/asm/cpufeature.h Borislav Petkov 2014-12-27 174 " .byte 5f - 4f\n" /* repl len */
4332195c arch/x86/include/asm/cpufeature.h Borislav Petkov 2014-12-27 175 " .byte 3b - 2b\n" /* pad len */
4a90a99c arch/x86/include/asm/cpufeature.h Borislav Petkov 2013-06-09 176 ".previous\n"
4a90a99c arch/x86/include/asm/cpufeature.h Borislav Petkov 2013-06-09 177 ".section .altinstr_replacement,\"ax\"\n"
48c7a250 arch/x86/include/asm/cpufeature.h Borislav Petkov 2015-01-05 178 "4: jmp %l[t_no]\n"
4332195c arch/x86/include/asm/cpufeature.h Borislav Petkov 2014-12-27 179 "5:\n"
4a90a99c arch/x86/include/asm/cpufeature.h Borislav Petkov 2013-06-09 180 ".previous\n"
4a90a99c arch/x86/include/asm/cpufeature.h Borislav Petkov 2013-06-09 181 ".section .altinstructions,\"a\"\n"
4a90a99c arch/x86/include/asm/cpufeature.h Borislav Petkov 2013-06-09 182 " .long 1b - .\n" /* src offset */
4a90a99c arch/x86/include/asm/cpufeature.h Borislav Petkov 2013-06-09 183 " .long 0\n" /* no replacement */
3197b04b arch/x86/include/asm/cpufeature.h Peter Zijlstra 2018-01-16 184 " .word %P[feature]\n" /* feature bit */
4332195c arch/x86/include/asm/cpufeature.h Borislav Petkov 2014-12-27 185 " .byte 3b - 1b\n" /* src len */
4a90a99c arch/x86/include/asm/cpufeature.h Borislav Petkov 2013-06-09 186 " .byte 0\n" /* repl len */
4332195c arch/x86/include/asm/cpufeature.h Borislav Petkov 2014-12-27 187 " .byte 0\n" /* pad len */
4a90a99c arch/x86/include/asm/cpufeature.h Borislav Petkov 2013-06-09 188 ".previous\n"
2476f2fa arch/x86/include/asm/cpufeature.h Brian Gerst 2016-01-27 189 ".section .altinstr_aux,\"ax\"\n"
2476f2fa arch/x86/include/asm/cpufeature.h Brian Gerst 2016-01-27 190 "6:\n"
2476f2fa arch/x86/include/asm/cpufeature.h Brian Gerst 2016-01-27 191 " testb %[bitnum],%[cap_byte]\n"
2476f2fa arch/x86/include/asm/cpufeature.h Brian Gerst 2016-01-27 192 " jnz %l[t_yes]\n"
2476f2fa arch/x86/include/asm/cpufeature.h Brian Gerst 2016-01-27 193 " jmp %l[t_no]\n"
2476f2fa arch/x86/include/asm/cpufeature.h Brian Gerst 2016-01-27 194 ".previous\n"
3197b04b arch/x86/include/asm/cpufeature.h Peter Zijlstra 2018-01-16 195 : : [feature] "i" (bit),
3197b04b arch/x86/include/asm/cpufeature.h Peter Zijlstra 2018-01-16 196 [always] "i" (X86_FEATURE_ALWAYS),
2476f2fa arch/x86/include/asm/cpufeature.h Brian Gerst 2016-01-27 197 [bitnum] "i" (1 << (bit & 7)),
2476f2fa arch/x86/include/asm/cpufeature.h Brian Gerst 2016-01-27 @198 [cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3])
2476f2fa arch/x86/include/asm/cpufeature.h Brian Gerst 2016-01-27 199 : : t_yes, t_no);
2476f2fa arch/x86/include/asm/cpufeature.h Brian Gerst 2016-01-27 200 t_yes:
4a90a99c arch/x86/include/asm/cpufeature.h Borislav Petkov 2013-06-09 201 return true;
4a90a99c arch/x86/include/asm/cpufeature.h Borislav Petkov 2013-06-09 202 t_no:
4a90a99c arch/x86/include/asm/cpufeature.h Borislav Petkov 2013-06-09 203 return false;
4a90a99c arch/x86/include/asm/cpufeature.h Borislav Petkov 2013-06-09 204 }
4a90a99c arch/x86/include/asm/cpufeature.h Borislav Petkov 2013-06-09 205
:::::: The code at line 198 was first introduced by commit
:::::: 2476f2fa20568bd5d9e09cd35bcd73e99a6f4cc6 x86/alternatives: Discard dynamic check after init
:::::: TO: Brian Gerst <brgerst@gmail.com>
:::::: CC: Ingo Molnar <mingo@kernel.org>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 7940 bytes --]
^ permalink raw reply
* RE: [PATCH] net: xenbus: remove redundant condition check before debugfs_remove_recursive
From: Paul Durrant @ 2018-09-11 8:01 UTC (permalink / raw)
To: 'zhong jiang', davem@davemloft.net, Wei Liu
Cc: xen-devel@lists.xenproject.org, netdev@vger.kernel.org
In-Reply-To: <1536413706-31838-1-git-send-email-zhongjiang@huawei.com>
> -----Original Message-----
> From: zhong jiang [mailto:zhongjiang@huawei.com]
> Sent: 08 September 2018 14:35
> To: davem@davemloft.net; Paul Durrant <Paul.Durrant@citrix.com>; Wei Liu
> <wei.liu2@citrix.com>
> Cc: xen-devel@lists.xenproject.org; netdev@vger.kernel.org
> Subject: [PATCH] net: xenbus: remove redundant condition check before
> debugfs_remove_recursive
>
> debugfs_remove_recursive has taken the IS_ERR_OR_NULL into account.
> Just
> remove the unnecessary condition check.
>
> Signed-off-by: zhong jiang <zhongjiang@huawei.com>
Reviewed-by: Paul Durrant <paul.durrant@citrix.com>
> ---
> drivers/net/xen-netback/xenbus.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/net/xen-netback/xenbus.c b/drivers/net/xen-
> netback/xenbus.c
> index cd51492..fe1d522 100644
> --- a/drivers/net/xen-netback/xenbus.c
> +++ b/drivers/net/xen-netback/xenbus.c
> @@ -254,8 +254,7 @@ static void xenvif_debugfs_delif(struct xenvif *vif)
> if (IS_ERR_OR_NULL(xen_netback_dbg_root))
> return;
>
> - if (!IS_ERR_OR_NULL(vif->xenvif_dbg_root))
> - debugfs_remove_recursive(vif->xenvif_dbg_root);
> + debugfs_remove_recursive(vif->xenvif_dbg_root);
> vif->xenvif_dbg_root = NULL;
> }
> #endif /* CONFIG_DEBUG_FS */
> --
> 1.7.12.4
^ permalink raw reply
* [PATCH] net: ethernet: Use DIV_ROUND_UP instead of reimplementing its function
From: zhong jiang @ 2018-09-11 13:08 UTC (permalink / raw)
To: davem, claudiu.manoil, tariqt, saeedm, derek.chickles
Cc: leon, jdmason, netdev, linux-kernel
DIV_ROUND_UP has implemented the code-opened function. Therefore, just
replace the implementation with DIV_ROUND_UP.
Signed-off-by: zhong jiang <zhongjiang@huawei.com>
---
drivers/net/ethernet/broadcom/sb1250-mac.c | 2 +-
drivers/net/ethernet/cavium/liquidio/octeon_droq.c | 2 +-
drivers/net/ethernet/freescale/gianfar_ethtool.c | 2 +-
drivers/net/ethernet/ibm/emac/mal.h | 2 +-
drivers/net/ethernet/mellanox/mlx4/alloc.c | 2 +-
drivers/net/ethernet/mellanox/mlx4/icm.c | 2 +-
drivers/net/ethernet/mellanox/mlx5/core/srq.c | 2 +-
drivers/net/ethernet/neterion/s2io.c | 2 +-
8 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/sb1250-mac.c b/drivers/net/ethernet/broadcom/sb1250-mac.c
index ef4a0c3..1082529 100644
--- a/drivers/net/ethernet/broadcom/sb1250-mac.c
+++ b/drivers/net/ethernet/broadcom/sb1250-mac.c
@@ -156,7 +156,7 @@ enum sbmac_state {
(d)->sbdma_dscrtable : (d)->f+1)
-#define NUMCACHEBLKS(x) (((x)+SMP_CACHE_BYTES-1)/SMP_CACHE_BYTES)
+#define NUMCACHEBLKS(x) DIV_ROUND_UP(x, SMP_CACHE_BYTES)
#define SBMAC_MAX_TXDESCR 256
#define SBMAC_MAX_RXDESCR 256
diff --git a/drivers/net/ethernet/cavium/liquidio/octeon_droq.c b/drivers/net/ethernet/cavium/liquidio/octeon_droq.c
index a71dbb7..b57008d 100644
--- a/drivers/net/ethernet/cavium/liquidio/octeon_droq.c
+++ b/drivers/net/ethernet/cavium/liquidio/octeon_droq.c
@@ -530,7 +530,7 @@ void octeon_droq_check_oom(struct octeon_droq *droq)
static inline u32
octeon_droq_get_bufcount(u32 buf_size, u32 total_len)
{
- return ((total_len + buf_size - 1) / buf_size);
+ return DIV_ROUND_UP(total_len, buf_size);
}
static int
diff --git a/drivers/net/ethernet/freescale/gianfar_ethtool.c b/drivers/net/ethernet/freescale/gianfar_ethtool.c
index 395a526..b536eb0 100644
--- a/drivers/net/ethernet/freescale/gianfar_ethtool.c
+++ b/drivers/net/ethernet/freescale/gianfar_ethtool.c
@@ -230,7 +230,7 @@ static unsigned int gfar_usecs2ticks(struct gfar_private *priv,
/* Make sure we return a number greater than 0
* if usecs > 0 */
- return (usecs * 1000 + count - 1) / count;
+ return DIV_ROUND_UP(usecs * 1000, count);
}
/* Convert ethernet clock ticks to microseconds */
diff --git a/drivers/net/ethernet/ibm/emac/mal.h b/drivers/net/ethernet/ibm/emac/mal.h
index eeade2e..e4c20f0 100644
--- a/drivers/net/ethernet/ibm/emac/mal.h
+++ b/drivers/net/ethernet/ibm/emac/mal.h
@@ -136,7 +136,7 @@ static inline int mal_rx_size(int len)
static inline int mal_tx_chunks(int len)
{
- return (len + MAL_MAX_TX_SIZE - 1) / MAL_MAX_TX_SIZE;
+ return DIV_ROUND_UP(len, MAL_MAX_TX_SIZE);
}
#define MAL_CHAN_MASK(n) (0x80000000 >> (n))
diff --git a/drivers/net/ethernet/mellanox/mlx4/alloc.c b/drivers/net/ethernet/mellanox/mlx4/alloc.c
index 4bdf250..deef5a9 100644
--- a/drivers/net/ethernet/mellanox/mlx4/alloc.c
+++ b/drivers/net/ethernet/mellanox/mlx4/alloc.c
@@ -614,7 +614,7 @@ int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct,
int i;
buf->direct.buf = NULL;
- buf->nbufs = (size + PAGE_SIZE - 1) / PAGE_SIZE;
+ buf->nbufs = DIV_ROUND_UP(size, PAGE_SIZE);
buf->npages = buf->nbufs;
buf->page_shift = PAGE_SHIFT;
buf->page_list = kcalloc(buf->nbufs, sizeof(*buf->page_list),
diff --git a/drivers/net/ethernet/mellanox/mlx4/icm.c b/drivers/net/ethernet/mellanox/mlx4/icm.c
index 7262c63..4b43511 100644
--- a/drivers/net/ethernet/mellanox/mlx4/icm.c
+++ b/drivers/net/ethernet/mellanox/mlx4/icm.c
@@ -406,7 +406,7 @@ int mlx4_init_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table,
obj_per_chunk = MLX4_TABLE_CHUNK_SIZE / obj_size;
if (WARN_ON(!obj_per_chunk))
return -EINVAL;
- num_icm = (nobj + obj_per_chunk - 1) / obj_per_chunk;
+ num_icm = DIV_ROUND_UP(nobj, obj_per_chunk);
table->icm = kvcalloc(num_icm, sizeof(*table->icm), GFP_KERNEL);
if (!table->icm)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/srq.c b/drivers/net/ethernet/mellanox/mlx5/core/srq.c
index 23cc337..7e20666 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/srq.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/srq.c
@@ -73,7 +73,7 @@ static int get_pas_size(struct mlx5_srq_attr *in)
u32 rq_sz = 1 << (log_srq_size + 4 + log_rq_stride);
u32 page_size = 1 << log_page_size;
u32 rq_sz_po = rq_sz + (page_offset * po_quanta);
- u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size;
+ u32 rq_num_pas = DIV_ROUND_UP(rq_sz_po, page_size);
return rq_num_pas * sizeof(u64);
}
diff --git a/drivers/net/ethernet/neterion/s2io.c b/drivers/net/ethernet/neterion/s2io.c
index b8983e7..f980f10 100644
--- a/drivers/net/ethernet/neterion/s2io.c
+++ b/drivers/net/ethernet/neterion/s2io.c
@@ -491,7 +491,7 @@ static void do_s2io_copy_mac_addr(struct s2io_nic *sp, int offset, u64 mac_addr)
};
/* A simplifier macro used both by init and free shared_mem Fns(). */
-#define TXD_MEM_PAGE_CNT(len, per_each) ((len+per_each - 1) / per_each)
+#define TXD_MEM_PAGE_CNT(len, per_each) DIV_ROUND_UP(len, per_each)
/* netqueue manipulation helper functions */
static inline void s2io_stop_all_tx_queue(struct s2io_nic *sp)
--
1.7.12.4
^ permalink raw reply related
* Re: [PATCH 0/3] xen-netback: hash mapping hanling adjustments
From: Jan Beulich @ 2018-09-11 8:12 UTC (permalink / raw)
To: Paul Durrant, Wei Liu, davem; +Cc: xen-devel, netdev
In-Reply-To: <5B85622302000078001E2A35@prv1-mh.provo.novell.com>
>>> On 28.08.18 at 16:54, wrote:
> First and foremost the fix for XSA-270. On top of that further changes
> which looked desirable to me while investigating that XSA.
>
> 1: fix input validation in xenvif_set_hash_mapping()
> 2: validate queue numbers in xenvif_set_hash_mapping()
> 3: handle page straddling in xenvif_set_hash_mapping()
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
What is the way forward here? I've got R-b-s from Paul for all three
patches, and a minor change request on patch 2 from Wei. I'm not
really certain what to do in this case (hints appreciated), but could
at least the security fix (patch 1) be applied immediately?
Jan
^ permalink raw reply
* [PATCHv2] net: ipv4: Use BUG_ON directly instead of a if condition followed by BUG
From: zhong jiang @ 2018-09-11 13:13 UTC (permalink / raw)
To: davem, edumazet; +Cc: kuznet, netdev, linux-kernel
The if condition can be removed if we use BUG_ON directly.
The issule is detected with the help of Coccinelle.
Signed-off-by: zhong jiang <zhongjiang@huawei.com>
---
net/ipv4/tcp_input.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index 62508a2..526c05e 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -4934,8 +4934,8 @@ void tcp_rbtree_insert(struct rb_root *root, struct sk_buff *skb)
BUG_ON(offset < 0);
if (size > 0) {
size = min(copy, size);
- if (skb_copy_bits(skb, offset, skb_put(nskb, size), size))
- BUG();
+ BUG_ON(skb_copy_bits(skb, offset,
+ skb_put(nskb, size), size));
TCP_SKB_CB(nskb)->end_seq += size;
copy -= size;
start += size;
@@ -5327,8 +5327,8 @@ static void tcp_urg(struct sock *sk, struct sk_buff *skb, const struct tcphdr *t
/* Is the urgent pointer pointing into this packet? */
if (ptr < skb->len) {
u8 tmp;
- if (skb_copy_bits(skb, ptr, &tmp, 1))
- BUG();
+
+ BUG_ON(skb_copy_bits(skb, ptr, &tmp, 1));
tp->urg_data = TCP_URG_VALID | tmp;
if (!sock_flag(sk, SOCK_DEAD))
sk->sk_data_ready(sk);
--
1.7.12.4
^ permalink raw reply related
* Re: [net-next, v2, 1/2] net: stmmac: Rework coalesce timer and fix multi-queue races
From: Jose Abreu @ 2018-09-11 8:17 UTC (permalink / raw)
To: Neil Armstrong, Jose Abreu, netdev
Cc: Jerome Brunet, Martin Blumenstingl, David S. Miller, Joao Pinto,
Giuseppe Cavallaro, Alexandre Torgue
In-Reply-To: <a7d33f8b-be16-121d-b817-7ee9a0f67687@baylibre.com>
[-- Attachment #1: Type: text/plain, Size: 1538 bytes --]
On 10-09-2018 19:15, Neil Armstrong wrote:
>
> RX is still ok but now TX fails almost immediately...
>
> With 100ms report :
>
> $ iperf3 -c 192.168.1.47 -t 0 -p 5202 -R -i 0.1
> Connecting to host 192.168.1.47, port 5202
> Reverse mode, remote host 192.168.1.47 is sending
> [ 4] local 192.168.1.45 port 45900 connected to 192.168.1.47 port 5202
> [ ID] Interval Transfer Bandwidth
> [ 4] 0.00-0.10 sec 10.9 MBytes 913 Mbits/sec
> [ 4] 0.10-0.20 sec 11.0 MBytes 923 Mbits/sec
> [ 4] 0.20-0.30 sec 6.34 MBytes 532 Mbits/sec
> [ 4] 0.30-0.40 sec 0.00 Bytes 0.00 bits/sec
> [ 4] 0.40-0.50 sec 0.00 Bytes 0.00 bits/sec
> [ 4] 0.50-0.60 sec 0.00 Bytes 0.00 bits/sec
> [ 4] 0.60-0.70 sec 0.00 Bytes 0.00 bits/sec
> [ 4] 0.70-0.80 sec 0.00 Bytes 0.00 bits/sec
> [ 4] 0.80-0.90 sec 0.00 Bytes 0.00 bits/sec
> [ 4] 0.90-1.00 sec 0.00 Bytes 0.00 bits/sec
> [ 4] 1.00-1.10 sec 0.00 Bytes 0.00 bits/sec
> ^C[ 4] 1.10-1.10 sec 0.00 Bytes 0.00 bits/sec
> - - - - - - - - - - - - - - - - - - - - - - - - -
> [ ID] Interval Transfer Bandwidth
> [ 4] 0.00-1.10 sec 0.00 Bytes 0.00 bits/sec sender
> [ 4] 0.00-1.10 sec 28.2 MBytes 214 Mbits/sec receiver
> iperf3: interrupt - the client has terminated
>
> Neil
Ok, here goes another incremental patch. If this doesn't work can
you please send me a link to the spec of the board you are using ?
Thanks and Best Regards,
Jose Miguel Abreu
[-- Attachment #2: 0001-fixup_coalesce_4.patch --]
[-- Type: text/x-patch, Size: 2739 bytes --]
>From d6c3bc9c282eadfa754bd78e7c7447a200dd1737 Mon Sep 17 00:00:00 2001
Message-Id: <d6c3bc9c282eadfa754bd78e7c7447a200dd1737.1536653739.git.joabreu@synopsys.com>
From: Jose Abreu <joabreu@synopsys.com>
Date: Tue, 11 Sep 2018 10:15:31 +0200
Subject: [PATCH] fixup_coalesce_4
Signed-off-by: Jose Abreu <joabreu@synopsys.com>
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 31 ++++++++++-------------
1 file changed, 13 insertions(+), 18 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index f6587ee372ab..b6d661f17bd7 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -1857,17 +1857,14 @@ static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
* @queue: TX queue index
* Description: it reclaims the transmit resources after transmission completes.
*/
-static int stmmac_tx_clean(struct stmmac_priv *priv, int limit, u32 queue,
- bool *more)
+static bool stmmac_tx_clean(struct stmmac_priv *priv, u32 queue)
{
struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
unsigned int bytes_compl = 0, pkts_compl = 0;
+ bool has_more = false;
unsigned int entry;
- netif_tx_lock(priv->dev);
-
- if (more)
- *more = false;
+ netif_tx_lock_bh(priv->dev);
priv->xstats.tx_clean++;
@@ -1956,12 +1953,12 @@ static int stmmac_tx_clean(struct stmmac_priv *priv, int limit, u32 queue,
mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(eee_timer));
}
- if (more && (tx_q->dirty_tx != tx_q->cur_tx))
- *more = true;
+ if (tx_q->dirty_tx != tx_q->cur_tx)
+ has_more = true;
- netif_tx_unlock(priv->dev);
+ netif_tx_unlock_bh(priv->dev);
- return pkts_compl;
+ return has_more;
}
/**
@@ -2257,10 +2254,9 @@ static void stmmac_tx_timer_arm(struct stmmac_priv *priv, u32 queue)
static void stmmac_tx_timer(struct timer_list *t)
{
struct stmmac_tx_queue *tx_q = from_timer(tx_q, t, txtimer);
- struct stmmac_priv *priv = tx_q->priv_data;
- bool more;
- stmmac_tx_clean(priv, ~0, tx_q->queue_index, &more);
+ if (likely(napi_schedule_prep(&tx_q->napi)))
+ __napi_schedule(&tx_q->napi);
}
/**
@@ -3562,15 +3558,14 @@ static int stmmac_tx_poll(struct napi_struct *napi, int budget)
container_of(napi, struct stmmac_tx_queue, napi);
struct stmmac_priv *priv = tx_q->priv_data;
u32 chan = tx_q->queue_index;
- int work_done = 0;
priv->xstats.napi_poll++;
- work_done = stmmac_tx_clean(priv, budget, chan, NULL);
- if (work_done < budget)
- napi_complete_done(napi, work_done);
+ if (stmmac_tx_clean(priv, chan))
+ return budget;
- return min(work_done, budget);
+ napi_complete_done(napi, 0);
+ return 0;
}
/**
--
2.7.4
^ permalink raw reply related
* Re: [PATCH net-next v3 05/17] zinc: ChaCha20 x86_64 implementation
From: Thomas Gleixner @ 2018-09-11 8:22 UTC (permalink / raw)
To: Jason A. Donenfeld
Cc: linux-kernel, netdev, davem, gregkh, Andy Lutomirski,
Samuel Neves, Jean-Philippe Aumasson, Andy Polyakov, Ingo Molnar,
x86, linux-crypto
In-Reply-To: <20180911010838.8818-6-Jason@zx2c4.com>
On Mon, 10 Sep 2018, Jason A. Donenfeld wrote:
> lib/zinc/Makefile | 4 +
> lib/zinc/chacha20/chacha20-x86_64-glue.h | 102 +
> lib/zinc/chacha20/chacha20-x86_64.S | 2632 ++++++++++++++++++++++
Just a stupid question. What's the rationale of putting that into lib/zinc
instead of having it in arch/x86/crypto?
Thanks,
tglx
^ permalink raw reply
* Re: [PATCH net-next v3 17/17] net: WireGuard secure network tunnel
From: Andrew Lunn @ 2018-09-11 13:30 UTC (permalink / raw)
To: Jason A. Donenfeld; +Cc: linux-kernel, netdev, davem, gregkh
In-Reply-To: <20180911010838.8818-19-Jason@zx2c4.com>
On Mon, Sep 10, 2018 at 07:08:38PM -0600, Jason A. Donenfeld wrote:
> Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
> Cc: David Miller <davem@davemloft.net>
> Cc: Greg KH <gregkh@linuxfoundation.org>
> ---
Hi Jason
I don't know if any of the crypto people are reviewing the networking
code, but i don't think there are many networking people reviewing the
crypto code.
So please can you put the change log between versions for the
networking code here, where we can easily see it.
> +++ b/drivers/net/wireguard/allowedips.c
> @@ -0,0 +1,404 @@
> +/* SPDX-License-Identifier: GPL-2.0
> + *
> + * Copyright (C) 2015-2018 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
> + */
> +
> +#include "allowedips.h"
> +#include "peer.h"
> +
> +struct allowedips_node {
> + struct wireguard_peer __rcu *peer;
> + struct rcu_head rcu;
> + struct allowedips_node __rcu *bit[2];
> + /* While it may seem scandalous that we waste space for v4,
> + * we're alloc'ing to the nearest power of 2 anyway, so this
> + * doesn't actually make a difference.
> + */
> + u8 bits[16] __aligned(__alignof(u64));
> + u8 cidr, bit_at_a, bit_at_b;
> +};
> +
> +static __always_inline void swap_endian(u8 *dst, const u8 *src, u8 bits)
> +{
> + if (bits == 32)
> + *(u32 *)dst = be32_to_cpu(*(const __be32 *)src);
> + else if (bits == 128) {
> + ((u64 *)dst)[0] = be64_to_cpu(((const __be64 *)src)[0]);
> + ((u64 *)dst)[1] = be64_to_cpu(((const __be64 *)src)[1]);
> + }
> +}
I see you have yet again completely ignored my request to either
1) Remove the inline
2) Argue why it should be kept.
Ignoring reviewer comments is not going to help your cause.
> +void allowedips_init(struct allowedips *table)
> +{
> + table->root4 = table->root6 = NULL;
> + table->seq = 1;
> +}
You have a number of global scope functions which are polluting the
namespace. Anything which is global scope needs a prefix. If my
grep-foo is correct, the prefix wg_ is currently unused. It is also
reasonably normal for static members to also make use of the prefix,
but not a must.
Andrew
^ permalink raw reply
* Re: Allow bpf_perf_event_output to access packet data
From: Lorenz Bauer @ 2018-09-11 8:37 UTC (permalink / raw)
To: Jakub Kicinski; +Cc: netdev
In-Reply-To: <20180910102642.7ea6da00@cakuba>
On 10 September 2018 at 09:26, Jakub Kicinski
<jakub.kicinski@netronome.com> wrote:
> The 0x20ffffffffULL will mean use the index in the map for current CPU
> (0xffffffff), and output 32 bytes of the context (0x20 << 32). For
> networking programs context means the packet (slightly confusingly).
>
> These are the relevant defines from bpf.h:
>
> /* BPF_FUNC_perf_event_output, BPF_FUNC_perf_event_read and
> * BPF_FUNC_perf_event_read_value flags.
> */
> #define BPF_F_INDEX_MASK 0xffffffffULL
> #define BPF_F_CURRENT_CPU BPF_F_INDEX_MASK
> /* BPF_FUNC_perf_event_output for sk_buff input context. */
> #define BPF_F_CTXLEN_MASK (0xfffffULL << 32)
>
> Also check out:
>
> bpftool map event_pipe id $ID
>
> For simple way to dump the events in user space.
Thanks for pointing me in the right direction! I managed to find
samples/bpf/xdp_sample_pkts_kern.c as well, which was helpful.
My next gotcha is that perf_event_output seems to ignore the
sample_period parameter passed to perf_event_output. This is not a big
problem since I can just implement the sampling in BPF, but am I
missing something again?
--
Lorenz Bauer | Systems Engineer
25 Lavington St., London SE1 0NZ
www.cloudflare.com
^ permalink raw reply
* Re: [PATCH v3 00/15] soc: octeontx2: Add RVU admin function driver
From: Arnd Bergmann @ 2018-09-11 13:36 UTC (permalink / raw)
To: Sunil Kovvuri
Cc: Linux Kernel Mailing List, Olof Johansson, Linux ARM, linux-soc,
Andrew Lunn, David Miller, Networking, sgoutham
In-Reply-To: <CA+sq2CdNRkbGrk4rHOQX1qHrRc2+=DXBscw7cD9UKrX4G5OaVg@mail.gmail.com>
On Tue, Sep 11, 2018 at 2:37 PM Sunil Kovvuri <sunil.kovvuri@gmail.com> wrote:
>
> Didn't receive any feedback for the v3 patch series over a week's time.
> Can you please pick up these patches to merge into arm-soc ?
I would still prefer to see the whole thing as part of drivers/net/
instead of drivers/soc,
and reviewed in full on the netdev side, including the parts that are
not ethernet specific.
Arnd
^ permalink raw reply
* [PATCH net-next 3/8] devlink: Add generic parameter msix_vec_per_pf_max
From: Vasundhara Volam @ 2018-09-11 8:45 UTC (permalink / raw)
To: davem; +Cc: michael.chan, netdev
In-Reply-To: <1536655505-14387-1-git-send-email-vasundhara-v.volam@broadcom.com>
msix_vec_per_pf_max - This param sets the number of MSIX vectors
that the device requests from the host on driver initialization.
This value is set in the device which is applicable per PF.
Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com>
---
include/net/devlink.h | 4 ++++
net/core/devlink.c | 5 +++++
2 files changed, 9 insertions(+)
diff --git a/include/net/devlink.h b/include/net/devlink.h
index 8a6063e..9619a68 100644
--- a/include/net/devlink.h
+++ b/include/net/devlink.h
@@ -364,6 +364,7 @@ enum devlink_param_generic_id {
DEVLINK_PARAM_GENERIC_ID_REGION_SNAPSHOT,
DEVLINK_PARAM_GENERIC_ID_HW_TC_OFFLOAD,
DEVLINK_PARAM_GENERIC_ID_IGNORE_ARI,
+ DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MAX,
/* add new param generic ids above here*/
__DEVLINK_PARAM_GENERIC_ID_MAX,
@@ -388,6 +389,9 @@ enum devlink_param_generic_id {
#define DEVLINK_PARAM_GENERIC_IGNORE_ARI_NAME "ignore_ari"
#define DEVLINK_PARAM_GENERIC_IGNORE_ARI_TYPE DEVLINK_PARAM_TYPE_BOOL
+#define DEVLINK_PARAM_GENERIC_MSIX_VEC_PER_PF_MAX_NAME "msix_vec_per_pf_max"
+#define DEVLINK_PARAM_GENERIC_MSIX_VEC_PER_PF_MAX_TYPE DEVLINK_PARAM_TYPE_U32
+
#define DEVLINK_PARAM_GENERIC(_id, _cmodes, _get, _set, _validate) \
{ \
.id = DEVLINK_PARAM_GENERIC_ID_##_id, \
diff --git a/net/core/devlink.c b/net/core/devlink.c
index 30f32e5..fce5c1d 100644
--- a/net/core/devlink.c
+++ b/net/core/devlink.c
@@ -2686,6 +2686,11 @@ static int devlink_nl_cmd_reload(struct sk_buff *skb, struct genl_info *info)
.name = DEVLINK_PARAM_GENERIC_IGNORE_ARI_NAME,
.type = DEVLINK_PARAM_GENERIC_IGNORE_ARI_TYPE,
},
+ {
+ .id = DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MAX,
+ .name = DEVLINK_PARAM_GENERIC_MSIX_VEC_PER_PF_MAX_NAME,
+ .type = DEVLINK_PARAM_GENERIC_MSIX_VEC_PER_PF_MAX_TYPE,
+ },
};
static int devlink_param_generic_verify(const struct devlink_param *param)
--
1.8.3.1
^ permalink raw reply related
* [PATCH net-next 2/8] devlink: Add generic parameter ignore_ari
From: Vasundhara Volam @ 2018-09-11 8:44 UTC (permalink / raw)
To: davem; +Cc: michael.chan, netdev
In-Reply-To: <1536655505-14387-1-git-send-email-vasundhara-v.volam@broadcom.com>
ignore_ari - Device ignores ARI(Alternate Routing ID) capability,
even when platforms has the support and creates same number of
partitions when platform does not support ARI capability.
Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com>
---
include/net/devlink.h | 4 ++++
net/core/devlink.c | 5 +++++
2 files changed, 9 insertions(+)
diff --git a/include/net/devlink.h b/include/net/devlink.h
index a0e9ce9..8a6063e 100644
--- a/include/net/devlink.h
+++ b/include/net/devlink.h
@@ -363,6 +363,7 @@ enum devlink_param_generic_id {
DEVLINK_PARAM_GENERIC_ID_ENABLE_SRIOV,
DEVLINK_PARAM_GENERIC_ID_REGION_SNAPSHOT,
DEVLINK_PARAM_GENERIC_ID_HW_TC_OFFLOAD,
+ DEVLINK_PARAM_GENERIC_ID_IGNORE_ARI,
/* add new param generic ids above here*/
__DEVLINK_PARAM_GENERIC_ID_MAX,
@@ -384,6 +385,9 @@ enum devlink_param_generic_id {
#define DEVLINK_PARAM_GENERIC_HW_TC_OFFLOAD_NAME "hw_tc_offload"
#define DEVLINK_PARAM_GENERIC_HW_TC_OFFLOAD_TYPE DEVLINK_PARAM_TYPE_BOOL
+#define DEVLINK_PARAM_GENERIC_IGNORE_ARI_NAME "ignore_ari"
+#define DEVLINK_PARAM_GENERIC_IGNORE_ARI_TYPE DEVLINK_PARAM_TYPE_BOOL
+
#define DEVLINK_PARAM_GENERIC(_id, _cmodes, _get, _set, _validate) \
{ \
.id = DEVLINK_PARAM_GENERIC_ID_##_id, \
diff --git a/net/core/devlink.c b/net/core/devlink.c
index 020daa1..30f32e5 100644
--- a/net/core/devlink.c
+++ b/net/core/devlink.c
@@ -2681,6 +2681,11 @@ static int devlink_nl_cmd_reload(struct sk_buff *skb, struct genl_info *info)
.name = DEVLINK_PARAM_GENERIC_HW_TC_OFFLOAD_NAME,
.type = DEVLINK_PARAM_GENERIC_HW_TC_OFFLOAD_TYPE,
},
+ {
+ .id = DEVLINK_PARAM_GENERIC_ID_IGNORE_ARI,
+ .name = DEVLINK_PARAM_GENERIC_IGNORE_ARI_NAME,
+ .type = DEVLINK_PARAM_GENERIC_IGNORE_ARI_TYPE,
+ },
};
static int devlink_param_generic_verify(const struct devlink_param *param)
--
1.8.3.1
^ permalink raw reply related
* [PATCH net-next 0/8] bnxt_en: devlink param updates
From: Vasundhara Volam @ 2018-09-11 8:44 UTC (permalink / raw)
To: davem; +Cc: michael.chan, netdev
This patchset adds support for 4 generic and 1 driver-specific devlink
parameters.
Also, this patchset adds support to return proper error code if
HWRM_NVM_GET/SET_VARIABLE commands return error code
HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED.
Vasundhara Volam (8):
devlink: Add generic parameter hw_tc_offload
devlink: Add generic parameter ignore_ari
devlink: Add generic parameter msix_vec_per_pf_max
devlink: Add generic parameter msix_vec_per_pf_min
bnxt_en: Use hw_tc_offload and ignore_ari devlink parameters
bnxt_en: return proper error when FW returns
HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED
bnxt_en: Use msix_vec_per_pf_max and msix_vec_per_pf_min devlink
params.
bnxt_en: Add a driver specific devlink parameter.
drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c | 92 ++++++++++++++++++++++-
drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h | 8 ++
include/net/devlink.h | 16 ++++
net/core/devlink.c | 20 +++++
4 files changed, 132 insertions(+), 4 deletions(-)
--
1.8.3.1
^ permalink raw reply
* [PATCH net-next 4/8] devlink: Add generic parameter msix_vec_per_pf_min
From: Vasundhara Volam @ 2018-09-11 8:45 UTC (permalink / raw)
To: davem; +Cc: michael.chan, netdev
In-Reply-To: <1536655505-14387-1-git-send-email-vasundhara-v.volam@broadcom.com>
msix_vec_per_pf_min - This param sets the number of minimal MSIX
vectors required for the device initialization. This value is set
in the device which limits MSIX vectors per PF.
Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com>
---
include/net/devlink.h | 4 ++++
net/core/devlink.c | 5 +++++
2 files changed, 9 insertions(+)
diff --git a/include/net/devlink.h b/include/net/devlink.h
index 9619a68..208cd4a 100644
--- a/include/net/devlink.h
+++ b/include/net/devlink.h
@@ -365,6 +365,7 @@ enum devlink_param_generic_id {
DEVLINK_PARAM_GENERIC_ID_HW_TC_OFFLOAD,
DEVLINK_PARAM_GENERIC_ID_IGNORE_ARI,
DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MAX,
+ DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MIN,
/* add new param generic ids above here*/
__DEVLINK_PARAM_GENERIC_ID_MAX,
@@ -392,6 +393,9 @@ enum devlink_param_generic_id {
#define DEVLINK_PARAM_GENERIC_MSIX_VEC_PER_PF_MAX_NAME "msix_vec_per_pf_max"
#define DEVLINK_PARAM_GENERIC_MSIX_VEC_PER_PF_MAX_TYPE DEVLINK_PARAM_TYPE_U32
+#define DEVLINK_PARAM_GENERIC_MSIX_VEC_PER_PF_MIN_NAME "msix_vec_per_pf_min"
+#define DEVLINK_PARAM_GENERIC_MSIX_VEC_PER_PF_MIN_TYPE DEVLINK_PARAM_TYPE_U32
+
#define DEVLINK_PARAM_GENERIC(_id, _cmodes, _get, _set, _validate) \
{ \
.id = DEVLINK_PARAM_GENERIC_ID_##_id, \
diff --git a/net/core/devlink.c b/net/core/devlink.c
index fce5c1d..177c474 100644
--- a/net/core/devlink.c
+++ b/net/core/devlink.c
@@ -2691,6 +2691,11 @@ static int devlink_nl_cmd_reload(struct sk_buff *skb, struct genl_info *info)
.name = DEVLINK_PARAM_GENERIC_MSIX_VEC_PER_PF_MAX_NAME,
.type = DEVLINK_PARAM_GENERIC_MSIX_VEC_PER_PF_MAX_TYPE,
},
+ {
+ .id = DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MIN,
+ .name = DEVLINK_PARAM_GENERIC_MSIX_VEC_PER_PF_MIN_NAME,
+ .type = DEVLINK_PARAM_GENERIC_MSIX_VEC_PER_PF_MIN_TYPE,
+ },
};
static int devlink_param_generic_verify(const struct devlink_param *param)
--
1.8.3.1
^ permalink raw reply related
* [PATCH net-next 1/8] devlink: Add generic parameter hw_tc_offload
From: Vasundhara Volam @ 2018-09-11 8:44 UTC (permalink / raw)
To: davem; +Cc: michael.chan, netdev
In-Reply-To: <1536655505-14387-1-git-send-email-vasundhara-v.volam@broadcom.com>
hw_tc_offload - Enable/Disable TC flower offload in the device.
Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com>
---
include/net/devlink.h | 4 ++++
net/core/devlink.c | 5 +++++
2 files changed, 9 insertions(+)
diff --git a/include/net/devlink.h b/include/net/devlink.h
index b9b89d6..a0e9ce9 100644
--- a/include/net/devlink.h
+++ b/include/net/devlink.h
@@ -362,6 +362,7 @@ enum devlink_param_generic_id {
DEVLINK_PARAM_GENERIC_ID_MAX_MACS,
DEVLINK_PARAM_GENERIC_ID_ENABLE_SRIOV,
DEVLINK_PARAM_GENERIC_ID_REGION_SNAPSHOT,
+ DEVLINK_PARAM_GENERIC_ID_HW_TC_OFFLOAD,
/* add new param generic ids above here*/
__DEVLINK_PARAM_GENERIC_ID_MAX,
@@ -380,6 +381,9 @@ enum devlink_param_generic_id {
#define DEVLINK_PARAM_GENERIC_REGION_SNAPSHOT_NAME "region_snapshot_enable"
#define DEVLINK_PARAM_GENERIC_REGION_SNAPSHOT_TYPE DEVLINK_PARAM_TYPE_BOOL
+#define DEVLINK_PARAM_GENERIC_HW_TC_OFFLOAD_NAME "hw_tc_offload"
+#define DEVLINK_PARAM_GENERIC_HW_TC_OFFLOAD_TYPE DEVLINK_PARAM_TYPE_BOOL
+
#define DEVLINK_PARAM_GENERIC(_id, _cmodes, _get, _set, _validate) \
{ \
.id = DEVLINK_PARAM_GENERIC_ID_##_id, \
diff --git a/net/core/devlink.c b/net/core/devlink.c
index 65fc366..020daa1 100644
--- a/net/core/devlink.c
+++ b/net/core/devlink.c
@@ -2676,6 +2676,11 @@ static int devlink_nl_cmd_reload(struct sk_buff *skb, struct genl_info *info)
.name = DEVLINK_PARAM_GENERIC_REGION_SNAPSHOT_NAME,
.type = DEVLINK_PARAM_GENERIC_REGION_SNAPSHOT_TYPE,
},
+ {
+ .id = DEVLINK_PARAM_GENERIC_ID_HW_TC_OFFLOAD,
+ .name = DEVLINK_PARAM_GENERIC_HW_TC_OFFLOAD_NAME,
+ .type = DEVLINK_PARAM_GENERIC_HW_TC_OFFLOAD_TYPE,
+ },
};
static int devlink_param_generic_verify(const struct devlink_param *param)
--
1.8.3.1
^ permalink raw reply related
* [PATCH net-next 6/8] bnxt_en: return proper error when FW returns HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED
From: Vasundhara Volam @ 2018-09-11 8:45 UTC (permalink / raw)
To: davem; +Cc: michael.chan, netdev
In-Reply-To: <1536655505-14387-1-git-send-email-vasundhara-v.volam@broadcom.com>
Return proper error code when Firmware returns
HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED for HWRM_NVM_GET/SET_VARIABLE
commands.
Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com>
---
drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c
index 582e5b5..8d4ba33 100644
--- a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c
+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c
@@ -79,8 +79,12 @@ static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg,
memcpy(buf, data_addr, bytesize);
dma_free_coherent(&bp->pdev->dev, bytesize, data_addr, data_dma_addr);
- if (rc)
+ if (rc == HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED) {
+ netdev_err(bp->dev, "PF does not have admin privileges to modify NVM config\n");
+ return -EACCES;
+ } else if (rc) {
return -EIO;
+ }
return 0;
}
--
1.8.3.1
^ permalink raw reply related
* [PATCH net-next 5/8] bnxt_en: Use hw_tc_offload and ignore_ari devlink parameters
From: Vasundhara Volam @ 2018-09-11 8:45 UTC (permalink / raw)
To: davem; +Cc: michael.chan, netdev
In-Reply-To: <1536655505-14387-1-git-send-email-vasundhara-v.volam@broadcom.com>
This patch adds support for following generic permanent mode
devlink parameters. Both are disabled by default. They can be
enabled using devlink param commands.
hw_tc_offload - Enable/Disable TC flower offload in the device.
ignore_ari - Device ignores ARI(Alternate Routing ID) capability,
even when platforms has the support and creates same number of
partitions when platform does not support ARI capability.
Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com>
---
drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c | 12 ++++++++++++
drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h | 2 ++
2 files changed, 14 insertions(+)
diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c
index f3b9fbc..582e5b5 100644
--- a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c
+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c
@@ -24,6 +24,10 @@
static const struct bnxt_dl_nvm_param nvm_params[] = {
{DEVLINK_PARAM_GENERIC_ID_ENABLE_SRIOV, NVM_OFF_ENABLE_SRIOV,
BNXT_NVM_SHARED_CFG, 1},
+ {DEVLINK_PARAM_GENERIC_ID_HW_TC_OFFLOAD, NVM_OFF_HW_TC_OFFLOAD,
+ BNXT_NVM_SHARED_CFG, 1},
+ {DEVLINK_PARAM_GENERIC_ID_IGNORE_ARI, NVM_OFF_IGNORE_ARI,
+ BNXT_NVM_SHARED_CFG, 1},
};
static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg,
@@ -105,6 +109,14 @@ static int bnxt_dl_nvm_param_set(struct devlink *dl, u32 id,
BIT(DEVLINK_PARAM_CMODE_PERMANENT),
bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
NULL),
+ DEVLINK_PARAM_GENERIC(HW_TC_OFFLOAD,
+ BIT(DEVLINK_PARAM_CMODE_PERMANENT),
+ bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
+ NULL),
+ DEVLINK_PARAM_GENERIC(IGNORE_ARI,
+ BIT(DEVLINK_PARAM_CMODE_PERMANENT),
+ bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
+ NULL),
};
int bnxt_dl_register(struct bnxt *bp)
diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h
index 2f68dc0..da146492 100644
--- a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h
+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h
@@ -33,6 +33,8 @@ static inline void bnxt_link_bp_to_dl(struct bnxt *bp, struct devlink *dl)
}
}
+#define NVM_OFF_IGNORE_ARI 164
+#define NVM_OFF_HW_TC_OFFLOAD 170
#define NVM_OFF_ENABLE_SRIOV 401
enum bnxt_nvm_dir_type {
--
1.8.3.1
^ permalink raw reply related
* [PATCH net-next 7/8] bnxt_en: Use msix_vec_per_pf_max and msix_vec_per_pf_min devlink params.
From: Vasundhara Volam @ 2018-09-11 8:45 UTC (permalink / raw)
To: davem; +Cc: michael.chan, netdev
In-Reply-To: <1536655505-14387-1-git-send-email-vasundhara-v.volam@broadcom.com>
This patch adds support for following generic permanent mode
devlink parameters. They can be modified using devlink param
commands.
msix_vec_per_pf_max - This param sets the number of MSIX vectors
that the device requests from the host on driver initialization.
This value is set in the device which limits MSIX vectors per PF.
msix_vec_per_pf_min - This param sets the number of minimal MSIX
vectors required for the device initialization. Value 0 indicates
a default value is selected. This value is set in the device which
limits MSIX vectors per PF.
Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com>
---
drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c | 50 ++++++++++++++++++++++-
drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h | 5 +++
2 files changed, 53 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c
index 8d4ba33..c9e7700 100644
--- a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c
+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c
@@ -28,6 +28,10 @@
BNXT_NVM_SHARED_CFG, 1},
{DEVLINK_PARAM_GENERIC_ID_IGNORE_ARI, NVM_OFF_IGNORE_ARI,
BNXT_NVM_SHARED_CFG, 1},
+ {DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MAX,
+ NVM_OFF_MSIX_VEC_PER_PF_MAX, BNXT_NVM_SHARED_CFG, 10},
+ {DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MIN,
+ NVM_OFF_MSIX_VEC_PER_PF_MIN, BNXT_NVM_SHARED_CFG, 7},
};
static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg,
@@ -56,8 +60,22 @@ static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg,
idx = bp->pf.fw_fid - BNXT_FIRST_PF_FID;
bytesize = roundup(nvm_param.num_bits, BITS_PER_BYTE) / BITS_PER_BYTE;
- if (nvm_param.num_bits == 1)
- buf = &val->vbool;
+ switch (bytesize) {
+ case 1:
+ if (nvm_param.num_bits == 1)
+ buf = &val->vbool;
+ else
+ buf = &val->vu8;
+ break;
+ case 2:
+ buf = &val->vu16;
+ break;
+ case 4:
+ buf = &val->vu32;
+ break;
+ default:
+ return -EFAULT;
+ }
data_addr = dma_zalloc_coherent(&bp->pdev->dev, bytesize,
&data_dma_addr, GFP_KERNEL);
@@ -108,6 +126,26 @@ static int bnxt_dl_nvm_param_set(struct devlink *dl, u32 id,
return bnxt_hwrm_nvm_req(bp, id, &req, sizeof(req), &ctx->val);
}
+static int bnxt_dl_msix_validate(struct devlink *dl, u32 id,
+ union devlink_param_value val,
+ struct netlink_ext_ack *extack)
+{
+ int max_val;
+
+ if (id == DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MAX)
+ max_val = BNXT_MSIX_VEC_MAX;
+
+ if (id == DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MIN)
+ max_val = BNXT_MSIX_VEC_MIN_MAX;
+
+ if (val.vu32 < 0 || val.vu32 > max_val) {
+ NL_SET_ERR_MSG_MOD(extack, "MSIX value is exceeding the range");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static const struct devlink_param bnxt_dl_params[] = {
DEVLINK_PARAM_GENERIC(ENABLE_SRIOV,
BIT(DEVLINK_PARAM_CMODE_PERMANENT),
@@ -121,6 +159,14 @@ static int bnxt_dl_nvm_param_set(struct devlink *dl, u32 id,
BIT(DEVLINK_PARAM_CMODE_PERMANENT),
bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
NULL),
+ DEVLINK_PARAM_GENERIC(MSIX_VEC_PER_PF_MAX,
+ BIT(DEVLINK_PARAM_CMODE_PERMANENT),
+ bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
+ bnxt_dl_msix_validate),
+ DEVLINK_PARAM_GENERIC(MSIX_VEC_PER_PF_MIN,
+ BIT(DEVLINK_PARAM_CMODE_PERMANENT),
+ bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
+ bnxt_dl_msix_validate),
};
int bnxt_dl_register(struct bnxt *bp)
diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h
index da146492..0e67c05 100644
--- a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h
+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h
@@ -33,10 +33,15 @@ static inline void bnxt_link_bp_to_dl(struct bnxt *bp, struct devlink *dl)
}
}
+#define NVM_OFF_MSIX_VEC_PER_PF_MAX 108
+#define NVM_OFF_MSIX_VEC_PER_PF_MIN 114
#define NVM_OFF_IGNORE_ARI 164
#define NVM_OFF_HW_TC_OFFLOAD 170
#define NVM_OFF_ENABLE_SRIOV 401
+#define BNXT_MSIX_VEC_MAX 1280
+#define BNXT_MSIX_VEC_MIN_MAX 128
+
enum bnxt_nvm_dir_type {
BNXT_NVM_SHARED_CFG = 40,
BNXT_NVM_PORT_CFG,
--
1.8.3.1
^ permalink raw reply related
* [PATCH net-next 8/8] bnxt_en: Add a driver specific devlink parameter.
From: Vasundhara Volam @ 2018-09-11 8:45 UTC (permalink / raw)
To: davem; +Cc: michael.chan, netdev
In-Reply-To: <1536655505-14387-1-git-send-email-vasundhara-v.volam@broadcom.com>
This patch adds following driver-specific permanent mode boolean
parameter.
gre_ver_check - When this param is disabled, device skips GRE
version check.
Signed-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com>
---
drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c | 24 ++++++++++++++++++++++-
drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h | 1 +
2 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c
index c9e7700..9778b88 100644
--- a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c
+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c
@@ -21,6 +21,11 @@
#endif /* CONFIG_BNXT_SRIOV */
};
+enum bnxt_dl_param_id {
+ BNXT_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,
+ BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK,
+};
+
static const struct bnxt_dl_nvm_param nvm_params[] = {
{DEVLINK_PARAM_GENERIC_ID_ENABLE_SRIOV, NVM_OFF_ENABLE_SRIOV,
BNXT_NVM_SHARED_CFG, 1},
@@ -32,6 +37,8 @@
NVM_OFF_MSIX_VEC_PER_PF_MAX, BNXT_NVM_SHARED_CFG, 10},
{DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MIN,
NVM_OFF_MSIX_VEC_PER_PF_MIN, BNXT_NVM_SHARED_CFG, 7},
+ {BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK, NVM_OFF_DIS_GRE_VER_CHECK,
+ BNXT_NVM_SHARED_CFG, 1},
};
static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg,
@@ -111,9 +118,15 @@ static int bnxt_dl_nvm_param_get(struct devlink *dl, u32 id,
{
struct hwrm_nvm_get_variable_input req = {0};
struct bnxt *bp = bnxt_get_bp_from_dl(dl);
+ int rc;
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_VARIABLE, -1, -1);
- return bnxt_hwrm_nvm_req(bp, id, &req, sizeof(req), &ctx->val);
+ rc = bnxt_hwrm_nvm_req(bp, id, &req, sizeof(req), &ctx->val);
+ if (!rc)
+ if (id == BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK)
+ ctx->val.vbool = !ctx->val.vbool;
+
+ return rc;
}
static int bnxt_dl_nvm_param_set(struct devlink *dl, u32 id,
@@ -123,6 +136,10 @@ static int bnxt_dl_nvm_param_set(struct devlink *dl, u32 id,
struct bnxt *bp = bnxt_get_bp_from_dl(dl);
bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_SET_VARIABLE, -1, -1);
+
+ if (id == BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK)
+ ctx->val.vbool = !ctx->val.vbool;
+
return bnxt_hwrm_nvm_req(bp, id, &req, sizeof(req), &ctx->val);
}
@@ -167,6 +184,11 @@ static int bnxt_dl_msix_validate(struct devlink *dl, u32 id,
BIT(DEVLINK_PARAM_CMODE_PERMANENT),
bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
bnxt_dl_msix_validate),
+ DEVLINK_PARAM_DRIVER(BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK,
+ "gre_ver_check", DEVLINK_PARAM_TYPE_BOOL,
+ BIT(DEVLINK_PARAM_CMODE_PERMANENT),
+ bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,
+ NULL),
};
int bnxt_dl_register(struct bnxt *bp)
diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h
index 0e67c05..e36e41a 100644
--- a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h
+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h
@@ -37,6 +37,7 @@ static inline void bnxt_link_bp_to_dl(struct bnxt *bp, struct devlink *dl)
#define NVM_OFF_MSIX_VEC_PER_PF_MIN 114
#define NVM_OFF_IGNORE_ARI 164
#define NVM_OFF_HW_TC_OFFLOAD 170
+#define NVM_OFF_DIS_GRE_VER_CHECK 171
#define NVM_OFF_ENABLE_SRIOV 401
#define BNXT_MSIX_VEC_MAX 1280
--
1.8.3.1
^ permalink raw reply related
* Re: [PATCH v2 net-next 05/12] net: ethernet: genet: Fix speed selection
From: Sergei Shtylyov @ 2018-09-11 9:02 UTC (permalink / raw)
To: Andrew Lunn, David Miller; +Cc: netdev, Florian Fainelli
In-Reply-To: <1536616350-15442-6-git-send-email-andrew@lunn.ch>
Hello!
On 9/11/2018 12:52 AM, Andrew Lunn wrote:
> The phy supported speed is being used to determine if the MAC should
> be configured to 100 or 1G. The masking logic is broken. Instead, look
Look at?
> 1G supported speeds to enable 1G MAC support.
>
> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
[...]
MBR, Sergei
^ permalink raw reply
* Re: [PATCH] net: ipv4: Use BUG_ON directly instead of a if condition followed by BUG
From: Sergei Shtylyov @ 2018-09-11 9:11 UTC (permalink / raw)
To: zhong jiang; +Cc: davem, edumazet, kuznet, yoshfuji, netdev, linux-kernel
In-Reply-To: <5B9783ED.4080908@huawei.com>
On 9/11/2018 11:59 AM, zhong jiang wrote:
>>> The if condition can be removed if we use BUG_ON directly.
>>> The issule is detected with the help of Coccinelle.
>>
>> Issue?
>>
>>>
>>> Signed-off-by: zhong jiang <zhongjiang@huawei.com>
>>> ---
>>> net/ipv4/tcp_input.c | 8 ++++----
>>> 1 file changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
>>> index 62508a2..893bde3 100644
>>> --- a/net/ipv4/tcp_input.c
>>> +++ b/net/ipv4/tcp_input.c
>>> @@ -4934,8 +4934,8 @@ void tcp_rbtree_insert(struct rb_root *root, struct sk_buff *skb)
>>> BUG_ON(offset < 0);
>>> if (size > 0) {
>>> size = min(copy, size);
>>> - if (skb_copy_bits(skb, offset, skb_put(nskb, size), size))
>>> - BUG();
>>> + BUG(skb_copy_bits(skb, offset,
>>
>> You said BUG_ON()?
> Yep. Do you think that it is worthing to do
I think BUG() doesn't take parameters, BUG_ON() does. Have you tried to
build the kernel with your patch at all?
> Thanks,
> zhong jiang
[...]
MBR, Sergei
^ permalink raw reply
* Re: [PATCH] net: ipv4: Use BUG_ON directly instead of a if condition followed by BUG
From: Sergei Shtylyov @ 2018-09-11 9:33 UTC (permalink / raw)
To: zhong jiang; +Cc: davem, edumazet, kuznet, yoshfuji, netdev, linux-kernel
In-Reply-To: <5B97889F.3020303@huawei.com>
On 9/11/2018 12:19 PM, zhong jiang wrote:
>>>>> The if condition can be removed if we use BUG_ON directly.
>>>>> The issule is detected with the help of Coccinelle.
>>>>
>>>> Issue?
>>>>
>>>>>
>>>>> Signed-off-by: zhong jiang <zhongjiang@huawei.com>
>>>>> ---
>>>>> net/ipv4/tcp_input.c | 8 ++++----
>>>>> 1 file changed, 4 insertions(+), 4 deletions(-)
>>>>>
>>>>> diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
>>>>> index 62508a2..893bde3 100644
>>>>> --- a/net/ipv4/tcp_input.c
>>>>> +++ b/net/ipv4/tcp_input.c
>>>>> @@ -4934,8 +4934,8 @@ void tcp_rbtree_insert(struct rb_root *root, struct sk_buff *skb)
>>>>> BUG_ON(offset < 0);
>>>>> if (size > 0) {
>>>>> size = min(copy, size);
>>>>> - if (skb_copy_bits(skb, offset, skb_put(nskb, size), size))
>>>>> - BUG();
>>>>> + BUG(skb_copy_bits(skb, offset,
>>>>
>>>> You said BUG_ON()?
>>> Yep. Do you think that it is worthing to do
>>
>> I think BUG() doesn't take parameters, BUG_ON() does. Have you tried to build the kernel with your patch at all?
>>
> I know that the patch should be BUG_ON instead of BUG. This is my mistake. I just want to know that it is worthing to do so.
Yes, probably.
> Thanks,
> zhong jiang
[...]
MBR, Sergei
^ permalink raw reply
* Re: [PATCH net-next 1/8] devlink: Add generic parameter hw_tc_offload
From: Jiri Pirko @ 2018-09-11 9:51 UTC (permalink / raw)
To: Vasundhara Volam; +Cc: davem, michael.chan, netdev
In-Reply-To: <1536655505-14387-2-git-send-email-vasundhara-v.volam@broadcom.com>
Tue, Sep 11, 2018 at 10:44:58AM CEST, vasundhara-v.volam@broadcom.com wrote:
>hw_tc_offload - Enable/Disable TC flower offload in the device.
>
>Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com>
>---
> include/net/devlink.h | 4 ++++
> net/core/devlink.c | 5 +++++
> 2 files changed, 9 insertions(+)
>
>diff --git a/include/net/devlink.h b/include/net/devlink.h
>index b9b89d6..a0e9ce9 100644
>--- a/include/net/devlink.h
>+++ b/include/net/devlink.h
>@@ -362,6 +362,7 @@ enum devlink_param_generic_id {
> DEVLINK_PARAM_GENERIC_ID_MAX_MACS,
> DEVLINK_PARAM_GENERIC_ID_ENABLE_SRIOV,
> DEVLINK_PARAM_GENERIC_ID_REGION_SNAPSHOT,
>+ DEVLINK_PARAM_GENERIC_ID_HW_TC_OFFLOAD,
Could you please describe why do you need this here and why the
tc_offload flag in ethtool is not enough. How do you imagine the user
should use them together?
^ permalink raw reply
* Re: [PATCH net-next v3 02/17] zinc: introduce minimal cryptography library
From: Greg Kroah-Hartman @ 2018-09-11 14:56 UTC (permalink / raw)
To: Ard Biesheuvel
Cc: Jason A. Donenfeld, Linux Kernel Mailing List,
<netdev@vger.kernel.org>, David S. Miller, Andy Lutomirski,
Samuel Neves, Jean-Philippe Aumasson,
open list:HARDWARE RANDOM NUMBER GENERATOR CORE
In-Reply-To: <CAKv+Gu9nSeo4PFVrtjtqGQ32eqyxUp3xVCczZfu+dhFz5yLM0A@mail.gmail.com>
On Tue, Sep 11, 2018 at 12:08:56PM +0200, Ard Biesheuvel wrote:
> > As Zinc is simply library code, its config options are un-menued, with
> > the exception of CONFIG_ZINC_DEBUG, which enables various selftests and
> > BUG_ONs.
> >
>
> In spite of the wall of text, you fail to point out exactly why the
> existing AEAD API in unsuitable, and why fixing it is not an option.
>
> As I pointed out in a previous version, I don't think we need a
> separate crypto API/library in the kernel, and I don't think you have
> convinced anyone else yet either.
Um, then why do people keep sprinkling new crypto/hash code all around
the kernel tree? It's because what we have as a crypto api is complex
and is hard to use for many in-kernel users.
Something like this new interface (zinc) is a much "saner" api for
writing kernel code that has to interact with crypto/hash primitives.
I see no reason why the existing crypto code can be redone to use the
zinc crypto primitives over time, making there only be one main location
for the crypto algorithms. But to do it the other way around is pretty
much impossible given the complexities in the existing api that has been
created over time.
Not to say that the existing api is not a viable one, but ugh, really?
You have to admit it is a pain to try to use in any "normal" type of
"here's a bytestream, go give me a hash" type of method, right?
Also there is the added benefit that the crypto primitives here have
been audited by a number of people (so Jason stated), and they are
written in a way that the crypto community can more easily interact and
contribute to. Which is _way_ better than what we have today.
So this gets my "stamp of approval" for whatever it is worth :)
thanks,
greg k-h
^ permalink raw reply
* Re: [PATCH net-next v3 02/17] zinc: introduce minimal cryptography library
From: Ard Biesheuvel @ 2018-09-11 10:08 UTC (permalink / raw)
To: Jason A. Donenfeld
Cc: Linux Kernel Mailing List, <netdev@vger.kernel.org>,
David S. Miller, Greg Kroah-Hartman, Andy Lutomirski,
Samuel Neves, Jean-Philippe Aumasson,
open list:HARDWARE RANDOM NUMBER GENERATOR CORE
In-Reply-To: <20180911010838.8818-3-Jason@zx2c4.com>
On 11 September 2018 at 03:08, Jason A. Donenfeld <Jason@zx2c4.com> wrote:
> Zinc stands for "Zinc Is Neat Crypto" or "Zinc as IN Crypto" or maybe
> just "Zx2c4's INsane Cryptolib." It's also short, easy to type, and
> plays nicely with the recent trend of naming crypto libraries after
> elements. The guiding principle is "don't overdo it". It's less of a
> library and more of a directory tree for organizing well-curated direct
> implementations of cryptography primitives.
>
> Zinc is a new cryptography API that is much more minimal and lower-level
> than the current one. It intends to complement it and provide a basis
> upon which the current crypto API might build, as the provider of
> software implementations of cryptographic primitives. It is motivated by
> three primary observations in crypto API design:
>
> * Highly composable "cipher modes" and related abstractions from
> 90s cryptographers did not turn out to be as terrific an idea as
> hoped, leading to a host of API misuse problems.
>
> * Most programmers are afraid of crypto code, and so prefer to
> integrate it into libraries in a highly abstracted manner, so as to
> shield themselves from implementation details. Cryptographers, on
> the other hand, prefer simple direct implementations, which they're
> able to verify for high assurance and optimize in accordance with
> their expertise.
>
> * Overly abstracted and flexible cryptography APIs lead to a host of
> dangerous problems and performance issues. The kernel is in the
> business usually not of coming up with new uses of crypto, but
> rather implementing various constructions, which means it essentially
> needs a library of primitives, not a highly abstracted enterprise-ready
> pluggable system, with a few particular exceptions.
>
> This last observation has seen itself play out several times over and
> over again within the kernel:
>
> * The perennial move of actual primitives away from crypto/ and into
> lib/, so that users can actually call these functions directly with
> no overhead and without lots of allocations, function pointers,
> string specifier parsing, and general clunkiness. For example:
> sha256, chacha20, siphash, sha1, and so forth live in lib/ rather
> than in crypto/. Zinc intends to stop the cluttering of lib/ and
> introduce these direct primitives into their proper place, lib/zinc/.
>
> * An abundance of misuse bugs with the present crypto API that have
> been very unpleasant to clean up.
>
> * A hesitance to even use cryptography, because of the overhead and
> headaches involved in accessing the routines.
>
> Zinc goes in a rather different direction. Rather than providing a
> thoroughly designed and abstracted API, Zinc gives you simple functions,
> which implement some primitive, or some particular and specific
> construction of primitives. It is not dynamic in the least, though one
> could imagine implementing a complex dynamic dispatch mechanism (such as
> the current crypto API) on top of these basic functions. After all,
> dynamic dispatch is usually needed for applications with cipher agility,
> such as IPsec, dm-crypt, AF_ALG, and so forth, and the existing crypto
> API will continue to play that role. However, Zinc will provide a non-
> haphazard way of directly utilizing crypto routines in applications
> that do have neither the need nor desire for abstraction and dynamic
> dispatch.
>
> It also organizes the implementations in a simple, straight-forward,
> and direct manner, making it enjoyable and intuitive to work on.
> Rather than moving optimized assembly implementations into arch/, it
> keeps them all together in lib/zinc/, making it simple and obvious to
> compare and contrast what's happening. This is, notably, exactly what
> the lib/raid6/ tree does, and that seems to work out rather well. It's
> also the pattern of most successful crypto libraries. The architecture-
> specific glue-code is made a part of each translation unit, rather than
> being in a separate one, so that generic and architecture-optimized code
> are combined at compile-time, and incompatibility branches compiled out by
> the optimizer.
>
> All implementations have been extensively tested and fuzzed, and are
> selected for their quality, trustworthiness, and performance. Wherever
> possible and performant, formally verified implementations are used,
> such as those from HACL* [1] and Fiat-Crypto [2]. The routines also take
> special care to zero out secrets using memzero_explicit (and future work
> is planned to have gcc do this more reliably and performantly with
> compiler plugins). The performance of the selected implementations is
> state-of-the-art and unrivaled on a broad array of hardware, though of
> course we will continue to fine tune these to the hardware demands
> needed by kernel contributors. Each implementation also comes with
> extensive self-tests and crafted test vectors, pulled from various
> places such as Wycheproof [9].
>
> Regularity of function signatures is important, so that users can easily
> "guess" the name of the function they want. Though, individual
> primitives are oftentimes not trivially interchangeable, having been
> designed for different things and requiring different parameters and
> semantics, and so the function signatures they provide will directly
> reflect the realities of the primitives' usages, rather than hiding it
> behind (inevitably leaky) abstractions. Also, in contrast to the current
> crypto API, Zinc functions can work on stack buffers, and can be called
> with different keys, without requiring allocations or locking.
>
> SIMD is used automatically when available, though some routines may
> benefit from either having their SIMD disabled for particular
> invocations, or to have the SIMD initialization calls amortized over
> several invocations of the function, and so Zinc utilizes function
> signatures enabling that in conjunction with the recently introduced
> simd_context_t.
>
> More generally, Zinc provides function signatures that allow just what
> is required by the various callers. This isn't to say that users of the
> functions will be permitted to pollute the function semantics with weird
> particular needs, but we are trying very hard not to overdo it, and that
> means looking carefully at what's actually necessary, and doing just that,
> and not much more than that. Remember: practicality and cleanliness rather
> than over-zealous infrastructure.
>
> Zinc provides also an opening for the best implementers in academia to
> contribute their time and effort to the kernel, by being sufficiently
> simple and inviting. In discussing this commit with some of the best and
> brightest over the last few years, there are many who are eager to
> devote rare talent and energy to this effort.
>
> Following the merging of this, I expect for the primitives that
> currently exist in lib/ to work their way into lib/zinc/, after intense
> scrutiny of each implementation, potentially replacing them with either
> formally-verified implementations, or better studied and faster
> state-of-the-art implementations.
>
> Also following the merging of this, I expect for the old crypto API
> implementations to be ported over to use Zinc for their software-based
> implementations.
>
> As Zinc is simply library code, its config options are un-menued, with
> the exception of CONFIG_ZINC_DEBUG, which enables various selftests and
> BUG_ONs.
>
In spite of the wall of text, you fail to point out exactly why the
existing AEAD API in unsuitable, and why fixing it is not an option.
As I pointed out in a previous version, I don't think we need a
separate crypto API/library in the kernel, and I don't think you have
convinced anyone else yet either.
Perhaps you can devote /your/ rare talent and energy to improving what
we already have for everybody's sake, rather than providing a
completely separate crypto stack that only benefits WireGuard (unless
you yourself port the existing crypto API software algorithms to this
crypto stack first and present *that* work as a convincing case in
itself)
I won't go into the 1000s lines of generated assembly again - you
already know my position on that topic.
Please refrain from sending a v4 with just a couple of more tweaks on
top - these are fundamental issues that require discussion before
there is any chance of this being merged.
> [1] https://github.com/project-everest/hacl-star
> [2] https://github.com/mit-plv/fiat-crypto
> [3] https://cr.yp.to/ecdh.html
> [4] https://cr.yp.to/chacha.html
> [5] https://cr.yp.to/snuffle/xsalsa-20081128.pdf
> [6] https://cr.yp.to/mac.html
> [7] https://blake2.net/
> [8] https://tools.ietf.org/html/rfc8439
> [9] https://github.com/google/wycheproof
>
> Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
> Cc: Andy Lutomirski <luto@kernel.org>
> Cc: Greg KH <gregkh@linuxfoundation.org>
> Cc: Samuel Neves <sneves@dei.uc.pt>
> Cc: Jean-Philippe Aumasson <jeanphilippe.aumasson@gmail.com>
> Cc: linux-crypto@vger.kernel.org
> ---
> MAINTAINERS | 8 ++++++++
> lib/Kconfig | 2 ++
> lib/Makefile | 2 ++
> lib/zinc/Kconfig | 20 ++++++++++++++++++++
> lib/zinc/Makefile | 8 ++++++++
> lib/zinc/main.c | 31 +++++++++++++++++++++++++++++++
> 6 files changed, 71 insertions(+)
> create mode 100644 lib/zinc/Kconfig
> create mode 100644 lib/zinc/Makefile
> create mode 100644 lib/zinc/main.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 2ef884b883c3..d2092e52320d 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -16160,6 +16160,14 @@ Q: https://patchwork.linuxtv.org/project/linux-media/list/
> S: Maintained
> F: drivers/media/dvb-frontends/zd1301_demod*
>
> +ZINC CRYPTOGRAPHY LIBRARY
> +M: Jason A. Donenfeld <Jason@zx2c4.com>
> +M: Samuel Neves <sneves@dei.uc.pt>
> +S: Maintained
> +F: lib/zinc/
> +F: include/zinc/
> +L: linux-crypto@vger.kernel.org
> +
> ZPOOL COMPRESSED PAGE STORAGE API
> M: Dan Streetman <ddstreet@ieee.org>
> L: linux-mm@kvack.org
> diff --git a/lib/Kconfig b/lib/Kconfig
> index a3928d4438b5..3e6848269c66 100644
> --- a/lib/Kconfig
> +++ b/lib/Kconfig
> @@ -485,6 +485,8 @@ config GLOB_SELFTEST
> module load) by a small amount, so you're welcome to play with
> it, but you probably don't need it.
>
> +source "lib/zinc/Kconfig"
> +
> #
> # Netlink attribute parsing support is select'ed if needed
> #
> diff --git a/lib/Makefile b/lib/Makefile
> index ca3f7ebb900d..3f16e35d2c11 100644
> --- a/lib/Makefile
> +++ b/lib/Makefile
> @@ -214,6 +214,8 @@ obj-$(CONFIG_PERCPU_TEST) += percpu_test.o
>
> obj-$(CONFIG_ASN1) += asn1_decoder.o
>
> +obj-$(CONFIG_ZINC) += zinc/
> +
> obj-$(CONFIG_FONT_SUPPORT) += fonts/
>
> obj-$(CONFIG_PRIME_NUMBERS) += prime_numbers.o
> diff --git a/lib/zinc/Kconfig b/lib/zinc/Kconfig
> new file mode 100644
> index 000000000000..aa4f8d449d6b
> --- /dev/null
> +++ b/lib/zinc/Kconfig
> @@ -0,0 +1,20 @@
> +config ZINC
> + tristate
> + select CRYPTO_BLKCIPHER
> + select VFP
> + select VFPv3
> + select NEON
> + select KERNEL_MODE_NEON
> +
> +config ZINC_DEBUG
> + bool "Zinc cryptography library debugging and self-tests"
> + depends on ZINC
> + help
> + This builds a series of self-tests for the Zinc crypto library, which
> + help diagnose any cryptographic algorithm implementation issues that
> + might be at the root cause of potential bugs. It also adds various
> + debugging traps.
> +
> + Unless you're developing and testing cryptographic routines, or are
> + especially paranoid about correctness on your hardware, you may say
> + N here.
> diff --git a/lib/zinc/Makefile b/lib/zinc/Makefile
> new file mode 100644
> index 000000000000..dad47573de42
> --- /dev/null
> +++ b/lib/zinc/Makefile
> @@ -0,0 +1,8 @@
> +ccflags-y := -O3
> +ccflags-y += -Wframe-larger-than=8192
> +ccflags-y += -D'pr_fmt(fmt)=KBUILD_MODNAME ": " fmt'
> +ccflags-$(CONFIG_ZINC_DEBUG) += -DDEBUG
> +
> +zinc-y += main.o
> +
> +obj-$(CONFIG_ZINC) := zinc.o
> diff --git a/lib/zinc/main.c b/lib/zinc/main.c
> new file mode 100644
> index 000000000000..ceece33ff5a7
> --- /dev/null
> +++ b/lib/zinc/main.c
> @@ -0,0 +1,31 @@
> +/* SPDX-License-Identifier: GPL-2.0
> + *
> + * Copyright (C) 2015-2018 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
> + */
> +
> +#include <linux/init.h>
> +#include <linux/module.h>
> +
> +#ifdef DEBUG
> +#define selftest(which) do { \
> + if (!which ## _selftest()) \
> + return -ENOTRECOVERABLE; \
> +} while (0)
> +#else
> +#define selftest(which)
> +#endif
> +
> +static int __init mod_init(void)
> +{
> + return 0;
> +}
> +
> +static void __exit mod_exit(void)
> +{
> +}
> +
> +module_init(mod_init);
> +module_exit(mod_exit);
> +MODULE_LICENSE("GPL v2");
> +MODULE_DESCRIPTION("Zinc cryptography library");
> +MODULE_AUTHOR("Jason A. Donenfeld <Jason@zx2c4.com>");
> --
> 2.18.0
>
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